Lines Matching refs:areg
218 u32 areg; /* cached additional register value */ member
500 rme96->areg |= RME96_AR_CDATA; in snd_rme96_write_SPI()
502 rme96->areg &= ~RME96_AR_CDATA; in snd_rme96_write_SPI()
504 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CLATCH); in snd_rme96_write_SPI()
505 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
507 rme96->areg |= RME96_AR_CCLK; in snd_rme96_write_SPI()
508 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
512 rme96->areg &= ~(RME96_AR_CCLK | RME96_AR_CDATA); in snd_rme96_write_SPI()
513 rme96->areg |= RME96_AR_CLATCH; in snd_rme96_write_SPI()
514 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
516 rme96->areg &= ~RME96_AR_CLATCH; in snd_rme96_write_SPI()
517 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
607 if (rme96->areg & RME96_AR_ANALOG) { in snd_rme96_capture_getrate()
609 n = ((rme96->areg >> RME96_AR_BITPOS_F0) & 1) + in snd_rme96_capture_getrate()
610 (((rme96->areg >> RME96_AR_BITPOS_F1) & 1) << 1); in snd_rme96_capture_getrate()
624 return (rme96->areg & RME96_AR_BITPOS_F2) ? rate << 1 : rate; in snd_rme96_capture_getrate()
754 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) & in snd_rme96_capture_analog_setrate()
758 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) | in snd_rme96_capture_analog_setrate()
762 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) | in snd_rme96_capture_analog_setrate()
769 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) & in snd_rme96_capture_analog_setrate()
776 rme96->areg = ((rme96->areg & ~RME96_AR_FREQPAD_0) | in snd_rme96_capture_analog_setrate()
780 rme96->areg = ((rme96->areg | RME96_AR_FREQPAD_0) | in snd_rme96_capture_analog_setrate()
786 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_capture_analog_setrate()
798 rme96->areg &= ~RME96_AR_WSEL; in snd_rme96_setclockmode()
803 rme96->areg &= ~RME96_AR_WSEL; in snd_rme96_setclockmode()
808 rme96->areg |= RME96_AR_WSEL; in snd_rme96_setclockmode()
814 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_setclockmode()
821 if (rme96->areg & RME96_AR_WSEL) { in snd_rme96_getclockmode()
863 rme96->areg |= RME96_AR_ANALOG; in snd_rme96_setinputtype()
864 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_setinputtype()
882 rme96->areg &= ~RME96_AR_ANALOG; in snd_rme96_setinputtype()
883 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_setinputtype()
892 if (rme96->areg & RME96_AR_ANALOG) { in snd_rme96_getinputtype()
1569 rme96->areg &= ~RME96_AR_DAC_EN; in snd_rme96_free()
1570 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_free()
1674 rme96->areg = RME96_AR_FREQPAD_1; /* set 44.1 kHz analog capture */ in snd_rme96_create()
1677 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_create()
1680 writel(rme96->areg | RME96_AR_PD2, in snd_rme96_create()
1682 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_create()
1686 rme96->areg |= RME96_AR_DAC_EN; in snd_rme96_create()
1687 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_create()
1782 if (rme96->areg & RME96_AR_WSEL) { in snd_rme96_proc_read()
2380 rme96->areg &= ~RME96_AR_DAC_EN; in rme96_suspend()
2381 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in rme96_suspend()
2403 writel(rme96->areg | RME96_AR_PD2, in rme96_resume()
2405 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in rme96_resume()
2409 rme96->areg |= RME96_AR_DAC_EN; in rme96_resume()
2410 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in rme96_resume()