Lines Matching refs:priv
105 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt6358_set_mtkaif_protocol() local
107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol()
112 static void playback_gpio_set(struct mt6358_priv *priv) in playback_gpio_set() argument
115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set()
117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set()
119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set()
123 static void playback_gpio_reset(struct mt6358_priv *priv) in playback_gpio_reset() argument
130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset()
132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset()
134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset()
138 static void capture_gpio_set(struct mt6358_priv *priv) in capture_gpio_set() argument
141 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_set()
143 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_SET, in capture_gpio_set()
145 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_set()
149 static void capture_gpio_reset(struct mt6358_priv *priv) in capture_gpio_reset() argument
157 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3_CLR, in capture_gpio_reset()
159 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, in capture_gpio_reset()
161 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in capture_gpio_reset()
166 static int mt6358_set_dcxo(struct mt6358_priv *priv, bool enable) in mt6358_set_dcxo() argument
168 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, in mt6358_set_dcxo()
175 static int mt6358_set_clksq(struct mt6358_priv *priv, bool enable) in mt6358_set_clksq() argument
178 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt6358_set_clksq()
183 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt6358_set_clksq()
190 static int mt6358_set_aud_global_bias(struct mt6358_priv *priv, bool enable) in mt6358_set_aud_global_bias() argument
192 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_set_aud_global_bias()
199 static int mt6358_set_topck(struct mt6358_priv *priv, bool enable) in mt6358_set_topck() argument
201 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_set_topck()
206 static int mt6358_mtkaif_tx_enable(struct mt6358_priv *priv) in mt6358_mtkaif_tx_enable() argument
208 switch (priv->mtkaif_protocol) { in mt6358_mtkaif_tx_enable()
211 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
215 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
218 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
224 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
228 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
235 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
239 regmap_update_bits(priv->regmap, in mt6358_mtkaif_tx_enable()
247 static int mt6358_mtkaif_tx_disable(struct mt6358_priv *priv) in mt6358_mtkaif_tx_disable() argument
250 regmap_update_bits(priv->regmap, MT6358_AFE_AUD_PAD_TOP, in mt6358_mtkaif_tx_disable()
257 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt6358_mtkaif_calibration_enable() local
259 playback_gpio_set(priv); in mt6358_mtkaif_calibration_enable()
260 capture_gpio_set(priv); in mt6358_mtkaif_calibration_enable()
261 mt6358_mtkaif_tx_enable(priv); in mt6358_mtkaif_calibration_enable()
263 mt6358_set_dcxo(priv, true); in mt6358_mtkaif_calibration_enable()
264 mt6358_set_aud_global_bias(priv, true); in mt6358_mtkaif_calibration_enable()
265 mt6358_set_clksq(priv, true); in mt6358_mtkaif_calibration_enable()
266 mt6358_set_topck(priv, true); in mt6358_mtkaif_calibration_enable()
269 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_enable()
272 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_enable()
281 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt6358_mtkaif_calibration_disable() local
284 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_disable()
287 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_mtkaif_calibration_disable()
291 mt6358_set_topck(priv, false); in mt6358_mtkaif_calibration_disable()
292 mt6358_set_clksq(priv, false); in mt6358_mtkaif_calibration_disable()
293 mt6358_set_aud_global_bias(priv, false); in mt6358_mtkaif_calibration_disable()
294 mt6358_set_dcxo(priv, false); in mt6358_mtkaif_calibration_disable()
296 mt6358_mtkaif_tx_disable(priv); in mt6358_mtkaif_calibration_disable()
297 playback_gpio_reset(priv); in mt6358_mtkaif_calibration_disable()
298 capture_gpio_reset(priv); in mt6358_mtkaif_calibration_disable()
306 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt6358_set_mtkaif_calibration_phase() local
308 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_set_mtkaif_calibration_phase()
311 regmap_update_bits(priv->regmap, MT6358_AUDIO_DIG_CFG, in mt6358_set_mtkaif_calibration_phase()
331 static void hp_zcd_disable(struct mt6358_priv *priv) in hp_zcd_disable() argument
333 regmap_write(priv->regmap, MT6358_ZCD_CON0, 0x0000); in hp_zcd_disable()
336 static void hp_main_output_ramp(struct mt6358_priv *priv, bool up) in hp_main_output_ramp() argument
344 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in hp_main_output_ramp()
346 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in hp_main_output_ramp()
352 static void hp_aux_feedback_loop_gain_ramp(struct mt6358_priv *priv, bool up) in hp_aux_feedback_loop_gain_ramp() argument
359 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in hp_aux_feedback_loop_gain_ramp()
365 static void hp_pull_down(struct mt6358_priv *priv, bool enable) in hp_pull_down() argument
371 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in hp_pull_down()
377 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in hp_pull_down()
390 static void headset_volume_ramp(struct mt6358_priv *priv, int from, int to) in headset_volume_ramp() argument
395 dev_warn(priv->dev, "%s(), volume index is not valid, from %d, to %d\n", in headset_volume_ramp()
398 dev_info(priv->dev, "%s(), from %d, to %d\n", in headset_volume_ramp()
413 regmap_update_bits(priv->regmap, in headset_volume_ramp()
429 struct mt6358_priv *priv = snd_soc_component_get_drvdata(component); in mt6358_put_volsw() local
441 regmap_read(priv->regmap, MT6358_ZCD_CON2, ®); in mt6358_put_volsw()
442 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL] = in mt6358_put_volsw()
444 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTR] = in mt6358_put_volsw()
448 regmap_read(priv->regmap, MT6358_ZCD_CON1, ®); in mt6358_put_volsw()
449 priv->ana_gain[AUDIO_ANALOG_VOLUME_LINEOUTL] = in mt6358_put_volsw()
451 priv->ana_gain[AUDIO_ANALOG_VOLUME_LINEOUTR] = in mt6358_put_volsw()
455 regmap_read(priv->regmap, MT6358_ZCD_CON3, ®); in mt6358_put_volsw()
456 priv->ana_gain[AUDIO_ANALOG_VOLUME_HSOUTL] = in mt6358_put_volsw()
458 priv->ana_gain[AUDIO_ANALOG_VOLUME_HSOUTR] = in mt6358_put_volsw()
463 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON0, ®); in mt6358_put_volsw()
464 priv->ana_gain[AUDIO_ANALOG_VOLUME_MICAMP1] = in mt6358_put_volsw()
466 regmap_read(priv->regmap, MT6358_AUDENC_ANA_CON1, ®); in mt6358_put_volsw()
467 priv->ana_gain[AUDIO_ANALOG_VOLUME_MICAMP2] = in mt6358_put_volsw()
475 static void mt6358_restore_pga(struct mt6358_priv *priv);
477 static int mt6358_enable_wov_phase2(struct mt6358_priv *priv) in mt6358_enable_wov_phase2() argument
480 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_enable_wov_phase2()
482 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5); in mt6358_enable_wov_phase2()
483 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_enable_wov_phase2()
485 mt6358_restore_pga(priv); in mt6358_enable_wov_phase2()
487 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9929); in mt6358_enable_wov_phase2()
488 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_enable_wov_phase2()
490 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8, in mt6358_enable_wov_phase2()
494 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_enable_wov_phase2()
496 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x0120); in mt6358_enable_wov_phase2()
497 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0xffff); in mt6358_enable_wov_phase2()
498 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0200); in mt6358_enable_wov_phase2()
499 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2424); in mt6358_enable_wov_phase2()
500 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xdbac); in mt6358_enable_wov_phase2()
501 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x029e); in mt6358_enable_wov_phase2()
502 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0000); in mt6358_enable_wov_phase2()
503 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0, in mt6358_enable_wov_phase2()
505 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0, in mt6358_enable_wov_phase2()
507 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0x68d1); in mt6358_enable_wov_phase2()
512 static int mt6358_disable_wov_phase2(struct mt6358_priv *priv) in mt6358_disable_wov_phase2() argument
515 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_TOP, 0xffff, 0xc000); in mt6358_disable_wov_phase2()
516 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_HPF_CFG0, in mt6358_disable_wov_phase2()
518 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_POSDIV_CFG0, in mt6358_disable_wov_phase2()
520 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG5, 0xffff, 0x0100); in mt6358_disable_wov_phase2()
521 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG4, 0xffff, 0x006c); in mt6358_disable_wov_phase2()
522 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG3, 0xffff, 0xa879); in mt6358_disable_wov_phase2()
523 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG2, 0xffff, 0x2323); in mt6358_disable_wov_phase2()
524 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG1, 0xffff, 0x0400); in mt6358_disable_wov_phase2()
525 regmap_update_bits(priv->regmap, MT6358_AFE_VOW_CFG0, 0xffff, 0x0000); in mt6358_disable_wov_phase2()
526 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE3, 0xffff, 0x02d8); in mt6358_disable_wov_phase2()
527 regmap_update_bits(priv->regmap, MT6358_AUD_TOP_CKPDN_CON0, in mt6358_disable_wov_phase2()
531 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON8, in mt6358_disable_wov_phase2()
533 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_disable_wov_phase2()
535 regmap_update_bits(priv->regmap, MT6358_DCXO_CW13, 0xffff, 0x9829); in mt6358_disable_wov_phase2()
536 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_disable_wov_phase2()
538 mt6358_restore_pga(priv); in mt6358_disable_wov_phase2()
539 regmap_update_bits(priv->regmap, MT6358_DCXO_CW14, 0xffff, 0xa2b5); in mt6358_disable_wov_phase2()
540 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt6358_disable_wov_phase2()
550 struct mt6358_priv *priv = snd_soc_component_get_drvdata(c); in mt6358_get_wov() local
552 ucontrol->value.integer.value[0] = priv->wov_enabled; in mt6358_get_wov()
560 struct mt6358_priv *priv = snd_soc_component_get_drvdata(c); in mt6358_put_wov() local
566 if (priv->wov_enabled != enabled) { in mt6358_put_wov()
568 mt6358_enable_wov_phase2(priv); in mt6358_put_wov()
570 mt6358_disable_wov_phase2(priv); in mt6358_put_wov()
572 priv->wov_enabled = enabled; in mt6358_put_wov()
864 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_clksq_event() local
866 dev_dbg(priv->dev, "%s(), event = 0x%x\n", __func__, event); in mt_clksq_event()
871 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON6, in mt_clksq_event()
887 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_sgen_event() local
889 dev_dbg(priv->dev, "%s(), event = 0x%x\n", __func__, event); in mt_sgen_event()
894 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_sgen_event()
896 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_sgen_event()
898 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_sgen_event()
900 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_sgen_event()
902 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG0, in mt_sgen_event()
905 regmap_update_bits(priv->regmap, MT6358_AFE_SGEN_CFG1, in mt_sgen_event()
911 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_sgen_event()
912 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_sgen_event()
926 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_aif_in_event() local
928 dev_info(priv->dev, "%s(), event 0x%x, rate %d\n", in mt_aif_in_event()
929 __func__, event, priv->dl_rate); in mt_aif_in_event()
933 playback_gpio_set(priv); in mt_aif_in_event()
936 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0006); in mt_aif_in_event()
938 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xCBA1); in mt_aif_in_event()
940 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0003); in mt_aif_in_event()
942 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x000B); in mt_aif_in_event()
946 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON2, 0x0000); in mt_aif_in_event()
947 regmap_write(priv->regmap, MT6358_AFUNC_AUD_CON0, 0xcba0); in mt_aif_in_event()
949 playback_gpio_reset(priv); in mt_aif_in_event()
958 static int mtk_hp_enable(struct mt6358_priv *priv) in mtk_hp_enable() argument
961 hp_pull_down(priv, true); in mtk_hp_enable()
963 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_enable()
967 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mtk_hp_enable()
970 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_40DB_REG); in mtk_hp_enable()
973 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mtk_hp_enable()
975 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mtk_hp_enable()
977 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mtk_hp_enable()
979 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mtk_hp_enable()
981 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mtk_hp_enable()
985 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_enable()
988 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mtk_hp_enable()
992 hp_zcd_disable(priv); in mtk_hp_enable()
995 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000); in mtk_hp_enable()
998 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_enable()
1001 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mtk_hp_enable()
1004 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_enable()
1006 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033); in mtk_hp_enable()
1009 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x000c); in mtk_hp_enable()
1011 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x003c); in mtk_hp_enable()
1013 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_enable()
1015 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_enable()
1017 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_enable()
1019 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00fc); in mtk_hp_enable()
1022 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_enable()
1024 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_enable()
1028 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mtk_hp_enable()
1031 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x00ff); in mtk_hp_enable()
1033 hp_main_output_ramp(priv, true); in mtk_hp_enable()
1036 hp_aux_feedback_loop_gain_ramp(priv, true); in mtk_hp_enable()
1038 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_enable()
1041 headset_volume_ramp(priv, in mtk_hp_enable()
1043 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL]); in mtk_hp_enable()
1046 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_enable()
1048 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3f03); in mtk_hp_enable()
1052 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1); in mtk_hp_enable()
1054 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30ff); in mtk_hp_enable()
1056 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0xf201); in mtk_hp_enable()
1060 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x32ff); in mtk_hp_enable()
1062 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3aff); in mtk_hp_enable()
1065 hp_pull_down(priv, false); in mtk_hp_enable()
1070 static int mtk_hp_disable(struct mt6358_priv *priv) in mtk_hp_disable() argument
1073 hp_pull_down(priv, true); in mtk_hp_disable()
1076 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1080 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mtk_hp_disable()
1084 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1088 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0); in mtk_hp_disable()
1091 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_disable()
1093 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_disable()
1096 headset_volume_ramp(priv, in mtk_hp_disable()
1097 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL], in mtk_hp_disable()
1101 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff); in mtk_hp_disable()
1104 hp_aux_feedback_loop_gain_ramp(priv, false); in mtk_hp_disable()
1107 hp_main_output_ramp(priv, false); in mtk_hp_disable()
1110 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_disable()
1113 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0e00); in mtk_hp_disable()
1116 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0c00); in mtk_hp_disable()
1119 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1123 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1127 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_disable()
1131 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000); in mtk_hp_disable()
1134 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1138 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, in mtk_hp_disable()
1142 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mtk_hp_disable()
1146 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0); in mtk_hp_disable()
1148 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_disable()
1151 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, in mtk_hp_disable()
1155 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON2, in mtk_hp_disable()
1159 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_disable()
1162 hp_pull_down(priv, false); in mtk_hp_disable()
1167 static int mtk_hp_spk_enable(struct mt6358_priv *priv) in mtk_hp_spk_enable() argument
1170 hp_pull_down(priv, true); in mtk_hp_spk_enable()
1172 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_spk_enable()
1176 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mtk_hp_spk_enable()
1179 regmap_write(priv->regmap, MT6358_ZCD_CON2, DL_GAIN_N_10DB_REG); in mtk_hp_spk_enable()
1182 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mtk_hp_spk_enable()
1184 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mtk_hp_spk_enable()
1186 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mtk_hp_spk_enable()
1188 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mtk_hp_spk_enable()
1190 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mtk_hp_spk_enable()
1194 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mtk_hp_spk_enable()
1197 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mtk_hp_spk_enable()
1201 hp_zcd_disable(priv); in mtk_hp_spk_enable()
1204 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x3000); in mtk_hp_spk_enable()
1207 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_spk_enable()
1210 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mtk_hp_spk_enable()
1213 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mtk_hp_spk_enable()
1215 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4033); in mtk_hp_spk_enable()
1218 hp_pull_down(priv, false); in mtk_hp_spk_enable()
1221 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30c0); in mtk_hp_spk_enable()
1223 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f0); in mtk_hp_spk_enable()
1225 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0200); in mtk_hp_spk_enable()
1229 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mtk_hp_spk_enable()
1232 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x0003); in mtk_hp_spk_enable()
1234 hp_main_output_ramp(priv, true); in mtk_hp_spk_enable()
1237 regmap_write(priv->regmap, MT6358_ZCD_CON1, DL_GAIN_N_40DB_REG); in mtk_hp_spk_enable()
1239 headset_volume_ramp(priv, in mtk_hp_spk_enable()
1241 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL]); in mtk_hp_spk_enable()
1244 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0110); in mtk_hp_spk_enable()
1246 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0112); in mtk_hp_spk_enable()
1248 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x0113); in mtk_hp_spk_enable()
1251 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_enable()
1253 priv->ana_gain[AUDIO_ANALOG_VOLUME_LINEOUTL] << in mtk_hp_spk_enable()
1255 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_enable()
1257 priv->ana_gain[AUDIO_ANALOG_VOLUME_LINEOUTR] << in mtk_hp_spk_enable()
1261 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x1); in mtk_hp_spk_enable()
1263 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x30f9); in mtk_hp_spk_enable()
1265 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0201); in mtk_hp_spk_enable()
1267 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON7, 0x011b); in mtk_hp_spk_enable()
1269 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x35f9); in mtk_hp_spk_enable()
1274 static int mtk_hp_spk_disable(struct mt6358_priv *priv) in mtk_hp_spk_disable() argument
1277 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1280 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1284 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1288 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, 0x1, 0x0); in mtk_hp_spk_disable()
1291 headset_volume_ramp(priv, in mtk_hp_spk_disable()
1292 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL], in mtk_hp_spk_disable()
1296 regmap_update_bits(priv->regmap, MT6358_ZCD_CON1, in mtk_hp_spk_disable()
1300 hp_main_output_ramp(priv, false); in mtk_hp_spk_disable()
1303 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3, 0x0); in mtk_hp_spk_disable()
1306 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fc3); in mtk_hp_spk_disable()
1308 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fcf); in mtk_hp_spk_disable()
1311 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON1, 0x3fff); in mtk_hp_spk_disable()
1314 hp_aux_feedback_loop_gain_ramp(priv, false); in mtk_hp_spk_disable()
1317 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1320 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1324 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mtk_hp_spk_disable()
1327 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mtk_hp_spk_disable()
1331 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mtk_hp_spk_disable()
1335 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mtk_hp_spk_disable()
1338 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x1, 0x0); in mtk_hp_spk_disable()
1340 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, 0x1055, 0x0); in mtk_hp_spk_disable()
1342 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x1, 0x1); in mtk_hp_spk_disable()
1345 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON4, in mtk_hp_spk_disable()
1348 hp_pull_down(priv, false); in mtk_hp_spk_disable()
1358 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_hp_event() local
1362 dev_info(priv->dev, "%s(), event 0x%x, dev_counter[DEV_HP] %d, mux %u\n", in mt_hp_event()
1365 priv->dev_counter[device], in mt_hp_event()
1370 priv->dev_counter[device]++; in mt_hp_event()
1371 if (priv->dev_counter[device] > 1) in mt_hp_event()
1373 else if (priv->dev_counter[device] <= 0) in mt_hp_event()
1374 dev_warn(priv->dev, "%s(), dev_counter[DEV_HP] %d <= 0\n", in mt_hp_event()
1376 priv->dev_counter[device]); in mt_hp_event()
1378 priv->mux_select[MUX_HP_L] = mux; in mt_hp_event()
1381 mtk_hp_enable(priv); in mt_hp_event()
1383 mtk_hp_spk_enable(priv); in mt_hp_event()
1386 priv->dev_counter[device]--; in mt_hp_event()
1387 if (priv->dev_counter[device] > 0) { in mt_hp_event()
1389 } else if (priv->dev_counter[device] < 0) { in mt_hp_event()
1390 dev_warn(priv->dev, "%s(), dev_counter[DEV_HP] %d < 0\n", in mt_hp_event()
1392 priv->dev_counter[device]); in mt_hp_event()
1393 priv->dev_counter[device] = 0; in mt_hp_event()
1397 if (priv->mux_select[MUX_HP_L] == HP_MUX_HP) in mt_hp_event()
1398 mtk_hp_disable(priv); in mt_hp_event()
1399 else if (priv->mux_select[MUX_HP_L] == HP_MUX_HPSPK) in mt_hp_event()
1400 mtk_hp_spk_disable(priv); in mt_hp_event()
1402 priv->mux_select[MUX_HP_L] = mux; in mt_hp_event()
1416 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_rcv_event() local
1418 dev_info(priv->dev, "%s(), event 0x%x, mux %u\n", in mt_rcv_event()
1426 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON2, 0x4000); in mt_rcv_event()
1429 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON1, 0x0001); in mt_rcv_event()
1431 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON2, 0x002c); in mt_rcv_event()
1433 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON0, 0x0001); in mt_rcv_event()
1435 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON4, 0x0003); in mt_rcv_event()
1437 regmap_write(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, 0x0000); in mt_rcv_event()
1441 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_rcv_event()
1444 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON15, 0x0001); in mt_rcv_event()
1448 hp_zcd_disable(priv); in mt_rcv_event()
1451 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0010); in mt_rcv_event()
1454 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mt_rcv_event()
1456 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON11, 0x4900); in mt_rcv_event()
1459 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON12, 0x0055); in mt_rcv_event()
1461 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0090); in mt_rcv_event()
1464 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0000); in mt_rcv_event()
1467 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON10, 0x0000); in mt_rcv_event()
1470 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0092); in mt_rcv_event()
1472 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x0093); in mt_rcv_event()
1475 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_rcv_event()
1479 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON0, 0x0009); in mt_rcv_event()
1481 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON9, 0x0001); in mt_rcv_event()
1483 regmap_write(priv->regmap, MT6358_AUDDEC_ANA_CON6, 0x009b); in mt_rcv_event()
1487 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1492 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt_rcv_event()
1496 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_rcv_event()
1500 regmap_write(priv->regmap, MT6358_ZCD_CON3, DL_GAIN_N_40DB); in mt_rcv_event()
1503 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1507 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt_rcv_event()
1511 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mt_rcv_event()
1515 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON9, in mt_rcv_event()
1519 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON12, in mt_rcv_event()
1523 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON15, in mt_rcv_event()
1526 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_rcv_event()
1529 regmap_update_bits(priv->regmap, MT6358_AUDNCP_CLKDIV_CON3, in mt_rcv_event()
1544 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_aif_out_event() local
1546 dev_dbg(priv->dev, "%s(), event 0x%x, rate %d\n", in mt_aif_out_event()
1547 __func__, event, priv->ul_rate); in mt_aif_out_event()
1551 capture_gpio_set(priv); in mt_aif_out_event()
1554 capture_gpio_reset(priv); in mt_aif_out_event()
1568 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_adc_supply_event() local
1570 dev_dbg(priv->dev, "%s(), event 0x%x\n", in mt_adc_supply_event()
1576 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_adc_supply_event()
1579 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, in mt_adc_supply_event()
1582 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1585 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1590 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1593 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON14, in mt_adc_supply_event()
1597 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON3, 0x0000); in mt_adc_supply_event()
1599 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON13, in mt_adc_supply_event()
1609 static int mt6358_amic_enable(struct mt6358_priv *priv) in mt6358_amic_enable() argument
1611 unsigned int mic_type = priv->mux_select[MUX_MIC_TYPE]; in mt6358_amic_enable()
1612 unsigned int mux_pga_l = priv->mux_select[MUX_PGA_L]; in mt6358_amic_enable()
1613 unsigned int mux_pga_r = priv->mux_select[MUX_PGA_R]; in mt6358_amic_enable()
1615 dev_info(priv->dev, "%s(), mux, mic %u, pga l %u, pga r %u\n", in mt6358_amic_enable()
1620 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_enable()
1621 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_enable()
1622 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060); in mt6358_amic_enable()
1623 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2061); in mt6358_amic_enable()
1624 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG1, 0x0100); in mt6358_amic_enable()
1632 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1636 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1640 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1645 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON9, in mt6358_amic_enable()
1653 regmap_write(priv->regmap, in mt6358_amic_enable()
1656 regmap_write(priv->regmap, in mt6358_amic_enable()
1662 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1664 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1668 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1670 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1676 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1681 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1687 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1693 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1697 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1704 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1709 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1715 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1721 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1725 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1733 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_enable()
1736 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_enable()
1740 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON3, in mt6358_amic_enable()
1745 mt6358_mtkaif_tx_enable(priv); in mt6358_amic_enable()
1748 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0000); in mt6358_amic_enable()
1751 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0001); in mt6358_amic_enable()
1756 static void mt6358_amic_disable(struct mt6358_priv *priv) in mt6358_amic_disable() argument
1758 unsigned int mic_type = priv->mux_select[MUX_MIC_TYPE]; in mt6358_amic_disable()
1759 unsigned int mux_pga_l = priv->mux_select[MUX_PGA_L]; in mt6358_amic_disable()
1760 unsigned int mux_pga_r = priv->mux_select[MUX_PGA_R]; in mt6358_amic_disable()
1762 dev_info(priv->dev, "%s(), mux, mic %u, pga l %u, pga r %u\n", in mt6358_amic_disable()
1766 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, in mt6358_amic_disable()
1770 mt6358_mtkaif_tx_disable(priv); in mt6358_amic_disable()
1773 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1776 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1779 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1783 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_amic_disable()
1787 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1790 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1793 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1797 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_amic_disable()
1802 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000); in mt6358_amic_disable()
1805 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_amic_disable()
1810 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2060); in mt6358_amic_disable()
1812 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1814 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1816 regmap_write(priv->regmap, MT6358_AFE_DCCLK_CFG0, 0x2062); in mt6358_amic_disable()
1820 static int mt6358_dmic_enable(struct mt6358_priv *priv) in mt6358_dmic_enable() argument
1822 dev_info(priv->dev, "%s()\n", __func__); in mt6358_dmic_enable()
1826 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0021); in mt6358_dmic_enable()
1829 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_dmic_enable()
1833 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0005); in mt6358_dmic_enable()
1836 mt6358_mtkaif_tx_enable(priv); in mt6358_dmic_enable()
1839 if (priv->dmic_one_wire_mode) in mt6358_dmic_enable()
1840 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0400); in mt6358_dmic_enable()
1842 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_H, 0x0080); in mt6358_dmic_enable()
1845 regmap_write(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, 0x0003); in mt6358_dmic_enable()
1853 static void mt6358_dmic_disable(struct mt6358_priv *priv) in mt6358_dmic_disable() argument
1855 dev_info(priv->dev, "%s()\n", __func__); in mt6358_dmic_disable()
1858 regmap_update_bits(priv->regmap, MT6358_AFE_UL_SRC_CON0_L, in mt6358_dmic_disable()
1862 mt6358_mtkaif_tx_disable(priv); in mt6358_dmic_disable()
1865 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON8, 0x0000); in mt6358_dmic_disable()
1869 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0001); in mt6358_dmic_disable()
1872 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON10, in mt6358_dmic_disable()
1876 regmap_write(priv->regmap, MT6358_AUDENC_ANA_CON9, 0x0000); in mt6358_dmic_disable()
1879 static void mt6358_restore_pga(struct mt6358_priv *priv) in mt6358_restore_pga() argument
1883 gain_l = priv->ana_gain[AUDIO_ANALOG_VOLUME_MICAMP1]; in mt6358_restore_pga()
1884 gain_r = priv->ana_gain[AUDIO_ANALOG_VOLUME_MICAMP2]; in mt6358_restore_pga()
1886 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON0, in mt6358_restore_pga()
1889 regmap_update_bits(priv->regmap, MT6358_AUDENC_ANA_CON1, in mt6358_restore_pga()
1899 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_mic_type_event() local
1902 dev_dbg(priv->dev, "%s(), event 0x%x, mux %u\n", in mt_mic_type_event()
1907 priv->mux_select[MUX_MIC_TYPE] = mux; in mt_mic_type_event()
1912 mt6358_dmic_enable(priv); in mt_mic_type_event()
1915 mt6358_amic_enable(priv); in mt_mic_type_event()
1918 mt6358_restore_pga(priv); in mt_mic_type_event()
1922 switch (priv->mux_select[MUX_MIC_TYPE]) { in mt_mic_type_event()
1924 mt6358_dmic_disable(priv); in mt_mic_type_event()
1927 mt6358_amic_disable(priv); in mt_mic_type_event()
1931 priv->mux_select[MUX_MIC_TYPE] = mux; in mt_mic_type_event()
1945 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_adc_l_event() local
1948 dev_dbg(priv->dev, "%s(), event = 0x%x, mux %u\n", in mt_adc_l_event()
1951 priv->mux_select[MUX_ADC_L] = mux; in mt_adc_l_event()
1961 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_adc_r_event() local
1964 dev_dbg(priv->dev, "%s(), event = 0x%x, mux %u\n", in mt_adc_r_event()
1967 priv->mux_select[MUX_ADC_R] = mux; in mt_adc_r_event()
1977 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_pga_left_event() local
1980 dev_dbg(priv->dev, "%s(), event = 0x%x, mux %u\n", in mt_pga_left_event()
1983 priv->mux_select[MUX_PGA_L] = mux; in mt_pga_left_event()
1993 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt_pga_right_event() local
1996 dev_dbg(priv->dev, "%s(), event = 0x%x, mux %u\n", in mt_pga_right_event()
1999 priv->mux_select[MUX_PGA_R] = mux; in mt_pga_right_event()
2321 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt6358_codec_dai_hw_params() local
2324 dev_info(priv->dev, "%s(), substream->stream %d, rate %d, number %d\n", in mt6358_codec_dai_hw_params()
2331 priv->dl_rate = rate; in mt6358_codec_dai_hw_params()
2333 priv->ul_rate = rate; in mt6358_codec_dai_hw_params()
2372 static void mt6358_codec_init_reg(struct mt6358_priv *priv) in mt6358_codec_init_reg() argument
2375 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt6358_codec_init_reg()
2378 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON0, in mt6358_codec_init_reg()
2382 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON6, in mt6358_codec_init_reg()
2386 regmap_update_bits(priv->regmap, MT6358_AUDDEC_ANA_CON7, in mt6358_codec_init_reg()
2391 regmap_update_bits(priv->regmap, MT6358_ACCDET_CON13, in mt6358_codec_init_reg()
2395 regmap_write(priv->regmap, MT6358_DRV_CON3, 0x8888); in mt6358_codec_init_reg()
2398 playback_gpio_reset(priv); in mt6358_codec_init_reg()
2399 capture_gpio_reset(priv); in mt6358_codec_init_reg()
2404 struct mt6358_priv *priv = snd_soc_component_get_drvdata(cmpnt); in mt6358_codec_probe() local
2407 snd_soc_component_init_regmap(cmpnt, priv->regmap); in mt6358_codec_probe()
2409 mt6358_codec_init_reg(priv); in mt6358_codec_probe()
2411 priv->avdd_reg = devm_regulator_get(priv->dev, "Avdd"); in mt6358_codec_probe()
2412 if (IS_ERR(priv->avdd_reg)) { in mt6358_codec_probe()
2413 dev_err(priv->dev, "%s() have no Avdd supply", __func__); in mt6358_codec_probe()
2414 return PTR_ERR(priv->avdd_reg); in mt6358_codec_probe()
2417 ret = regulator_enable(priv->avdd_reg); in mt6358_codec_probe()
2435 static void mt6358_parse_dt(struct mt6358_priv *priv) in mt6358_parse_dt() argument
2438 struct device *dev = priv->dev; in mt6358_parse_dt()
2441 &priv->dmic_one_wire_mode); in mt6358_parse_dt()
2443 dev_warn(priv->dev, "%s() failed to read dmic-mode\n", in mt6358_parse_dt()
2445 priv->dmic_one_wire_mode = 0; in mt6358_parse_dt()
2451 struct mt6358_priv *priv; in mt6358_platform_driver_probe() local
2454 priv = devm_kzalloc(&pdev->dev, in mt6358_platform_driver_probe()
2457 if (!priv) in mt6358_platform_driver_probe()
2460 dev_set_drvdata(&pdev->dev, priv); in mt6358_platform_driver_probe()
2462 priv->dev = &pdev->dev; in mt6358_platform_driver_probe()
2464 priv->regmap = mt6397->regmap; in mt6358_platform_driver_probe()
2465 if (IS_ERR(priv->regmap)) in mt6358_platform_driver_probe()
2466 return PTR_ERR(priv->regmap); in mt6358_platform_driver_probe()
2468 mt6358_parse_dt(priv); in mt6358_platform_driver_probe()
2470 dev_info(priv->dev, "%s(), dev name %s\n", in mt6358_platform_driver_probe()