Lines Matching refs:afe
221 static int mt8188_afe_setup_apll_tuner(struct mtk_base_afe *afe, unsigned int id) in mt8188_afe_setup_apll_tuner() argument
228 regmap_update_bits(afe->regmap, in mt8188_afe_setup_apll_tuner()
233 regmap_update_bits(afe->regmap, in mt8188_afe_setup_apll_tuner()
238 regmap_update_bits(afe->regmap, in mt8188_afe_setup_apll_tuner()
246 static int mt8188_afe_enable_tuner_clk(struct mtk_base_afe *afe, in mt8188_afe_enable_tuner_clk() argument
249 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_tuner_clk()
253 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]); in mt8188_afe_enable_tuner_clk()
254 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]); in mt8188_afe_enable_tuner_clk()
257 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]); in mt8188_afe_enable_tuner_clk()
258 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]); in mt8188_afe_enable_tuner_clk()
267 static int mt8188_afe_disable_tuner_clk(struct mtk_base_afe *afe, in mt8188_afe_disable_tuner_clk() argument
270 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_tuner_clk()
274 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL1_TUNER]); in mt8188_afe_disable_tuner_clk()
275 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL]); in mt8188_afe_disable_tuner_clk()
278 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2_TUNER]); in mt8188_afe_disable_tuner_clk()
279 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_APLL2]); in mt8188_afe_disable_tuner_clk()
288 static int mt8188_afe_enable_apll_tuner(struct mtk_base_afe *afe, unsigned int id) in mt8188_afe_enable_apll_tuner() argument
297 ret = mt8188_afe_setup_apll_tuner(afe, id); in mt8188_afe_enable_apll_tuner()
301 ret = mt8188_afe_enable_tuner_clk(afe, id); in mt8188_afe_enable_apll_tuner()
309 regmap_update_bits(afe->regmap, in mt8188_afe_enable_apll_tuner()
319 static int mt8188_afe_disable_apll_tuner(struct mtk_base_afe *afe, unsigned int id) in mt8188_afe_disable_apll_tuner() argument
332 regmap_update_bits(afe->regmap, in mt8188_afe_disable_apll_tuner()
341 ret = mt8188_afe_disable_tuner_clk(afe, id); in mt8188_afe_disable_apll_tuner()
362 int mt8188_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll) in mt8188_afe_get_mclk_source_rate() argument
364 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_get_mclk_source_rate()
368 dev_dbg(afe->dev, "invalid clk id\n"); in mt8188_afe_get_mclk_source_rate()
381 int mt8188_afe_init_clock(struct mtk_base_afe *afe) in mt8188_afe_init_clock() argument
383 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_init_clock()
386 ret = mt8188_audsys_clk_register(afe); in mt8188_afe_init_clock()
388 dev_err(afe->dev, "register audsys clk fail %d\n", ret); in mt8188_afe_init_clock()
393 devm_kcalloc(afe->dev, MT8188_CLK_NUM, sizeof(*afe_priv->clk), in mt8188_afe_init_clock()
399 afe_priv->clk[i] = devm_clk_get(afe->dev, aud_clks[i]); in mt8188_afe_init_clock()
401 dev_err(afe->dev, "%s(), devm_clk_get %s fail, ret %ld\n", in mt8188_afe_init_clock()
412 dev_info(afe->dev, "%s(), init apll_tuner%d failed", in mt8188_afe_init_clock()
423 struct mtk_base_afe *afe = priv; in mt8188_afe_deinit_clock() local
425 mt8188_audsys_clk_unregister(afe); in mt8188_afe_deinit_clock()
428 int mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk) in mt8188_afe_enable_clk() argument
435 dev_dbg(afe->dev, "%s(), failed to enable clk\n", in mt8188_afe_enable_clk()
440 dev_dbg(afe->dev, "NULL clk\n"); in mt8188_afe_enable_clk()
446 void mt8188_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk) in mt8188_afe_disable_clk() argument
451 dev_dbg(afe->dev, "NULL clk\n"); in mt8188_afe_disable_clk()
455 int mt8188_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, in mt8188_afe_set_clk_rate() argument
463 dev_dbg(afe->dev, "%s(), failed to set clk rate\n", in mt8188_afe_set_clk_rate()
472 int mt8188_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, in mt8188_afe_set_clk_parent() argument
480 dev_dbg(afe->dev, "%s(), failed to set clk parent\n", in mt8188_afe_set_clk_parent()
539 static int mt8188_afe_enable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type) in mt8188_afe_enable_top_cg() argument
545 regmap_update_bits(afe->regmap, reg, mask, val); in mt8188_afe_enable_top_cg()
550 static int mt8188_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type) in mt8188_afe_disable_top_cg() argument
556 regmap_update_bits(afe->regmap, reg, mask, val); in mt8188_afe_disable_top_cg()
561 int mt8188_afe_enable_reg_rw_clk(struct mtk_base_afe *afe) in mt8188_afe_enable_reg_rw_clk() argument
563 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_reg_rw_clk()
566 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]); in mt8188_afe_enable_reg_rw_clk()
569 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]); in mt8188_afe_enable_reg_rw_clk()
572 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]); in mt8188_afe_enable_reg_rw_clk()
575 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]); in mt8188_afe_enable_reg_rw_clk()
576 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]); in mt8188_afe_enable_reg_rw_clk()
577 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_enable_reg_rw_clk()
582 int mt8188_afe_disable_reg_rw_clk(struct mtk_base_afe *afe) in mt8188_afe_disable_reg_rw_clk() argument
584 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_reg_rw_clk()
586 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_disable_reg_rw_clk()
587 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS_HP]); in mt8188_afe_disable_reg_rw_clk()
588 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE]); in mt8188_afe_disable_reg_rw_clk()
589 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_ADSP_AUDIO_26M]); in mt8188_afe_disable_reg_rw_clk()
590 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUD_INTBUS_SEL]); in mt8188_afe_disable_reg_rw_clk()
591 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_TOP_AUDIO_LOCAL_BUS_SEL]); in mt8188_afe_disable_reg_rw_clk()
596 static int mt8188_afe_enable_afe_on(struct mtk_base_afe *afe) in mt8188_afe_enable_afe_on() argument
598 regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1); in mt8188_afe_enable_afe_on()
602 static int mt8188_afe_disable_afe_on(struct mtk_base_afe *afe) in mt8188_afe_disable_afe_on() argument
604 regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x0); in mt8188_afe_disable_afe_on()
608 static int mt8188_afe_enable_timing_sys(struct mtk_base_afe *afe) in mt8188_afe_enable_timing_sys() argument
610 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_enable_timing_sys()
612 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_enable_timing_sys()
613 mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]); in mt8188_afe_enable_timing_sys()
615 mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_A1SYS_TIMING); in mt8188_afe_enable_timing_sys()
616 mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_A2SYS_TIMING); in mt8188_afe_enable_timing_sys()
617 mt8188_afe_enable_top_cg(afe, MT8188_TOP_CG_26M_TIMING); in mt8188_afe_enable_timing_sys()
622 static int mt8188_afe_disable_timing_sys(struct mtk_base_afe *afe) in mt8188_afe_disable_timing_sys() argument
624 struct mt8188_afe_private *afe_priv = afe->platform_priv; in mt8188_afe_disable_timing_sys()
626 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A1SYS]); in mt8188_afe_disable_timing_sys()
627 mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_A2SYS]); in mt8188_afe_disable_timing_sys()
629 mt8188_afe_disable_top_cg(afe, MT8188_TOP_CG_26M_TIMING); in mt8188_afe_disable_timing_sys()
630 mt8188_afe_disable_top_cg(afe, MT8188_TOP_CG_A2SYS_TIMING); in mt8188_afe_disable_timing_sys()
631 mt8188_afe_disable_top_cg(afe, MT8188_TOP_CG_A1SYS_TIMING); in mt8188_afe_disable_timing_sys()
636 int mt8188_afe_enable_main_clock(struct mtk_base_afe *afe) in mt8188_afe_enable_main_clock() argument
638 mt8188_afe_enable_timing_sys(afe); in mt8188_afe_enable_main_clock()
640 mt8188_afe_enable_afe_on(afe); in mt8188_afe_enable_main_clock()
642 mt8188_afe_enable_apll_tuner(afe, MT8188_AUD_PLL1); in mt8188_afe_enable_main_clock()
643 mt8188_afe_enable_apll_tuner(afe, MT8188_AUD_PLL2); in mt8188_afe_enable_main_clock()
648 int mt8188_afe_disable_main_clock(struct mtk_base_afe *afe) in mt8188_afe_disable_main_clock() argument
650 mt8188_afe_disable_apll_tuner(afe, MT8188_AUD_PLL2); in mt8188_afe_disable_main_clock()
651 mt8188_afe_disable_apll_tuner(afe, MT8188_AUD_PLL1); in mt8188_afe_disable_main_clock()
653 mt8188_afe_disable_afe_on(afe); in mt8188_afe_disable_main_clock()
655 mt8188_afe_disable_timing_sys(afe); in mt8188_afe_disable_main_clock()