Lines Matching refs:Q6PRM_CLK
14 #define Q6PRM_CLK(id) { \ macro
22 Q6PRM_CLK(LPASS_CLK_ID_PRI_MI2S_IBIT),
23 Q6PRM_CLK(LPASS_CLK_ID_PRI_MI2S_EBIT),
24 Q6PRM_CLK(LPASS_CLK_ID_SEC_MI2S_IBIT),
25 Q6PRM_CLK(LPASS_CLK_ID_SEC_MI2S_EBIT),
26 Q6PRM_CLK(LPASS_CLK_ID_TER_MI2S_IBIT),
27 Q6PRM_CLK(LPASS_CLK_ID_TER_MI2S_EBIT),
28 Q6PRM_CLK(LPASS_CLK_ID_QUAD_MI2S_IBIT),
29 Q6PRM_CLK(LPASS_CLK_ID_QUAD_MI2S_EBIT),
30 Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_IBIT),
31 Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_EBIT),
32 Q6PRM_CLK(LPASS_CLK_ID_SPEAKER_I2S_OSR),
33 Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_IBIT),
34 Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_EBIT),
35 Q6PRM_CLK(LPASS_CLK_ID_SEN_MI2S_IBIT),
36 Q6PRM_CLK(LPASS_CLK_ID_SEN_MI2S_EBIT),
37 Q6PRM_CLK(LPASS_CLK_ID_INT0_MI2S_IBIT),
38 Q6PRM_CLK(LPASS_CLK_ID_INT1_MI2S_IBIT),
39 Q6PRM_CLK(LPASS_CLK_ID_INT2_MI2S_IBIT),
40 Q6PRM_CLK(LPASS_CLK_ID_INT3_MI2S_IBIT),
41 Q6PRM_CLK(LPASS_CLK_ID_INT4_MI2S_IBIT),
42 Q6PRM_CLK(LPASS_CLK_ID_INT5_MI2S_IBIT),
43 Q6PRM_CLK(LPASS_CLK_ID_INT6_MI2S_IBIT),
44 Q6PRM_CLK(LPASS_CLK_ID_QUI_MI2S_OSR),
45 Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_MCLK),
46 Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_NPL_MCLK),
47 Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_MCLK),
48 Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_MCLK),
49 Q6PRM_CLK(LPASS_CLK_ID_TX_CORE_NPL_MCLK),
50 Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK),
51 Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_NPL_MCLK),
52 Q6PRM_CLK(LPASS_CLK_ID_VA_CORE_2X_MCLK),
53 Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_MCLK),
54 Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_2X_MCLK),
55 Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_TX_MCLK),
56 Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_TX_2X_MCLK),
57 Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_TX_MCLK),
58 Q6PRM_CLK(LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK),
59 Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_MCLK),
60 Q6PRM_CLK(LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK),
61 Q6PRM_CLK(LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK),