Lines Matching refs:sdev
41 struct snd_sof_dev *sdev = adata->dev; in init_dma_descriptor() local
42 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in init_dma_descriptor()
45 addr = desc->sram_pte_offset + sdev->debug_box.offset + in init_dma_descriptor()
48 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DESC_BASE_ADDR, addr); in init_dma_descriptor()
49 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DESC_MAX_NUM_DSCR, ACP_MAX_DESC_CNT); in init_dma_descriptor()
55 struct snd_sof_dev *sdev = adata->dev; in configure_dma_descriptor() local
58 offset = ACP_SCRATCH_REG_0 + sdev->debug_box.offset + in configure_dma_descriptor()
62 snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset, dscr_info->src_addr); in configure_dma_descriptor()
63 snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset + 0x4, dscr_info->dest_addr); in configure_dma_descriptor()
64 snd_sof_dsp_write(sdev, ACP_DSP_BAR, offset + 0x8, dscr_info->tx_cnt.u32_all); in configure_dma_descriptor()
70 struct snd_sof_dev *sdev = adata->dev; in config_dma_channel() local
74 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32), in config_dma_channel()
77 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_DMA_CH_RST_STS, val, in config_dma_channel()
81 status = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_ERROR_STATUS); in config_dma_channel()
82 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_ERR_STS_0 + ch * sizeof(u32)); in config_dma_channel()
84 dev_err(sdev->dev, "ACP_DMA_ERR_STS :0x%x ACP_ERROR_STATUS :0x%x\n", val, status); in config_dma_channel()
88 snd_sof_dsp_write(sdev, ACP_DSP_BAR, (ACP_DMA_CNTL_0 + ch * sizeof(u32)), 0); in config_dma_channel()
89 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DSCR_CNT_0 + ch * sizeof(u32), dscr_count); in config_dma_channel()
90 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_DSCR_STRT_IDX_0 + ch * sizeof(u32), idx); in config_dma_channel()
91 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_PRIO_0 + ch * sizeof(u32), 0); in config_dma_channel()
92 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32), ACP_DMA_CH_RUN); in config_dma_channel()
100 struct snd_sof_dev *sdev = adata->dev; in acpbus_dma_start() local
112 dev_err(sdev->dev, "config dma ch failed:%d\n", ret); in acpbus_dma_start()
120 struct snd_sof_dev *sdev = adata->dev; in configure_and_run_dma() local
135 dev_err(sdev->dev, "acpbus_dma_start failed\n"); in configure_and_run_dma()
152 struct snd_sof_dev *sdev = adata->dev; in psp_mbox_ready() local
163 dev_err(sdev->dev, "PSP error status %x\n", data & MBOX_STATUS_MASK); in psp_mbox_ready()
179 struct snd_sof_dev *sdev = adata->dev; in psp_send_cmd() local
195 dev_err(sdev->dev, "Failed to get Doorbell from MBOX %x\n", MP0_C2PMSG_73_REG); in psp_send_cmd()
219 struct snd_sof_dev *sdev = adata->dev; in configure_and_run_sha_dma() local
224 dev_err(sdev->dev, "SHA DMA image address is NULL\n"); in configure_and_run_sha_dma()
228 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD); in configure_and_run_sha_dma()
230 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD, ACP_SHA_RESET); in configure_and_run_sha_dma()
231 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD_STS, in configure_and_run_sha_dma()
236 dev_err(sdev->dev, "SHA DMA Failed to Reset\n"); in configure_and_run_sha_dma()
241 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_STRT_ADDR, start_addr); in configure_and_run_sha_dma()
242 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_DESTINATION_ADDR, dest_addr); in configure_and_run_sha_dma()
243 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_MSG_LENGTH, image_length); in configure_and_run_sha_dma()
244 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_CMD, ACP_SHA_RUN); in configure_and_run_sha_dma()
246 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_TRANSFER_BYTE_CNT, in configure_and_run_sha_dma()
250 dev_err(sdev->dev, "SHA DMA Failed to Transfer Length %x\n", tx_count); in configure_and_run_sha_dma()
258 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SHA_DSP_FW_QUALIFIER, in configure_and_run_sha_dma()
262 dev_err(sdev->dev, "PSP validation failed\n"); in configure_and_run_sha_dma()
271 struct snd_sof_dev *sdev = adata->dev; in acp_dma_status() local
275 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, ACP_DMA_CNTL_0 + ch * sizeof(u32)); in acp_dma_status()
277 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_DMA_CH_STS, val, !val, in acp_dma_status()
281 dev_err(sdev->dev, "DMA_CHANNEL %d status timeout\n", ch); in acp_dma_status()
287 void memcpy_from_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *dst, size_t bytes) in memcpy_from_scratch() argument
293 dst[j] = snd_sof_dsp_read(sdev, ACP_DSP_BAR, reg_offset + i); in memcpy_from_scratch()
296 void memcpy_to_scratch(struct snd_sof_dev *sdev, u32 offset, unsigned int *src, size_t bytes) in memcpy_to_scratch() argument
302 snd_sof_dsp_write(sdev, ACP_DSP_BAR, reg_offset + i, src[j]); in memcpy_to_scratch()
305 static int acp_memory_init(struct snd_sof_dev *sdev) in acp_memory_init() argument
307 struct acp_dev_data *adata = sdev->pdata->hw_pdata; in acp_memory_init()
308 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in acp_memory_init()
310 snd_sof_dsp_update_bits(sdev, ACP_DSP_BAR, desc->dsp_intr_base + DSP_SW_INTR_CNTL_OFFSET, in acp_memory_init()
319 struct snd_sof_dev *sdev = context; in acp_irq_thread() local
320 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in acp_irq_thread()
323 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->ext_intr_stat); in acp_irq_thread()
326 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat, val); in acp_irq_thread()
330 while (snd_sof_dsp_read(sdev, ACP_DSP_BAR, desc->hw_semaphore_offset)) { in acp_irq_thread()
334 dev_err(sdev->dev, "%s: Failed to acquire HW lock\n", __func__); in acp_irq_thread()
339 sof_ops(sdev)->irq_thread(irq, sdev); in acp_irq_thread()
341 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->hw_semaphore_offset, 0x0); in acp_irq_thread()
348 struct snd_sof_dev *sdev = dev_id; in acp_irq_handler() local
349 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in acp_irq_handler()
353 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + DSP_SW_INTR_STAT_OFFSET); in acp_irq_handler()
356 snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + DSP_SW_INTR_STAT_OFFSET, val); in acp_irq_handler()
363 static int acp_power_on(struct snd_sof_dev *sdev) in acp_power_on() argument
365 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in acp_power_on()
370 val = snd_sof_dsp_read(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET); in acp_power_on()
376 snd_sof_dsp_write(sdev, ACP_DSP_BAR, base + PGFSM_CONTROL_OFFSET, in acp_power_on()
379 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, base + PGFSM_STATUS_OFFSET, val, in acp_power_on()
382 dev_err(sdev->dev, "timeout in ACP_PGFSM_STATUS read\n"); in acp_power_on()
387 static int acp_reset(struct snd_sof_dev *sdev) in acp_reset() argument
389 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in acp_reset()
393 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, ACP_ASSERT_RESET); in acp_reset()
395 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, val, in acp_reset()
399 dev_err(sdev->dev, "timeout asserting reset\n"); in acp_reset()
403 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, ACP_RELEASE_RESET); in acp_reset()
405 ret = snd_sof_dsp_read_poll_timeout(sdev, ACP_DSP_BAR, ACP_SOFT_RESET, val, !val, in acp_reset()
408 dev_err(sdev->dev, "timeout in releasing reset\n"); in acp_reset()
410 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK); in acp_reset()
414 static int acp_init(struct snd_sof_dev *sdev) in acp_init() argument
419 ret = acp_power_on(sdev); in acp_init()
421 dev_err(sdev->dev, "ACP power on failed\n"); in acp_init()
425 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x01); in acp_init()
427 return acp_reset(sdev); in acp_init()
430 int amd_sof_acp_suspend(struct snd_sof_dev *sdev, u32 target_state) in amd_sof_acp_suspend() argument
434 ret = acp_reset(sdev); in amd_sof_acp_suspend()
436 dev_err(sdev->dev, "ACP Reset failed\n"); in amd_sof_acp_suspend()
440 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_CONTROL, 0x00); in amd_sof_acp_suspend()
446 int amd_sof_acp_resume(struct snd_sof_dev *sdev) in amd_sof_acp_resume() argument
448 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); in amd_sof_acp_resume()
451 ret = acp_init(sdev); in amd_sof_acp_resume()
453 dev_err(sdev->dev, "ACP Init failed\n"); in amd_sof_acp_resume()
457 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_clkmux_sel, ACP_CLOCK_ACLK); in amd_sof_acp_resume()
459 ret = acp_memory_init(sdev); in amd_sof_acp_resume()
465 int amd_sof_acp_probe(struct snd_sof_dev *sdev) in amd_sof_acp_probe() argument
467 struct pci_dev *pci = to_pci_dev(sdev->dev); in amd_sof_acp_probe()
473 adata = devm_kzalloc(sdev->dev, sizeof(struct acp_dev_data), in amd_sof_acp_probe()
478 adata->dev = sdev; in amd_sof_acp_probe()
480 sdev->bar[ACP_DSP_BAR] = devm_ioremap(sdev->dev, addr, pci_resource_len(pci, ACP_DSP_BAR)); in amd_sof_acp_probe()
481 if (!sdev->bar[ACP_DSP_BAR]) { in amd_sof_acp_probe()
482 dev_err(sdev->dev, "ioremap error\n"); in amd_sof_acp_probe()
488 sdev->pdata->hw_pdata = adata; in amd_sof_acp_probe()
490 chip = get_chip_info(sdev->pdata); in amd_sof_acp_probe()
492 dev_err(sdev->dev, "no such device supported, chip id:%x\n", pci->device); in amd_sof_acp_probe()
498 dev_err(sdev->dev, "Failed to get host bridge device\n"); in amd_sof_acp_probe()
502 sdev->ipc_irq = pci->irq; in amd_sof_acp_probe()
503 ret = request_threaded_irq(sdev->ipc_irq, acp_irq_handler, acp_irq_thread, in amd_sof_acp_probe()
504 IRQF_SHARED, "AudioDSP", sdev); in amd_sof_acp_probe()
506 dev_err(sdev->dev, "failed to register IRQ %d\n", in amd_sof_acp_probe()
507 sdev->ipc_irq); in amd_sof_acp_probe()
512 ret = acp_init(sdev); in amd_sof_acp_probe()
514 free_irq(sdev->ipc_irq, sdev); in amd_sof_acp_probe()
519 sdev->dsp_box.offset = 0; in amd_sof_acp_probe()
520 sdev->dsp_box.size = BOX_SIZE_512; in amd_sof_acp_probe()
522 sdev->host_box.offset = sdev->dsp_box.offset + sdev->dsp_box.size; in amd_sof_acp_probe()
523 sdev->host_box.size = BOX_SIZE_512; in amd_sof_acp_probe()
525 sdev->debug_box.offset = sdev->host_box.offset + sdev->host_box.size; in amd_sof_acp_probe()
526 sdev->debug_box.size = BOX_SIZE_1024; in amd_sof_acp_probe()
528 acp_memory_init(sdev); in amd_sof_acp_probe()
530 acp_dsp_stream_init(sdev); in amd_sof_acp_probe()
536 int amd_sof_acp_remove(struct snd_sof_dev *sdev) in amd_sof_acp_remove() argument
538 struct acp_dev_data *adata = sdev->pdata->hw_pdata; in amd_sof_acp_remove()
543 if (sdev->ipc_irq) in amd_sof_acp_remove()
544 free_irq(sdev->ipc_irq, sdev); in amd_sof_acp_remove()
546 return acp_reset(sdev); in amd_sof_acp_remove()