Lines Matching refs:reg_off
787 u32 reg_off = i * TEGRA210_MBDRC_FILTER_PARAM_STRIDE; in tegra210_mbdrc_hw_params() local
790 reg_off + TEGRA210_MBDRC_CFG_RAM_CTRL, in tegra210_mbdrc_hw_params()
791 reg_off + TEGRA210_MBDRC_CFG_RAM_DATA, in tegra210_mbdrc_hw_params()
849 u32 reg_off = i * TEGRA210_MBDRC_FILTER_PARAM_STRIDE; in tegra210_mbdrc_component_init() local
852 reg_off + TEGRA210_MBDRC_IIR_CFG, in tegra210_mbdrc_component_init()
858 reg_off + TEGRA210_MBDRC_IN_ATTACK, in tegra210_mbdrc_component_init()
864 reg_off + TEGRA210_MBDRC_IN_RELEASE, in tegra210_mbdrc_component_init()
870 reg_off + TEGRA210_MBDRC_FAST_ATTACK, in tegra210_mbdrc_component_init()
889 reg_off + TEGRA210_MBDRC_IN_THRESHOLD, in tegra210_mbdrc_component_init()
906 reg_off + TEGRA210_MBDRC_OUT_THRESHOLD, in tegra210_mbdrc_component_init()
910 reg_off + TEGRA210_MBDRC_RATIO_1ST, in tegra210_mbdrc_component_init()
915 reg_off + TEGRA210_MBDRC_RATIO_2ND, in tegra210_mbdrc_component_init()
920 reg_off + TEGRA210_MBDRC_RATIO_3RD, in tegra210_mbdrc_component_init()
925 reg_off + TEGRA210_MBDRC_RATIO_4TH, in tegra210_mbdrc_component_init()
930 reg_off + TEGRA210_MBDRC_RATIO_5TH, in tegra210_mbdrc_component_init()
935 reg_off + TEGRA210_MBDRC_MAKEUP_GAIN, in tegra210_mbdrc_component_init()
941 reg_off + TEGRA210_MBDRC_INIT_GAIN, in tegra210_mbdrc_component_init()
947 reg_off + TEGRA210_MBDRC_GAIN_ATTACK, in tegra210_mbdrc_component_init()
953 reg_off + TEGRA210_MBDRC_GAIN_RELEASE, in tegra210_mbdrc_component_init()
959 reg_off + TEGRA210_MBDRC_FAST_RELEASE, in tegra210_mbdrc_component_init()
965 reg_off + TEGRA210_MBDRC_CFG_RAM_CTRL, in tegra210_mbdrc_component_init()
966 reg_off + TEGRA210_MBDRC_CFG_RAM_DATA, 0, in tegra210_mbdrc_component_init()