Lines Matching refs:writel
98 writel(BASE_CLK_SEL(CLK_PLL1), BASE_PERIPH_CLK); in swd_init()
102 writel(CFG_OUT_GPIO | CFG_OE_GPIO, SGPIO_OUT_CFG(15)); in swd_init()
104 writel(CFG_OUT_GPIO | CFG_OE_GPIO, SGPIO_OUT_CFG(14)); in swd_init()
106 writel(CFG_OUT_GPIO | CFG_OE_GPIO, SGPIO_OUT_CFG(11)); in swd_init()
109 writel((1 << 11) | (1 << 14) | (1 << 15), SGPIO_OUT); in swd_init()
110 writel((1 << 11) | (1 << 14) | (1 << 15), SGPIO_OEN); in swd_init()
112 writel(0, M4_TXEV); in swd_init()
113 writel(M0_SUB_RST, RESET_CTRL0); in swd_init()
114 writel(0x18000000, M0SUB_ZEROMAP); in swd_init()
115 writel(0xffffffff, 0x18004000); in swd_init()
121 writel(0, RESET_CTRL0); in swd_init()
128 writel(M0_CMD_WRITE_BLIND, COMM_CMD); in swd_write()
130 writel(M0_CMD_WRITE, COMM_CMD); in swd_write()
132 writel((hdr << 8) | (p << 16), COMM_ARG1); in swd_write()
134 writel(data, COMM_ARG2); in swd_write()
135 writel(RSP_BUSY, COMM_RESP); in swd_write()
145 writel(M0_CMD_READ, COMM_CMD); in swd_read()
146 writel(hdr << 8, COMM_ARG1); in swd_read()
147 writel(RSP_BUSY, COMM_RESP); in swd_read()
175 writel(kind, COMM_CMD); in swd_reset()
176 writel(RSP_BUSY, COMM_RESP); in swd_reset()
192 writel(M0_CMD_SETCLOCK, COMM_CMD); in swd_set_clock()
193 writel(khz/1000, COMM_ARG1); in swd_set_clock()
194 writel(RSP_BUSY, COMM_RESP); in swd_set_clock()