Lines Matching refs:writel
67 writel(0xFF, DMA_INTTCCLR); in lpc43xx_DMA_IRQ()
68 writel(0xFF, DMA_INTERRCLR); in lpc43xx_DMA_IRQ()
100 writel((readl(DMAMUX_REG) & DMAMUX_M(4)) | DMAMUX_P(4, P4_UART1_RX), DMAMUX_REG); in swo_init()
101 writel(DMA_CONFIG_EN, DMA_CONFIG); in swo_init()
109 writel(UART1_BASE + REG_RBR, DMA_SRC(0)); in swo_start_dma()
110 writel((u32) ptr, DMA_DST(0)); in swo_start_dma()
111 writel(0, DMA_LLI(0)); in swo_start_dma()
112 writel(DMA_XFER_SIZE(TXNSIZE) | in swo_start_dma()
117 writel(DMA_ENABLE | DMA_SRC_PERIPH(4) | DMA_FLOW_P2M_DMAc | DMA_TC_IRQ_EN, in swo_start_dma()
123 writel(BASE_CLK_SEL(__lpc43xx_main_clock_sel), BASE_UART_CLK); in swo_config()
124 writel(LCR_DLAB, UART_BASE + REG_LCR); in swo_config()
125 writel(div & 0xFF, UART_BASE + REG_DLL); in swo_config()
126 writel((div >> 8) & 0xFF, UART_BASE + REG_DLM); in swo_config()
127 writel(LCR_WLS_8 | LCR_SBS_1, UART_BASE + REG_LCR); in swo_config()
128 writel(FCR_FIFOEN | FCR_RX_TRIG_1 | FCR_DMAMODE, UART_BASE + REG_FCR); in swo_config()