Lines Matching refs:tmp
12 tmp .req x9 label
39 mrs tmp, sctlr_el1
40 orr tmp, tmp, #(1<<12) /* Enable icache */
41 orr tmp, tmp, #(1<<2) /* Enable dcache/ucache */
42 orr tmp, tmp, #(1<<3) /* Enable Stack Alignment Check EL1 */
43 orr tmp, tmp, #(1<<4) /* Enable Stack Alignment Check EL0 */
44 bic tmp, tmp, #(1<<1) /* Disable Alignment Checking for EL1 EL0 */
45 msr sctlr_el1, tmp
64 mov tmp, #0
68 str xzr, [page_table1, tmp, lsl #3]
69 add tmp, tmp, #1
70 cmp tmp, #MMU_KERNEL_PAGE_TABLE_ENTRIES_TOP
80 ldp size, tmp, [mmu_initial_mapping, #__MMU_INITIAL_MAPPING_SIZE_OFFSET]
82 tbzmask tmp, MMU_INITIAL_MAPPING_FLAG_DYNAMIC, .Lnot_dynamic
94 tbzmask tmp, MMU_INITIAL_MAPPING_FLAG_UNCACHED, .Lnot_uncached
100 tbzmask tmp, MMU_INITIAL_MAPPING_FLAG_DEVICE, .Lnot_device
122 ldr tmp, =__code_start
123 subs size, tmp, vaddr
128 ldr tmp, =__rodata_start
129 subs size, tmp, vaddr
132 ldr tmp, =__data_start
133 subs size, tmp, vaddr
136 ldr tmp, =_end
137 subs size, tmp, vaddr
148 orr tmp, vaddr, paddr
149 orr tmp, tmp, size
150 tst tmp, #(1 << MMU_KERNEL_PAGE_SIZE_SHIFT) - 1
178 lsr tmp, tmp2, idx_shift
179 lsl tmp, tmp, idx_shift
180 cmp tmp, tmp2
184 lsr tmp, size, idx_shift
185 cbz tmp, .Lmap_range_need_page_table
188 orr tmp, attr, #MMU_PTE_L3_DESCRIPTOR_PAGE
191 orr tmp, attr, #MMU_PTE_L012_DESCRIPTOR_BLOCK
195 orr tmp, tmp, paddr
196 str tmp, [page_table, idx, lsl #3]
199 mov tmp, #1
200 lsl tmp, tmp, idx_shift
201 add vaddr, vaddr, tmp
202 add paddr, paddr, tmp
203 subs size, size, tmp
224 ldr tmp, =.Lphys_offset /* virt */
225 sub phys_offset, tmp, phys_offset
228 calloc_bootmem_aligned new_page_table, tmp, tmp2, MMU_KERNEL_PAGE_SIZE_SHIFT, phys_offset
236 and tmp, new_page_table, #MMU_PTE_DESCRIPTOR_MASK
237 cmp tmp, #MMU_PTE_L012_DESCRIPTOR_TABLE
242 mov tmp, #~0
243 lsl tmp, tmp, idx_shift
244 bic tmp, vaddr, tmp
246 lsr idx, tmp, idx_shift
255 mov tmp, #0
257 str xzr, [page_table0, tmp, lsl#3]
258 add tmp, tmp, #1
259 cmp tmp, #MMU_PAGE_TABLE_ENTRIES_IDENT
263 adr tmp, .Lmmu_on_pc
264 lsr tmp, tmp, #MMU_IDENT_TOP_SHIFT /* tmp = paddr idx */
266 add tmp2, tmp2, tmp, lsl #MMU_IDENT_TOP_SHIFT /* tmp2 = pt entry */
268 str tmp2, [page_table0, tmp, lsl #3] /* tt_trampoline[paddr idx] = pt entry */
271 adrp tmp, page_tables_not_ready
272 add tmp, tmp, #:lo12:page_tables_not_ready
273 str wzr, [tmp]
277 adrp tmp, page_tables_not_ready
278 add tmp, tmp, #:lo12:page_tables_not_ready
280 ldr wtmp2, [tmp]
293 ldr tmp, =MMU_MAIR_VAL
294 msr mair_el1, tmp
299 ldr tmp, =MMU_TCR_FLAGS_IDENT
300 msr tcr_el1, tmp
310 mrs tmp, sctlr_el1
313 orr tmp, tmp, #0x1
316 msr sctlr_el1, tmp
321 ldr tmp, =.Lmmu_on_vaddr
322 br tmp
327 ldr tmp, =MMU_TCR_FLAGS_KERNEL
328 msr tcr_el1, tmp
342 ldr tmp, =__stack_end
343 mov sp, tmp
349 ldr tmp, =__post_prebss_bss_start
351 sub tmp2, tmp2, tmp
355 str xzr, [tmp], #8
364 and tmp, cpuid, #0xff
365 cmp tmp, #(1 << SMP_CPU_CLUSTER_SHIFT)
368 orr cpuid, tmp, cpuid, LSR #(8 - SMP_CPU_CLUSTER_SHIFT)
374 ldr tmp, =__stack_end
377 sub sp, tmp, tmp2