Lines Matching refs:ASSERT
201 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterInitExpClk()
263 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveInit()
264 ASSERT(!(ucSlaveAddr & 0x80)); in I2CSlaveInit()
302 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveAddressSet()
303 ASSERT(!(ucAddrNum > 1)); in I2CSlaveAddressSet()
304 ASSERT(!(ucSlaveAddr & 0x80)); in I2CSlaveAddressSet()
348 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterEnable()
373 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveEnable()
404 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterDisable()
429 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDisable()
472 ASSERT(I2CMasterBaseValid(ulBase)); in I2CIntRegister()
514 ASSERT(I2CMasterBaseValid(ulBase)); in I2CIntUnregister()
549 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntEnable()
586 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntEnableEx()
611 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntEnable()
649 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntEnableEx()
674 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntDisable()
705 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntDisableEx()
730 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntDisable()
761 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntDisableEx()
791 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntStatus()
829 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntStatusEx()
867 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntStatus()
907 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntStatusEx()
963 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntClear()
1010 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterIntClearEx()
1046 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntClear()
1086 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveIntClearEx()
1118 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterSlaveAddrSet()
1119 ASSERT(!(ucSlaveAddr & 0x80)); in I2CMasterSlaveAddrSet()
1149 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterLineStateGet()
1176 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterBusy()
1211 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterBusBusy()
1259 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterControl()
1260 ASSERT((ulCmd == I2C_MASTER_CMD_SINGLE_SEND) || in I2CMasterControl()
1301 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterErr()
1348 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterDataPut()
1374 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterDataGet()
1406 ASSERT(I2CMasterBaseValid(ulBase)); in I2CMasterTimeoutSet()
1436 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveACKOverride()
1471 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveACKValueSet()
1525 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveStatus()
1551 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDataPut()
1577 ASSERT(I2CSlaveBaseValid(ulBase)); in I2CSlaveDataGet()