Lines Matching refs:ASSERT
110 ASSERT(ulBase == LPC0_BASE); in LPCConfigSet()
111 ASSERT((ulConfig & ~(LPC_CFG_WAKE)) == 0); in LPCConfigSet()
143 ASSERT(ulBase == LPC0_BASE); in LPCConfigGet()
173 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressSet()
174 ASSERT((ulAddress & ~0xFFFFFFFE) == 0); in LPCStatusBlockAddressSet()
200 ASSERT(ulBase == LPC0_BASE); in LPCStatusBlockAddressGet()
232 ASSERT(ulBase == LPC0_BASE); in LPCStatusGet()
282 ASSERT(ulBase == LPC0_BASE); in LPCSCIAssert()
283 ASSERT(ulCount <= 3); in LPCSCIAssert()
329 ASSERT(ulBase == LPC0_BASE); in LPCIRQConfig()
382 ASSERT(ulBase == LPC0_BASE); in LPCIRQSet()
420 ASSERT(ulBase == LPC0_BASE); in LPCIRQClear()
454 ASSERT(ulBase == LPC0_BASE); in LPCIRQGet()
480 ASSERT(ulBase == LPC0_BASE); in LPCIRQSend()
514 ASSERT(ulBase == LPC0_BASE); in LPCIntRegister()
515 ASSERT(pfnHandler != 0); in LPCIntRegister()
550 ASSERT(ulBase == LPC0_BASE); in LPCIntUnregister()
591 ASSERT(ulBase == LPC0_BASE); in LPCIntEnable()
622 ASSERT(ulBase == LPC0_BASE); in LPCIntDisable()
657 ASSERT(ulBase == LPC0_BASE); in LPCIntStatus()
705 ASSERT(ulBase == LPC0_BASE); in LPCIntClear()
736 ASSERT(ulBase == LPC0_BASE); in LPCChannelEnable()
737 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelEnable()
766 ASSERT(ulBase == LPC0_BASE); in LPCChannelDisable()
767 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelDisable()
800 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigEPSet()
801 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigEPSet()
802 ASSERT((ulConfig & ~(LPC_CH0CTL_IRQSEL1_M | LPC_CH0CTL_IRQSEL0_M | in LPCChannelConfigEPSet()
804 ASSERT((ulOffset & 3) == 0); in LPCChannelConfigEPSet()
805 ASSERT(ulOffset < ((((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCChannelConfigEPSet()
852 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigMBSet()
853 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigMBSet()
854 ASSERT((ulConfig & ~(LPC_CH0CTL_IRQSEL1_M | LPC_CH0CTL_IRQSEL1_M | in LPCChannelConfigMBSet()
859 ASSERT((ulOffset & 3) == 0); in LPCChannelConfigMBSet()
860 ASSERT(ulOffset < ((((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCChannelConfigMBSet()
915 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigCOMxSet()
916 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigCOMxSet()
917 ASSERT(ulChannel == LPC_CHAN_COMx); in LPCChannelConfigCOMxSet()
918 ASSERT((ulConfig & ~(LPC_CH7CTL_IRQSEL1_M | LPC_CH7CTL_IRQSEL0_M | in LPCChannelConfigCOMxSet()
921 ASSERT((ulOffset & 3) == 0); in LPCChannelConfigCOMxSet()
922 ASSERT(ulOffset < ((((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCChannelConfigCOMxSet()
924 ASSERT((ulCOMxMode & ~LPC_DMACX_CXACT_M) == 0); in LPCChannelConfigCOMxSet()
980 ASSERT(ulBase == LPC0_BASE); in LPCChannelConfigGet()
981 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelConfigGet()
1040 ASSERT(ulBase == LPC0_BASE); in LPCChannelPoolAddressGet()
1041 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelPoolAddressGet()
1086 ASSERT(ulBase == LPC0_BASE); in LPCChannelStatusGet()
1087 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelStatusGet()
1118 ASSERT(ulBase == LPC0_BASE); in LPCChannelStatusSet()
1119 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelStatusSet()
1120 ASSERT((ulStatus & (~LPC_CH0ST_USER_M)) == 0); in LPCChannelStatusSet()
1154 ASSERT(ulBase == LPC0_BASE); in LPCChannelStatusClear()
1155 ASSERT(LPCChannelValid(ulChannel)); in LPCChannelStatusClear()
1156 ASSERT((ulStatus & (~LPC_CH0ST_USER_M)) == 0); in LPCChannelStatusClear()
1190 ASSERT(ulBase == LPC0_BASE); in LPCChannelDMAConfigSet()
1191 ASSERT((ulConfig & ~0x000000FF) == 0); in LPCChannelDMAConfigSet()
1192 ASSERT((ulConfig & 0x00000003) != 0x00000003); in LPCChannelDMAConfigSet()
1193 ASSERT((ulConfig & 0x0000000C) != 0x0000000C); in LPCChannelDMAConfigSet()
1194 ASSERT((ulConfig & 0x00000030) != 0x00000030); in LPCChannelDMAConfigSet()
1195 ASSERT((ulConfig & 0x000000C0) != 0x000000C0); in LPCChannelDMAConfigSet()
1196 ASSERT((ulMask & ~0x000000FF) == 0); in LPCChannelDMAConfigSet()
1224 ASSERT(ulBase == LPC0_BASE); in LPCChannelDMAConfigGet()
1251 ASSERT(ulBase == LPC0_BASE); in LPCByteRead()
1252 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCByteRead()
1282 ASSERT(ulBase == LPC0_BASE); in LPCByteWrite()
1283 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCByteWrite()
1312 ASSERT(ulBase == LPC0_BASE); in LPCHalfWordRead()
1313 ASSERT((ulOffset & 1) == 0); in LPCHalfWordRead()
1314 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCHalfWordRead()
1345 ASSERT(ulBase == LPC0_BASE); in LPCHalfWordWrite()
1346 ASSERT((ulOffset & 1) == 0); in LPCHalfWordWrite()
1347 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCHalfWordWrite()
1376 ASSERT(ulBase == LPC0_BASE); in LPCWordRead()
1377 ASSERT((ulOffset & 3) == 0); in LPCWordRead()
1378 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCWordRead()
1409 ASSERT(ulBase == LPC0_BASE); in LPCWordWrite()
1410 ASSERT((ulOffset & 1) == 0); in LPCWordWrite()
1411 ASSERT(ulOffset < (((HWREG(ulBase + LPC_O_STS) & LPC_STS_POOLSZ_M) >> in LPCWordWrite()
1439 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntEnable()
1440 ASSERT((ulIntFlags & ~(LPC_DMACX_CXEM | LPC_DMACX_CXTXEM | in LPCCOMxIntEnable()
1468 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntDisable()
1469 ASSERT((ulIntFlags & ~(LPC_DMACX_CXEM | LPC_DMACX_CXTXEM | in LPCCOMxIntDisable()
1499 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntStatus()
1533 ASSERT(ulBase == LPC0_BASE); in LPCCOMxIntClear()
1534 ASSERT((ulIntFlags & ~(LPC_DMACX_CXRES | LPC_DMACX_CXTXRES | in LPCCOMxIntClear()