Lines Matching refs:ulChannelNum
150 uDMAChannelEnable(unsigned long ulChannelNum) in uDMAChannelEnable() argument
155 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelEnable()
160 HWREG(UDMA_ENASET) = 1 << (ulChannelNum & 0x1f); in uDMAChannelEnable()
177 uDMAChannelDisable(unsigned long ulChannelNum) in uDMAChannelDisable() argument
182 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelDisable()
187 HWREG(UDMA_ENACLR) = 1 << (ulChannelNum & 0x1f); in uDMAChannelDisable()
204 uDMAChannelIsEnabled(unsigned long ulChannelNum) in uDMAChannelIsEnabled() argument
209 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelIsEnabled()
215 return((HWREG(UDMA_ENASET) & (1 << (ulChannelNum & 0x1f))) ? true : false); in uDMAChannelIsEnabled()
317 uDMAChannelRequest(unsigned long ulChannelNum) in uDMAChannelRequest() argument
322 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelRequest()
327 HWREG(UDMA_SWREQ) = 1 << (ulChannelNum & 0x1f); in uDMAChannelRequest()
353 uDMAChannelAttributeEnable(unsigned long ulChannelNum, unsigned long ulAttr) in uDMAChannelAttributeEnable() argument
358 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelAttributeEnable()
367 ulChannelNum &= 0x1f; in uDMAChannelAttributeEnable()
374 HWREG(UDMA_USEBURSTSET) = 1 << ulChannelNum; in uDMAChannelAttributeEnable()
383 HWREG(UDMA_ALTSET) = 1 << ulChannelNum; in uDMAChannelAttributeEnable()
391 HWREG(UDMA_PRIOSET) = 1 << ulChannelNum; in uDMAChannelAttributeEnable()
399 HWREG(UDMA_REQMASKSET) = 1 << ulChannelNum; in uDMAChannelAttributeEnable()
426 uDMAChannelAttributeDisable(unsigned long ulChannelNum, unsigned long ulAttr) in uDMAChannelAttributeDisable() argument
431 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelAttributeDisable()
440 ulChannelNum &= 0x1f; in uDMAChannelAttributeDisable()
447 HWREG(UDMA_USEBURSTCLR) = 1 << ulChannelNum; in uDMAChannelAttributeDisable()
456 HWREG(UDMA_ALTCLR) = 1 << ulChannelNum; in uDMAChannelAttributeDisable()
464 HWREG(UDMA_PRIOCLR) = 1 << ulChannelNum; in uDMAChannelAttributeDisable()
472 HWREG(UDMA_REQMASKCLR) = 1 << ulChannelNum; in uDMAChannelAttributeDisable()
497 uDMAChannelAttributeGet(unsigned long ulChannelNum) in uDMAChannelAttributeGet() argument
504 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelAttributeGet()
511 ulChannelNum &= 0x1f; in uDMAChannelAttributeGet()
516 if(HWREG(UDMA_USEBURSTSET) & (1 << ulChannelNum)) in uDMAChannelAttributeGet()
524 if(HWREG(UDMA_ALTSET) & (1 << ulChannelNum)) in uDMAChannelAttributeGet()
532 if(HWREG(UDMA_PRIOSET) & (1 << ulChannelNum)) in uDMAChannelAttributeGet()
540 if(HWREG(UDMA_REQMASKSET) & (1 << ulChannelNum)) in uDMAChannelAttributeGet()
859 uDMAChannelScatterGatherSet(unsigned long ulChannelNum, unsigned ulTaskCount, in uDMAChannelScatterGatherSet() argument
868 ASSERT((ulChannelNum & 0xffff) < 32); in uDMAChannelScatterGatherSet()
879 ulChannelNum &= 0x1f; in uDMAChannelScatterGatherSet()
895 pControlTable[ulChannelNum].pvSrcEndAddr = in uDMAChannelScatterGatherSet()
902 pControlTable[ulChannelNum].pvDstEndAddr = in uDMAChannelScatterGatherSet()
903 &pControlTable[ulChannelNum | UDMA_ALT_SELECT].ulSpare; in uDMAChannelScatterGatherSet()
911 pControlTable[ulChannelNum].ulControl = in uDMAChannelScatterGatherSet()
1346 unsigned long ulChannelNum; in uDMAChannelAssign() local
1361 ulChannelNum = ulMapping & 0xff; in uDMAChannelAssign()
1368 ulMapReg = UDMA_CHMAP0 + ((ulChannelNum / 8) * 4); in uDMAChannelAssign()
1369 ulMapShift = (ulChannelNum % 8) * 4; in uDMAChannelAssign()