Lines Matching refs:hsr
27 const union hsr hsr) in do_sysreg() argument
29 int regidx = hsr.sysreg.reg; in do_sysreg()
32 switch ( hsr.bits & HSR_SYSREG_REGS_MASK ) in do_sysreg()
41 return inject_undef_exception(regs, hsr); in do_sysreg()
42 if ( hsr.sysreg.read ) in do_sysreg()
52 return handle_ro_raz(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
64 return handle_wo_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
66 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
86 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
92 return handle_ro_raz(regs, regidx, hsr.sysreg.read, hsr, 0); in do_sysreg()
97 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
121 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
125 return handle_ro_raz(regs, regidx, hsr.sysreg.read, hsr, 0); in do_sysreg()
127 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
144 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
154 if ( !vtimer_emulate(regs, hsr) ) in do_sysreg()
155 return inject_undef_exception(regs, hsr); in do_sysreg()
167 if ( !vgic_emulate(regs, hsr) ) in do_sysreg()
168 return inject_undef64_exception(regs, hsr.len); in do_sysreg()
183 return handle_raz_wi(regs, regidx, hsr.sysreg.read, hsr, 1); in do_sysreg()
202 const struct hsr_sysreg sysreg = hsr.sysreg; in do_sysreg()
213 hsr.bits & HSR_SYSREG_REGS_MASK); in do_sysreg()
214 inject_undef_exception(regs, hsr); in do_sysreg()