Lines Matching refs:VREG32
174 case VREG32(GICR_CTLR): in __vgic_v3_rdistr_rd_mmio_read()
189 case VREG32(GICR_IIDR): in __vgic_v3_rdistr_rd_mmio_read()
218 case VREG32(GICR_STATUSR): in __vgic_v3_rdistr_rd_mmio_read()
222 case VREG32(GICR_WAKER): in __vgic_v3_rdistr_rd_mmio_read()
285 case VREG32(GICR_SYNCR): in __vgic_v3_rdistr_rd_mmio_read()
313 case VREG32(GICR_PIDR2): in __vgic_v3_rdistr_rd_mmio_read()
489 case VREG32(GICR_CTLR): in __vgic_v3_rdistr_rd_mmio_write()
511 case VREG32(GICR_IIDR): in __vgic_v3_rdistr_rd_mmio_write()
519 case VREG32(GICR_STATUSR): in __vgic_v3_rdistr_rd_mmio_write()
523 case VREG32(GICR_WAKER): in __vgic_v3_rdistr_rd_mmio_write()
608 case VREG32(GICR_SYNCR): in __vgic_v3_rdistr_rd_mmio_write()
634 case VREG32(GICR_PIDR2): in __vgic_v3_rdistr_rd_mmio_write()
852 case VREG32(GICD_ICFGR): /* Restricted to configure SGIs */ in __vgic_v3_distr_common_mmio_write()
895 case VREG32(GICR_IGROUPR0): in vgic_v3_rdistr_sgi_mmio_read()
896 case VREG32(GICR_ISENABLER0): in vgic_v3_rdistr_sgi_mmio_read()
897 case VREG32(GICR_ICENABLER0): in vgic_v3_rdistr_sgi_mmio_read()
898 case VREG32(GICR_ISACTIVER0): in vgic_v3_rdistr_sgi_mmio_read()
899 case VREG32(GICR_ICACTIVER0): in vgic_v3_rdistr_sgi_mmio_read()
910 case VREG32(GICR_ISPENDR0): in vgic_v3_rdistr_sgi_mmio_read()
911 case VREG32(GICR_ICPENDR0): in vgic_v3_rdistr_sgi_mmio_read()
914 case VREG32(GICR_IGRPMODR0): in vgic_v3_rdistr_sgi_mmio_read()
918 case VREG32(GICR_NSACR): in vgic_v3_rdistr_sgi_mmio_read()
972 case VREG32(GICR_IGROUPR0): in vgic_v3_rdistr_sgi_mmio_write()
973 case VREG32(GICR_ISENABLER0): in vgic_v3_rdistr_sgi_mmio_write()
974 case VREG32(GICR_ICENABLER0): in vgic_v3_rdistr_sgi_mmio_write()
975 case VREG32(GICR_ISACTIVER0): in vgic_v3_rdistr_sgi_mmio_write()
976 case VREG32(GICR_ICACTIVER0): in vgic_v3_rdistr_sgi_mmio_write()
977 case VREG32(GICR_ICFGR1): in vgic_v3_rdistr_sgi_mmio_write()
986 case VREG32(GICR_ISPENDR0): in vgic_v3_rdistr_sgi_mmio_write()
993 case VREG32(GICR_ICPENDR0): in vgic_v3_rdistr_sgi_mmio_write()
1000 case VREG32(GICR_IGRPMODR0): in vgic_v3_rdistr_sgi_mmio_write()
1005 case VREG32(GICR_NSACR): in vgic_v3_rdistr_sgi_mmio_write()
1107 case VREG32(GICD_CTLR): in vgic_v3_distr_mmio_read()
1114 case VREG32(GICD_TYPER): in vgic_v3_distr_mmio_read()
1142 case VREG32(GICD_IIDR): in vgic_v3_distr_mmio_read()
1147 case VREG32(0x000C): in vgic_v3_distr_mmio_read()
1150 case VREG32(GICD_STATUSR): in vgic_v3_distr_mmio_read()
1163 case VREG32(GICD_SETSPI_NSR): in vgic_v3_distr_mmio_read()
1167 case VREG32(0x0044): in vgic_v3_distr_mmio_read()
1170 case VREG32(GICD_CLRSPI_NSR): in vgic_v3_distr_mmio_read()
1174 case VREG32(0x004C): in vgic_v3_distr_mmio_read()
1177 case VREG32(GICD_SETSPI_SR): in vgic_v3_distr_mmio_read()
1181 case VREG32(0x0054): in vgic_v3_distr_mmio_read()
1184 case VREG32(GICD_CLRSPI_SR): in vgic_v3_distr_mmio_read()
1210 case VREG32(GICD_SGIR): in vgic_v3_distr_mmio_read()
1252 case VREG32(GICD_PIDR2): in vgic_v3_distr_mmio_read()
1310 case VREG32(GICD_CTLR): in vgic_v3_distr_mmio_write()
1330 case VREG32(GICD_TYPER): in vgic_v3_distr_mmio_write()
1334 case VREG32(GICD_IIDR): in vgic_v3_distr_mmio_write()
1338 case VREG32(0x000C): in vgic_v3_distr_mmio_write()
1341 case VREG32(GICD_STATUSR): in vgic_v3_distr_mmio_write()
1351 case VREG32(GICD_SETSPI_NSR): in vgic_v3_distr_mmio_write()
1355 case VREG32(0x0044): in vgic_v3_distr_mmio_write()
1358 case VREG32(GICD_CLRSPI_NSR): in vgic_v3_distr_mmio_write()
1362 case VREG32(0x004C): in vgic_v3_distr_mmio_write()
1365 case VREG32(GICD_SETSPI_SR): in vgic_v3_distr_mmio_write()
1369 case VREG32(0x0054): in vgic_v3_distr_mmio_write()
1372 case VREG32(GICD_CLRSPI_SR): in vgic_v3_distr_mmio_write()
1397 case VREG32(GICD_SGIR): in vgic_v3_distr_mmio_write()
1440 case VREG32(GICD_PIDR2): in vgic_v3_distr_mmio_write()