Lines Matching refs:msi
273 ASSERT((msg->data & (entry[-nr].msi.nvec - 1)) == nr); in write_msi_msg()
408 mask_bits = pci_conf_read32(seg, bus, slot, func, entry->msi.mpos); in msi_set_mask_bit()
411 pci_conf_write32(seg, bus, slot, func, entry->msi.mpos, mask_bits); in msi_set_mask_bit()
481 entry->msi.mpos) >> in msi_get_mask_bit()
639 ? entry->msi.nvec : 1; in msi_free_irq()
726 entry[i].msi.mpos = mpos; in msi_capability_init()
727 entry[i].msi.nvec = 0; in msi_capability_init()
730 entry->msi.nvec = nvec; in msi_capability_init()
838 struct msi_info *msi, in msix_capability_init() argument
885 ASSERT(msi); in msix_capability_init()
910 WARN_ON(msi && msi->table_base != table_paddr); in msix_capability_init()
913 if ( !msi || !msi->table_base ) in msix_capability_init()
920 table_paddr = msi->table_base; in msix_capability_init()
953 u64 entry_paddr = table_paddr + msi->entry_nr * PCI_MSIX_ENTRY_SIZE; in msix_capability_init()
971 entry->msi_attrib.entry_nr = msi->entry_nr; in msix_capability_init()
976 entry->irq = msi->irq; in msix_capability_init()
1039 static int __pci_enable_msi(struct msi_info *msi, struct msi_desc **desc) in __pci_enable_msi() argument
1045 pdev = pci_get_pdev(msi->seg, msi->bus, msi->devfn); in __pci_enable_msi()
1049 old_desc = find_msi_entry(pdev, msi->irq, PCI_CAP_ID_MSI); in __pci_enable_msi()
1053 msi->irq, msi->seg, msi->bus, in __pci_enable_msi()
1054 PCI_SLOT(msi->devfn), PCI_FUNC(msi->devfn)); in __pci_enable_msi()
1062 msi->seg, msi->bus, in __pci_enable_msi()
1063 PCI_SLOT(msi->devfn), PCI_FUNC(msi->devfn)); in __pci_enable_msi()
1067 return msi_capability_init(pdev, msi->irq, desc, msi->entry_nr); in __pci_enable_msi()
1095 static int __pci_enable_msix(struct msi_info *msi, struct msi_desc **desc) in __pci_enable_msix() argument
1100 u8 slot = PCI_SLOT(msi->devfn); in __pci_enable_msix()
1101 u8 func = PCI_FUNC(msi->devfn); in __pci_enable_msix()
1105 pdev = pci_get_pdev(msi->seg, msi->bus, msi->devfn); in __pci_enable_msix()
1106 pos = pci_find_cap_offset(msi->seg, msi->bus, slot, func, PCI_CAP_ID_MSIX); in __pci_enable_msix()
1110 control = pci_conf_read16(msi->seg, msi->bus, slot, func, in __pci_enable_msix()
1113 if ( msi->entry_nr >= nr_entries ) in __pci_enable_msix()
1116 old_desc = find_msi_entry(pdev, msi->irq, PCI_CAP_ID_MSIX); in __pci_enable_msix()
1120 msi->irq, msi->seg, msi->bus, in __pci_enable_msix()
1121 PCI_SLOT(msi->devfn), PCI_FUNC(msi->devfn)); in __pci_enable_msix()
1129 msi->seg, msi->bus, in __pci_enable_msix()
1130 PCI_SLOT(msi->devfn), PCI_FUNC(msi->devfn)); in __pci_enable_msix()
1134 return msix_capability_init(pdev, pos, msi, desc, nr_entries); in __pci_enable_msix()
1233 int pci_enable_msi(struct msi_info *msi, struct msi_desc **desc) in pci_enable_msi() argument
1240 return msi->table_base ? __pci_enable_msix(msi, desc) : in pci_enable_msi()
1241 __pci_enable_msi(msi, desc); in pci_enable_msi()
1312 if ( reg < pos || reg >= entry->msi.mpos + 8 ) in pci_msi_conf_write_intercept()
1317 if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size != 4 ) in pci_msi_conf_write_intercept()
1322 for ( pos = 0; pos < entry->msi.nvec; ++pos, ++entry ) in pci_msi_conf_write_intercept()
1393 nr = entry->msi.nvec; in pci_restore_msi_state()
1442 multi_msi_enable(control, entry->msi.nvec); in pci_restore_msi_state()