Lines Matching refs:pos
145 static bool msix_memory_decoded(const struct pci_dev *dev, unsigned int pos) in msix_memory_decoded() argument
148 PCI_FUNC(dev->devfn), msix_control_reg(pos)); in msix_memory_decoded()
201 int pos = entry->msi_attrib.pos; in read_msi_msg() local
208 msi_lower_address_reg(pos)); in read_msi_msg()
212 msi_upper_address_reg(pos)); in read_msi_msg()
214 msi_data_reg(pos, 1)); in read_msi_msg()
220 msi_data_reg(pos, 0)); in read_msi_msg()
230 entry->msi_attrib.pos)) ) in read_msi_msg()
266 int pos = entry->msi_attrib.pos; in write_msi_msg() local
277 pci_conf_write32(seg, bus, slot, func, msi_lower_address_reg(pos), in write_msi_msg()
281 pci_conf_write32(seg, bus, slot, func, msi_upper_address_reg(pos), in write_msi_msg()
283 pci_conf_write16(seg, bus, slot, func, msi_data_reg(pos, 1), in write_msi_msg()
287 pci_conf_write16(seg, bus, slot, func, msi_data_reg(pos, 0), in write_msi_msg()
296 entry->msi_attrib.pos)) ) in write_msi_msg()
337 void __msi_set_enable(u16 seg, u8 bus, u8 slot, u8 func, int pos, int enable) in __msi_set_enable() argument
339 u16 control = pci_conf_read16(seg, bus, slot, func, pos + PCI_MSI_FLAGS); in __msi_set_enable()
344 pci_conf_write16(seg, bus, slot, func, pos + PCI_MSI_FLAGS, control); in __msi_set_enable()
349 int pos; in msi_set_enable() local
355 pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI); in msi_set_enable()
356 if ( pos ) in msi_set_enable()
357 __msi_set_enable(seg, bus, slot, func, pos, enable); in msi_set_enable()
362 int pos; in msix_set_enable() local
368 pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSIX); in msix_set_enable()
369 if ( pos ) in msix_set_enable()
371 control = pci_conf_read16(seg, bus, slot, func, msix_control_reg(pos)); in msix_set_enable()
375 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), control); in msix_set_enable()
417 msix_control_reg(entry->msi_attrib.pos)); in msi_set_mask_bit()
422 msix_control_reg(entry->msi_attrib.pos), in msi_set_mask_bit()
457 msix_control_reg(entry->msi_attrib.pos), control); in msi_set_mask_bit()
485 entry->msi_attrib.pos)) ) in msi_get_mask_bit()
591 unsigned int cpos = msix_control_reg(msidesc->msi_attrib.pos); in setup_msi_irq()
690 int pos; in msi_capability_init() local
698 pos = pci_find_cap_offset(seg, bus, slot, func, PCI_CAP_ID_MSI); in msi_capability_init()
699 if ( !pos ) in msi_capability_init()
701 control = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos)); in msi_capability_init()
715 mpos = msi_mask_bits_reg(pos, is_64bit_address(control)); in msi_capability_init()
724 entry[i].msi_attrib.pos = pos; in msi_capability_init()
745 pci_conf_write16(seg, bus, slot, func, msi_control_reg(pos), control); in msi_capability_init()
759 unsigned int pos = pci_find_ext_capability(seg, bus, in read_pci_mem_bar() local
762 u16 ctrl = pci_conf_read16(seg, bus, slot, func, pos + PCI_SRIOV_CTRL); in read_pci_mem_bar()
764 pos + PCI_SRIOV_NUM_VF); in read_pci_mem_bar()
766 pos + PCI_SRIOV_VF_OFFSET); in read_pci_mem_bar()
768 pos + PCI_SRIOV_VF_STRIDE); in read_pci_mem_bar()
770 if ( !pdev || !pos || in read_pci_mem_bar()
777 base = pos + PCI_SRIOV_BAR; in read_pci_mem_bar()
837 unsigned int pos, in msix_capability_init() argument
857 control = pci_conf_read16(seg, bus, slot, func, msix_control_reg(pos)); in msix_capability_init()
865 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), in msix_capability_init()
871 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), in msix_capability_init()
881 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), in msix_capability_init()
890 msix_table_offset_reg(pos)); in msix_capability_init()
915 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), in msix_capability_init()
937 msix_pba_offset_reg(pos)); in msix_capability_init()
959 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), in msix_capability_init()
975 entry->msi_attrib.pos = pos; in msix_capability_init()
1023 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), control); in msix_capability_init()
1097 int pos, nr_entries; in __pci_enable_msix() local
1106 pos = pci_find_cap_offset(msi->seg, msi->bus, slot, func, PCI_CAP_ID_MSIX); in __pci_enable_msix()
1107 if ( !pdev || !pos ) in __pci_enable_msix()
1111 msix_control_reg(pos)); in __pci_enable_msix()
1134 return msix_capability_init(pdev, pos, msi, desc, nr_entries); in __pci_enable_msix()
1157 unsigned int pos = pci_find_cap_offset(seg, bus, slot, func, in __pci_disable_msix() local
1160 msix_control_reg(entry->msi_attrib.pos)); in __pci_disable_msix()
1166 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), in __pci_disable_msix()
1186 pci_conf_write16(seg, bus, slot, func, msix_control_reg(pos), control); in __pci_disable_msix()
1196 unsigned int pos = pci_find_cap_offset(seg, bus, slot, func, in pci_prepare_msix() local
1202 if ( !pos ) in pci_prepare_msix()
1219 msix_control_reg(pos)); in pci_prepare_msix()
1221 rc = msix_capability_init(pdev, pos, NULL, NULL, in pci_prepare_msix()
1282 unsigned int pos; in pci_msi_conf_write_intercept() local
1287 pos = entry ? entry->msi_attrib.pos in pci_msi_conf_write_intercept()
1290 ASSERT(pos); in pci_msi_conf_write_intercept()
1292 if ( reg >= pos && reg < msix_pba_offset_reg(pos) + 4 ) in pci_msi_conf_write_intercept()
1294 if ( reg != msix_control_reg(pos) || size != 2 ) in pci_msi_conf_write_intercept()
1311 pos = entry->msi_attrib.pos; in pci_msi_conf_write_intercept()
1312 if ( reg < pos || reg >= entry->msi.mpos + 8 ) in pci_msi_conf_write_intercept()
1315 if ( reg == msi_control_reg(pos) ) in pci_msi_conf_write_intercept()
1320 cntl = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos)); in pci_msi_conf_write_intercept()
1322 for ( pos = 0; pos < entry->msi.nvec; ++pos, ++entry ) in pci_msi_conf_write_intercept()
1327 *data |= 1 << pos; in pci_msi_conf_write_intercept()
1328 unused &= ~(1 << pos); in pci_msi_conf_write_intercept()
1348 unsigned int type = 0, pos = 0; in pci_restore_msi_state() local
1383 msix_control_reg(pos), in pci_restore_msi_state()
1389 pos = entry->msi_attrib.pos; in pci_restore_msi_state()
1398 msix_control_reg(pos)); in pci_restore_msi_state()
1400 msix_control_reg(pos), in pci_restore_msi_state()
1407 msix_control_reg(pos), in pci_restore_msi_state()
1438 unsigned int cpos = msi_control_reg(pos); in pci_restore_msi_state()
1452 msix_control_reg(pos), in pci_restore_msi_state()
1499 switch ( entry->msi_attrib.pos ) in dump_msi()