Lines Matching refs:eax
32 movl VCPU_processor(%rbx),%eax
33 shll $IRQSTAT_shift,%eax
44 movzwl COMPAT_VCPUINFO_upcall_pending(%rax),%eax
45 decl %eax
46 cmpl $0xfe,%eax
51 movl VCPU_event_addr(%rbx),%eax
52 movl %eax,TRAPBOUNCE_eip(%rdx)
53 movl VCPU_event_sel(%rbx),%eax
75 testl %eax,%eax
91 testl %eax,%eax
154 test $XEN_CR4_PV32_BITS, %eax
178 xor %eax, %eax
217 movl TRAP_gp_fault * TRAPINFO_sizeof + TRAPINFO_eip(%rdi),%eax
232 movzwl VCPU_sysenter_sel(%rbx),%eax
234 cmovel %ecx,%eax
235 testl $~3,%eax
237 cmovzl %ecx,%eax
261 movl UREGS_rsp+8(%rsp),%eax
262 .Lft2: movl %eax,%fs:(%rsi)
263 movl UREGS_ss+8(%rsp),%eax
264 .Lft3: movl %eax,%fs:4(%rsi)
278 shll $16,%eax # Bits 16-23: saved_upcall_mask
280 .Lft5: movl %eax,%fs:4(%rsi) # CS / saved_upcall_mask
281 shrl $16,%eax
284 movl UREGS_eflags+8(%rsp),%eax
285 andl $~(X86_EFLAGS_IF|X86_EFLAGS_IOPL),%eax
287 orb %ch,%ah # Fold EFLAGS.IF into %eax
291 orl %ecx,%eax # Fold EFLAGS.IOPL into %eax
292 .Lft6: movl %eax,%fs:2*4(%rsi) # EFLAGS
293 movl UREGS_rip+8(%rsp),%eax
294 .Lft7: movl %eax,%fs:(%rsi) # EIP
298 movl TRAPBOUNCE_error_code(%rdx),%eax
299 .Lft8: movl %eax,%fs:(%rsi) # ERROR CODE
309 movzwl TRAPBOUNCE_cs(%rdx),%eax
311 testl $~3,%eax
316 movl %eax,UREGS_cs+8(%rsp)
317 movl TRAPBOUNCE_eip(%rdx),%eax
318 movl %eax,UREGS_rip+8(%rsp)