Lines Matching refs:pl011_write
55 #define pl011_write(uart, off,val) writel((val), (uart)->regs + (off)) macro
73 pl011_write(uart, ICR, status & ~(TXI|RTI|RXI)); in pl011_interrupt()
97 pl011_write(uart, IMSC, 0); in pl011_init_preirq()
102 pl011_write(uart, DMACR, 0x0); in pl011_init_preirq()
105 pl011_write(uart, LCR_H, (uart->data_bits - 5) << 5 in pl011_init_preirq()
111 pl011_write(uart, RSR, 0); in pl011_init_preirq()
114 pl011_write(uart, IMSC, 0); in pl011_init_preirq()
115 pl011_write(uart, ICR, ALLI); in pl011_init_preirq()
122 pl011_write(uart, CR, cr | RXE | TXE | UARTEN); in pl011_init_preirq()
141 pl011_write(uart, ICR, OEI|BEI|PEI|FEI); in pl011_init_postirq()
144 pl011_write(uart, IMSC, RTI|OEI|BEI|PEI|FEI|TXI|RXI); in pl011_init_postirq()
168 pl011_write(uart, DR, (uint32_t)(unsigned char)c); in pl011_putc()
200 pl011_write(uart, IMSC, pl011_read(uart, IMSC) & ~(TXI)); in pl011_tx_stop()
207 pl011_write(uart, IMSC, pl011_read(uart, IMSC) | (TXI)); in pl011_tx_start()