Lines Matching refs:msi
442 PCI_FUNC(iommu->bdf), iommu->msi.msi_attrib.pos, flag); in amd_iommu_msi_enable()
453 iommu->msi.msi_attrib.host_masked = 0; in iommu_msi_unmask()
466 iommu->msi.msi_attrib.host_masked = 1; in iommu_msi_mask()
791 iommu->msi.dev = pci_get_pdev(iommu->seg, PCI_BUS(iommu->bdf), in set_iommu_interrupt_handler()
794 if ( !iommu->msi.dev ) in set_iommu_interrupt_handler()
803 iommu->msi.msi_attrib.pos + PCI_MSI_FLAGS); in set_iommu_interrupt_handler()
804 iommu->msi.msi.nvec = 1; in set_iommu_interrupt_handler()
807 iommu->msi.msi_attrib.maskbit = 1; in set_iommu_interrupt_handler()
808 iommu->msi.msi.mpos = msi_mask_bits_reg(iommu->msi.msi_attrib.pos, in set_iommu_interrupt_handler()
814 ret = __setup_msi_irq(irq_to_desc(irq), &iommu->msi, handler); in set_iommu_interrupt_handler()
824 iommu->msi.irq = irq; in set_iommu_interrupt_handler()
888 desc = irq_to_desc(iommu->msi.irq); in enable_iommu()