Lines Matching refs:midr
11 #define MIDR_RESIVION(midr) ((midr) & MIDR_REVISION_MASK) argument
14 #define MIDR_PARTNUM(midr) \ argument
15 (((midr) & MIDR_PARTNUM_MASK) >> MIDR_PARTNUM_SHIFT)
18 #define MIDR_ARCHITECTURE(midr) \ argument
19 (((midr) & MIDR_ARCHITECTURE_MASK) >> MIDR_ARCHITECTURE_SHIFT)
22 #define MIDR_VARIANT(midr) \ argument
23 (((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
26 #define MIDR_IMPLEMENTOR(midr) \ argument
27 (((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
37 #define MIDR_IS_CPU_MODEL_RANGE(midr, model, rv_min, rv_max) \ argument
39 u32 _model = (midr) & MIDR_CPU_MODEL_MASK; \
40 u32 _rv = (midr) & (MIDR_REVISION_MASK | MIDR_VARIANT_MASK); \
351 } midr; member