Lines Matching refs:XEN_CPUFEATURE
43 #ifndef XEN_CPUFEATURE
54 #define XEN_CPUFEATURE(name, value) XEN_X86_FEATURE_##name = value, macro
61 #ifdef XEN_CPUFEATURE
93 XEN_CPUFEATURE(FPU, 0*32+ 0) /*A Onboard FPU */ enumerator
94 XEN_CPUFEATURE(VME, 0*32+ 1) /*S Virtual Mode Extensions */
95 XEN_CPUFEATURE(DE, 0*32+ 2) /*A Debugging Extensions */
96 XEN_CPUFEATURE(PSE, 0*32+ 3) /*S Page Size Extensions */
97 XEN_CPUFEATURE(TSC, 0*32+ 4) /*A Time Stamp Counter */
98 XEN_CPUFEATURE(MSR, 0*32+ 5) /*A Model-Specific Registers, RDMSR, WRMSR */
99 XEN_CPUFEATURE(PAE, 0*32+ 6) /*A Physical Address Extensions */
100 XEN_CPUFEATURE(MCE, 0*32+ 7) /*A Machine Check Architecture */
101 XEN_CPUFEATURE(CX8, 0*32+ 8) /*A CMPXCHG8 instruction */
102 XEN_CPUFEATURE(APIC, 0*32+ 9) /*!A Onboard APIC */
103 XEN_CPUFEATURE(SEP, 0*32+11) /*A SYSENTER/SYSEXIT */
104 XEN_CPUFEATURE(MTRR, 0*32+12) /*S Memory Type Range Registers */
105 XEN_CPUFEATURE(PGE, 0*32+13) /*S Page Global Enable */
106 XEN_CPUFEATURE(MCA, 0*32+14) /*A Machine Check Architecture */
107 XEN_CPUFEATURE(CMOV, 0*32+15) /*A CMOV instruction (FCMOVCC and FCOMI too if FPU present)…
108 XEN_CPUFEATURE(PAT, 0*32+16) /*A Page Attribute Table */
109 XEN_CPUFEATURE(PSE36, 0*32+17) /*S 36-bit PSEs */
110 XEN_CPUFEATURE(CLFLUSH, 0*32+19) /*A CLFLUSH instruction */
111 XEN_CPUFEATURE(DS, 0*32+21) /* Debug Store */
112 XEN_CPUFEATURE(ACPI, 0*32+22) /*A ACPI via MSR */
113 XEN_CPUFEATURE(MMX, 0*32+23) /*A Multimedia Extensions */
114 XEN_CPUFEATURE(FXSR, 0*32+24) /*A FXSAVE and FXRSTOR instructions */
115 XEN_CPUFEATURE(SSE, 0*32+25) /*A Streaming SIMD Extensions */
116 XEN_CPUFEATURE(SSE2, 0*32+26) /*A Streaming SIMD Extensions-2 */
117 XEN_CPUFEATURE(SS, 0*32+27) /*A CPU self snoop */
118 XEN_CPUFEATURE(HTT, 0*32+28) /*!A Hyper-Threading Technology */
119 XEN_CPUFEATURE(TM1, 0*32+29) /* Thermal Monitor 1 */
120 XEN_CPUFEATURE(PBE, 0*32+31) /* Pending Break Enable */
123 XEN_CPUFEATURE(SSE3, 1*32+ 0) /*A Streaming SIMD Extensions-3 */
124 XEN_CPUFEATURE(PCLMULQDQ, 1*32+ 1) /*A Carry-less mulitplication */
125 XEN_CPUFEATURE(DTES64, 1*32+ 2) /* 64-bit Debug Store */
126 XEN_CPUFEATURE(MONITOR, 1*32+ 3) /* Monitor/Mwait support */
127 XEN_CPUFEATURE(DSCPL, 1*32+ 4) /* CPL Qualified Debug Store */
128 XEN_CPUFEATURE(VMX, 1*32+ 5) /*S Virtual Machine Extensions */
129 XEN_CPUFEATURE(SMX, 1*32+ 6) /* Safer Mode Extensions */
130 XEN_CPUFEATURE(EIST, 1*32+ 7) /* Enhanced SpeedStep */
131 XEN_CPUFEATURE(TM2, 1*32+ 8) /* Thermal Monitor 2 */
132 XEN_CPUFEATURE(SSSE3, 1*32+ 9) /*A Supplemental Streaming SIMD Extensions-3 */
133 XEN_CPUFEATURE(FMA, 1*32+12) /*A Fused Multiply Add */
134 XEN_CPUFEATURE(CX16, 1*32+13) /*A CMPXCHG16B */
135 XEN_CPUFEATURE(XTPR, 1*32+14) /* Send Task Priority Messages */
136 XEN_CPUFEATURE(PDCM, 1*32+15) /* Perf/Debug Capability MSR */
137 XEN_CPUFEATURE(PCID, 1*32+17) /*H Process Context ID */
138 XEN_CPUFEATURE(DCA, 1*32+18) /* Direct Cache Access */
139 XEN_CPUFEATURE(SSE4_1, 1*32+19) /*A Streaming SIMD Extensions 4.1 */
140 XEN_CPUFEATURE(SSE4_2, 1*32+20) /*A Streaming SIMD Extensions 4.2 */
141 XEN_CPUFEATURE(X2APIC, 1*32+21) /*!A Extended xAPIC */
142 XEN_CPUFEATURE(MOVBE, 1*32+22) /*A movbe instruction */
143 XEN_CPUFEATURE(POPCNT, 1*32+23) /*A POPCNT instruction */
144 XEN_CPUFEATURE(TSC_DEADLINE, 1*32+24) /*S TSC Deadline Timer */
145 XEN_CPUFEATURE(AESNI, 1*32+25) /*A AES instructions */
146 XEN_CPUFEATURE(XSAVE, 1*32+26) /*A XSAVE/XRSTOR/XSETBV/XGETBV */
147 XEN_CPUFEATURE(OSXSAVE, 1*32+27) /*! OSXSAVE */
148 XEN_CPUFEATURE(AVX, 1*32+28) /*A Advanced Vector Extensions */
149 XEN_CPUFEATURE(F16C, 1*32+29) /*A Half-precision convert instruction */
150 XEN_CPUFEATURE(RDRAND, 1*32+30) /*A Digital Random Number Generator */
151 XEN_CPUFEATURE(HYPERVISOR, 1*32+31) /*!A Running under some hypervisor */
154 XEN_CPUFEATURE(SYSCALL, 2*32+11) /*A SYSCALL/SYSRET */
155 XEN_CPUFEATURE(NX, 2*32+20) /*A Execute Disable */
156 XEN_CPUFEATURE(MMXEXT, 2*32+22) /*A AMD MMX extensions */
157 XEN_CPUFEATURE(FFXSR, 2*32+25) /*A FFXSR instruction optimizations */
158 XEN_CPUFEATURE(PAGE1GB, 2*32+26) /*H 1Gb large page support */
159 XEN_CPUFEATURE(RDTSCP, 2*32+27) /*S RDTSCP */
160 XEN_CPUFEATURE(LM, 2*32+29) /*A Long Mode (x86-64) */
161 XEN_CPUFEATURE(3DNOWEXT, 2*32+30) /*A AMD 3DNow! extensions */
162 XEN_CPUFEATURE(3DNOW, 2*32+31) /*A 3DNow! */
165 XEN_CPUFEATURE(LAHF_LM, 3*32+ 0) /*A LAHF/SAHF in long mode */
166 XEN_CPUFEATURE(CMP_LEGACY, 3*32+ 1) /*!A If yes HyperThreading not valid */
167 XEN_CPUFEATURE(SVM, 3*32+ 2) /*S Secure virtual machine */
168 XEN_CPUFEATURE(EXTAPIC, 3*32+ 3) /* Extended APIC space */
169 XEN_CPUFEATURE(CR8_LEGACY, 3*32+ 4) /*S CR8 in 32-bit mode */
170 XEN_CPUFEATURE(ABM, 3*32+ 5) /*A Advanced bit manipulation */
171 XEN_CPUFEATURE(SSE4A, 3*32+ 6) /*A SSE-4A */
172 XEN_CPUFEATURE(MISALIGNSSE, 3*32+ 7) /*A Misaligned SSE mode */
173 XEN_CPUFEATURE(3DNOWPREFETCH, 3*32+ 8) /*A 3DNow prefetch instructions */
174 XEN_CPUFEATURE(OSVW, 3*32+ 9) /* OS Visible Workaround */
175 XEN_CPUFEATURE(IBS, 3*32+10) /* Instruction Based Sampling */
176 XEN_CPUFEATURE(XOP, 3*32+11) /*A extended AVX instructions */
177 XEN_CPUFEATURE(SKINIT, 3*32+12) /* SKINIT/STGI instructions */
178 XEN_CPUFEATURE(WDT, 3*32+13) /* Watchdog timer */
179 XEN_CPUFEATURE(LWP, 3*32+15) /*S Light Weight Profiling */
180 XEN_CPUFEATURE(FMA4, 3*32+16) /*A 4 operands MAC instructions */
181 XEN_CPUFEATURE(NODEID_MSR, 3*32+19) /* NodeId MSR */
182 XEN_CPUFEATURE(TBM, 3*32+21) /*A trailing bit manipulations */
183 XEN_CPUFEATURE(TOPOEXT, 3*32+22) /* topology extensions CPUID leafs */
184 XEN_CPUFEATURE(DBEXT, 3*32+26) /*A data breakpoint extension */
185 XEN_CPUFEATURE(MONITORX, 3*32+29) /* MONITOR extension (MONITORX/MWAITX) */
188 XEN_CPUFEATURE(XSAVEOPT, 4*32+ 0) /*A XSAVEOPT instruction */
189 XEN_CPUFEATURE(XSAVEC, 4*32+ 1) /*A XSAVEC/XRSTORC instructions */
190 XEN_CPUFEATURE(XGETBV1, 4*32+ 2) /*A XGETBV with %ecx=1 */
191 XEN_CPUFEATURE(XSAVES, 4*32+ 3) /*S XSAVES/XRSTORS instructions */
194 XEN_CPUFEATURE(FSGSBASE, 5*32+ 0) /*A {RD,WR}{FS,GS}BASE instructions */
195 XEN_CPUFEATURE(TSC_ADJUST, 5*32+ 1) /*S TSC_ADJUST MSR available */
196 XEN_CPUFEATURE(SGX, 5*32+ 2) /* Software Guard extensions */
197 XEN_CPUFEATURE(BMI1, 5*32+ 3) /*A 1st bit manipulation extensions */
198 XEN_CPUFEATURE(HLE, 5*32+ 4) /*A Hardware Lock Elision */
199 XEN_CPUFEATURE(AVX2, 5*32+ 5) /*A AVX2 instructions */
200 XEN_CPUFEATURE(FDP_EXCP_ONLY, 5*32+ 6) /*! x87 FDP only updated on exception. */
201 XEN_CPUFEATURE(SMEP, 5*32+ 7) /*S Supervisor Mode Execution Protection */
202 XEN_CPUFEATURE(BMI2, 5*32+ 8) /*A 2nd bit manipulation extensions */
203 XEN_CPUFEATURE(ERMS, 5*32+ 9) /*A Enhanced REP MOVSB/STOSB */
204 XEN_CPUFEATURE(INVPCID, 5*32+10) /*H Invalidate Process Context ID */
205 XEN_CPUFEATURE(RTM, 5*32+11) /*A Restricted Transactional Memory */
206 XEN_CPUFEATURE(PQM, 5*32+12) /* Platform QoS Monitoring */
207 XEN_CPUFEATURE(NO_FPU_SEL, 5*32+13) /*! FPU CS/DS stored as zero */
208 XEN_CPUFEATURE(MPX, 5*32+14) /*S Memory Protection Extensions */
209 XEN_CPUFEATURE(PQE, 5*32+15) /* Platform QoS Enforcement */
210 XEN_CPUFEATURE(AVX512F, 5*32+16) /*A AVX-512 Foundation Instructions */
211 XEN_CPUFEATURE(AVX512DQ, 5*32+17) /*A AVX-512 Doubleword & Quadword Instrs */
212 XEN_CPUFEATURE(RDSEED, 5*32+18) /*A RDSEED instruction */
213 XEN_CPUFEATURE(ADX, 5*32+19) /*A ADCX, ADOX instructions */
214 XEN_CPUFEATURE(SMAP, 5*32+20) /*S Supervisor Mode Access Prevention */
215 XEN_CPUFEATURE(AVX512IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */
216 XEN_CPUFEATURE(CLFLUSHOPT, 5*32+23) /*A CLFLUSHOPT instruction */
217 XEN_CPUFEATURE(CLWB, 5*32+24) /*A CLWB instruction */
218 XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */
219 XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */
220 XEN_CPUFEATURE(AVX512CD, 5*32+28) /*A AVX-512 Conflict Detection Instrs */
221 XEN_CPUFEATURE(SHA, 5*32+29) /*A SHA1 & SHA256 instructions */
222 XEN_CPUFEATURE(AVX512BW, 5*32+30) /*A AVX-512 Byte and Word Instructions */
223 XEN_CPUFEATURE(AVX512VL, 5*32+31) /*A AVX-512 Vector Length Extensions */
226 XEN_CPUFEATURE(PREFETCHWT1, 6*32+ 0) /*A PREFETCHWT1 instruction */
227 XEN_CPUFEATURE(AVX512VBMI, 6*32+ 1) /*A AVX-512 Vector Byte Manipulation Instrs */
228 XEN_CPUFEATURE(UMIP, 6*32+ 2) /*S User Mode Instruction Prevention */
229 XEN_CPUFEATURE(PKU, 6*32+ 3) /*H Protection Keys for Userspace */
230 XEN_CPUFEATURE(OSPKE, 6*32+ 4) /*! OS Protection Keys Enable */
231 XEN_CPUFEATURE(AVX512_VPOPCNTDQ, 6*32+14) /*A POPCNT for vectors of DW/QW */
232 XEN_CPUFEATURE(RDPID, 6*32+22) /*A RDPID instruction */
235 XEN_CPUFEATURE(ITSC, 7*32+ 8) /* Invariant TSC */
236 XEN_CPUFEATURE(EFRO, 7*32+10) /* APERF/MPERF Read Only interface */
239 XEN_CPUFEATURE(CLZERO, 8*32+ 0) /*A CLZERO instruction */
242 XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) /*A AVX512 Neural Network Instructions */
243 XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A AVX512 Multiply Accumulation Single Precision */
250 #undef XEN_CPUFEATURE