section sim
  clkcycle = 20ns
end

section VAPI
  server_port = 50000
  log_enabled = 0
  vapi_log_file = "vapi.log"
end

section cpu
  ver = 0x0
  cfgr = 0x20
  rev = 0x0001
end

section memory
  name        = "RAM"
  type        = unknown
  baseaddr    = 0x00000000
  size        = 0x02000000
  delayr      = 1
  delayw      = 1
end

section dmmu
  enabled   = 1
  nsets     = 64
  nways     = 1
  pagesize  = 8192
  hitdelay  = 0
  missdelay = 0
end

section immu
  enabled   = 1
  nsets     = 64
  nways     = 1
  pagesize  = 8192
  hitdelay  = 0
  missdelay = 0
end

section dc
  enabled         = 1
  nsets           = 256
  nways           = 1
  blocksize       = 16
  load_hitdelay   = 0
  load_missdelay  = 0
  store_hitdelay  = 0
  store_missdelay = 0
end

section ic
  enabled   = 1
  nsets     = 256
  nways     = 1
  blocksize = 16
  hitdelay  = 0
  missdelay = 0
end

section pic
  enabled = 1
  edge_trigger = 0
end

section debug
  enabled = 0
end

section uart
  enabled  = 1
  baseaddr = 0x90000000
  irq      = 2
  16550    = 1
end

section ethernet
  enabled  = 1
  baseaddr = 0x92000000
  irq      = 4
  rtx_type = 0
end