1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Common library for ADIS16XXX devices
4 *
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
8
9 #ifndef __IIO_ADIS_H__
10 #define __IIO_ADIS_H__
11
12 #include <linux/spi/spi.h>
13 #include <linux/interrupt.h>
14 #include <linux/iio/types.h>
15
16 #define ADIS_WRITE_REG(reg) ((0x80 | (reg)))
17 #define ADIS_READ_REG(reg) ((reg) & 0x7f)
18
19 #define ADIS_PAGE_SIZE 0x80
20 #define ADIS_REG_PAGE_ID 0x00
21
22 struct adis;
23
24 /**
25 * struct adis_timeouts - ADIS chip variant timeouts
26 * @reset_ms - Wait time after rst pin goes inactive
27 * @sw_reset_ms - Wait time after sw reset command
28 * @self_test_ms - Wait time after self test command
29 */
30 struct adis_timeout {
31 u16 reset_ms;
32 u16 sw_reset_ms;
33 u16 self_test_ms;
34 };
35
36 /**
37 * struct adis_data - ADIS chip variant specific data
38 * @read_delay: SPI delay for read operations in us
39 * @write_delay: SPI delay for write operations in us
40 * @cs_change_delay: SPI delay between CS changes in us
41 * @glob_cmd_reg: Register address of the GLOB_CMD register
42 * @msc_ctrl_reg: Register address of the MSC_CTRL register
43 * @diag_stat_reg: Register address of the DIAG_STAT register
44 * @prod_id_reg: Register address of the PROD_ID register
45 * @prod_id: Product ID code that should be expected when reading @prod_id_reg
46 * @self_test_mask: Bitmask of supported self-test operations
47 * @self_test_reg: Register address to request self test command
48 * @self_test_no_autoclear: True if device's self-test needs clear of ctrl reg
49 * @status_error_msgs: Array of error messages
50 * @status_error_mask: Bitmask of errors supported by the device
51 * @timeouts: Chip specific delays
52 * @enable_irq: Hook for ADIS devices that have a special IRQ enable/disable
53 * @unmasked_drdy: True for devices that cannot mask/unmask the data ready pin
54 * @has_paging: True if ADIS device has paged registers
55 * @burst_reg_cmd: Register command that triggers burst
56 * @burst_len: Burst size in the SPI RX buffer. If @burst_max_len is defined,
57 * this should be the minimum size supported by the device.
58 * @burst_max_len: Holds the maximum burst size when the device supports
59 * more than one burst mode with different sizes
60 * @burst_max_speed_hz: Maximum spi speed that can be used in burst mode
61 */
62 struct adis_data {
63 unsigned int read_delay;
64 unsigned int write_delay;
65 unsigned int cs_change_delay;
66
67 unsigned int glob_cmd_reg;
68 unsigned int msc_ctrl_reg;
69 unsigned int diag_stat_reg;
70 unsigned int prod_id_reg;
71
72 unsigned int prod_id;
73
74 unsigned int self_test_mask;
75 unsigned int self_test_reg;
76 bool self_test_no_autoclear;
77 const struct adis_timeout *timeouts;
78
79 const char * const *status_error_msgs;
80 unsigned int status_error_mask;
81
82 int (*enable_irq)(struct adis *adis, bool enable);
83 bool unmasked_drdy;
84
85 bool has_paging;
86
87 unsigned int burst_reg_cmd;
88 unsigned int burst_len;
89 unsigned int burst_max_len;
90 unsigned int burst_max_speed_hz;
91 };
92
93 /**
94 * struct adis - ADIS device instance data
95 * @spi: Reference to SPI device which owns this ADIS IIO device
96 * @trig: IIO trigger object data
97 * @data: ADIS chip variant specific data
98 * @burst: ADIS burst transfer information
99 * @burst_extra_len: Burst extra length. Should only be used by devices that can
100 * dynamically change their burst mode length.
101 * @state_lock: Lock used by the device to protect state
102 * @msg: SPI message object
103 * @xfer: SPI transfer objects to be used for a @msg
104 * @current_page: Some ADIS devices have registers, this selects current page
105 * @irq_flag: IRQ handling flags as passed to request_irq()
106 * @buffer: Data buffer for information read from the device
107 * @tx: DMA safe TX buffer for SPI transfers
108 * @rx: DMA safe RX buffer for SPI transfers
109 */
110 struct adis {
111 struct spi_device *spi;
112 struct iio_trigger *trig;
113
114 const struct adis_data *data;
115 unsigned int burst_extra_len;
116 /**
117 * The state_lock is meant to be used during operations that require
118 * a sequence of SPI R/W in order to protect the SPI transfer
119 * information (fields 'xfer', 'msg' & 'current_page') between
120 * potential concurrent accesses.
121 * This lock is used by all "adis_{functions}" that have to read/write
122 * registers. These functions also have unlocked variants
123 * (see "__adis_{functions}"), which don't hold this lock.
124 * This allows users of the ADIS library to group SPI R/W into
125 * the drivers, but they also must manage this lock themselves.
126 */
127 struct mutex state_lock;
128 struct spi_message msg;
129 struct spi_transfer *xfer;
130 unsigned int current_page;
131 unsigned long irq_flag;
132 void *buffer;
133
134 u8 tx[10] ____cacheline_aligned;
135 u8 rx[4];
136 };
137
138 int adis_init(struct adis *adis, struct iio_dev *indio_dev,
139 struct spi_device *spi, const struct adis_data *data);
140 int __adis_reset(struct adis *adis);
141
142 /**
143 * adis_reset() - Reset the device
144 * @adis: The adis device
145 *
146 * Returns 0 on success, a negative error code otherwise
147 */
adis_reset(struct adis * adis)148 static inline int adis_reset(struct adis *adis)
149 {
150 int ret;
151
152 mutex_lock(&adis->state_lock);
153 ret = __adis_reset(adis);
154 mutex_unlock(&adis->state_lock);
155
156 return ret;
157 }
158
159 int __adis_write_reg(struct adis *adis, unsigned int reg,
160 unsigned int val, unsigned int size);
161 int __adis_read_reg(struct adis *adis, unsigned int reg,
162 unsigned int *val, unsigned int size);
163
164 /**
165 * __adis_write_reg_8() - Write single byte to a register (unlocked)
166 * @adis: The adis device
167 * @reg: The address of the register to be written
168 * @value: The value to write
169 */
__adis_write_reg_8(struct adis * adis,unsigned int reg,u8 val)170 static inline int __adis_write_reg_8(struct adis *adis, unsigned int reg,
171 u8 val)
172 {
173 return __adis_write_reg(adis, reg, val, 1);
174 }
175
176 /**
177 * __adis_write_reg_16() - Write 2 bytes to a pair of registers (unlocked)
178 * @adis: The adis device
179 * @reg: The address of the lower of the two registers
180 * @value: Value to be written
181 */
__adis_write_reg_16(struct adis * adis,unsigned int reg,u16 val)182 static inline int __adis_write_reg_16(struct adis *adis, unsigned int reg,
183 u16 val)
184 {
185 return __adis_write_reg(adis, reg, val, 2);
186 }
187
188 /**
189 * __adis_write_reg_32() - write 4 bytes to four registers (unlocked)
190 * @adis: The adis device
191 * @reg: The address of the lower of the four register
192 * @value: Value to be written
193 */
__adis_write_reg_32(struct adis * adis,unsigned int reg,u32 val)194 static inline int __adis_write_reg_32(struct adis *adis, unsigned int reg,
195 u32 val)
196 {
197 return __adis_write_reg(adis, reg, val, 4);
198 }
199
200 /**
201 * __adis_read_reg_16() - read 2 bytes from a 16-bit register (unlocked)
202 * @adis: The adis device
203 * @reg: The address of the lower of the two registers
204 * @val: The value read back from the device
205 */
__adis_read_reg_16(struct adis * adis,unsigned int reg,u16 * val)206 static inline int __adis_read_reg_16(struct adis *adis, unsigned int reg,
207 u16 *val)
208 {
209 unsigned int tmp;
210 int ret;
211
212 ret = __adis_read_reg(adis, reg, &tmp, 2);
213 if (ret == 0)
214 *val = tmp;
215
216 return ret;
217 }
218
219 /**
220 * __adis_read_reg_32() - read 4 bytes from a 32-bit register (unlocked)
221 * @adis: The adis device
222 * @reg: The address of the lower of the two registers
223 * @val: The value read back from the device
224 */
__adis_read_reg_32(struct adis * adis,unsigned int reg,u32 * val)225 static inline int __adis_read_reg_32(struct adis *adis, unsigned int reg,
226 u32 *val)
227 {
228 unsigned int tmp;
229 int ret;
230
231 ret = __adis_read_reg(adis, reg, &tmp, 4);
232 if (ret == 0)
233 *val = tmp;
234
235 return ret;
236 }
237
238 /**
239 * adis_write_reg() - write N bytes to register
240 * @adis: The adis device
241 * @reg: The address of the lower of the two registers
242 * @value: The value to write to device (up to 4 bytes)
243 * @size: The size of the @value (in bytes)
244 */
adis_write_reg(struct adis * adis,unsigned int reg,unsigned int val,unsigned int size)245 static inline int adis_write_reg(struct adis *adis, unsigned int reg,
246 unsigned int val, unsigned int size)
247 {
248 int ret;
249
250 mutex_lock(&adis->state_lock);
251 ret = __adis_write_reg(adis, reg, val, size);
252 mutex_unlock(&adis->state_lock);
253
254 return ret;
255 }
256
257 /**
258 * adis_read_reg() - read N bytes from register
259 * @adis: The adis device
260 * @reg: The address of the lower of the two registers
261 * @val: The value read back from the device
262 * @size: The size of the @val buffer
263 */
adis_read_reg(struct adis * adis,unsigned int reg,unsigned int * val,unsigned int size)264 static int adis_read_reg(struct adis *adis, unsigned int reg,
265 unsigned int *val, unsigned int size)
266 {
267 int ret;
268
269 mutex_lock(&adis->state_lock);
270 ret = __adis_read_reg(adis, reg, val, size);
271 mutex_unlock(&adis->state_lock);
272
273 return ret;
274 }
275
276 /**
277 * adis_write_reg_8() - Write single byte to a register
278 * @adis: The adis device
279 * @reg: The address of the register to be written
280 * @value: The value to write
281 */
adis_write_reg_8(struct adis * adis,unsigned int reg,u8 val)282 static inline int adis_write_reg_8(struct adis *adis, unsigned int reg,
283 u8 val)
284 {
285 return adis_write_reg(adis, reg, val, 1);
286 }
287
288 /**
289 * adis_write_reg_16() - Write 2 bytes to a pair of registers
290 * @adis: The adis device
291 * @reg: The address of the lower of the two registers
292 * @value: Value to be written
293 */
adis_write_reg_16(struct adis * adis,unsigned int reg,u16 val)294 static inline int adis_write_reg_16(struct adis *adis, unsigned int reg,
295 u16 val)
296 {
297 return adis_write_reg(adis, reg, val, 2);
298 }
299
300 /**
301 * adis_write_reg_32() - write 4 bytes to four registers
302 * @adis: The adis device
303 * @reg: The address of the lower of the four register
304 * @value: Value to be written
305 */
adis_write_reg_32(struct adis * adis,unsigned int reg,u32 val)306 static inline int adis_write_reg_32(struct adis *adis, unsigned int reg,
307 u32 val)
308 {
309 return adis_write_reg(adis, reg, val, 4);
310 }
311
312 /**
313 * adis_read_reg_16() - read 2 bytes from a 16-bit register
314 * @adis: The adis device
315 * @reg: The address of the lower of the two registers
316 * @val: The value read back from the device
317 */
adis_read_reg_16(struct adis * adis,unsigned int reg,u16 * val)318 static inline int adis_read_reg_16(struct adis *adis, unsigned int reg,
319 u16 *val)
320 {
321 unsigned int tmp;
322 int ret;
323
324 ret = adis_read_reg(adis, reg, &tmp, 2);
325 if (ret == 0)
326 *val = tmp;
327
328 return ret;
329 }
330
331 /**
332 * adis_read_reg_32() - read 4 bytes from a 32-bit register
333 * @adis: The adis device
334 * @reg: The address of the lower of the two registers
335 * @val: The value read back from the device
336 */
adis_read_reg_32(struct adis * adis,unsigned int reg,u32 * val)337 static inline int adis_read_reg_32(struct adis *adis, unsigned int reg,
338 u32 *val)
339 {
340 unsigned int tmp;
341 int ret;
342
343 ret = adis_read_reg(adis, reg, &tmp, 4);
344 if (ret == 0)
345 *val = tmp;
346
347 return ret;
348 }
349
350 int __adis_update_bits_base(struct adis *adis, unsigned int reg, const u32 mask,
351 const u32 val, u8 size);
352 /**
353 * adis_update_bits_base() - ADIS Update bits function - Locked version
354 * @adis: The adis device
355 * @reg: The address of the lower of the two registers
356 * @mask: Bitmask to change
357 * @val: Value to be written
358 * @size: Size of the register to update
359 *
360 * Updates the desired bits of @reg in accordance with @mask and @val.
361 */
adis_update_bits_base(struct adis * adis,unsigned int reg,const u32 mask,const u32 val,u8 size)362 static inline int adis_update_bits_base(struct adis *adis, unsigned int reg,
363 const u32 mask, const u32 val, u8 size)
364 {
365 int ret;
366
367 mutex_lock(&adis->state_lock);
368 ret = __adis_update_bits_base(adis, reg, mask, val, size);
369 mutex_unlock(&adis->state_lock);
370 return ret;
371 }
372
373 /**
374 * adis_update_bits() - Wrapper macro for adis_update_bits_base - Locked version
375 * @adis: The adis device
376 * @reg: The address of the lower of the two registers
377 * @mask: Bitmask to change
378 * @val: Value to be written
379 *
380 * This macro evaluates the sizeof of @val at compile time and calls
381 * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
382 * @val can lead to undesired behavior if the register to update is 16bit.
383 */
384 #define adis_update_bits(adis, reg, mask, val) ({ \
385 BUILD_BUG_ON(sizeof(val) != 2 && sizeof(val) != 4); \
386 adis_update_bits_base(adis, reg, mask, val, sizeof(val)); \
387 })
388
389 /**
390 * adis_update_bits() - Wrapper macro for adis_update_bits_base
391 * @adis: The adis device
392 * @reg: The address of the lower of the two registers
393 * @mask: Bitmask to change
394 * @val: Value to be written
395 *
396 * This macro evaluates the sizeof of @val at compile time and calls
397 * adis_update_bits_base() accordingly. Be aware that using MACROS/DEFINES for
398 * @val can lead to undesired behavior if the register to update is 16bit.
399 */
400 #define __adis_update_bits(adis, reg, mask, val) ({ \
401 BUILD_BUG_ON(sizeof(val) != 2 && sizeof(val) != 4); \
402 __adis_update_bits_base(adis, reg, mask, val, sizeof(val)); \
403 })
404
405 int __adis_check_status(struct adis *adis);
406 int __adis_initial_startup(struct adis *adis);
407 int __adis_enable_irq(struct adis *adis, bool enable);
408
adis_enable_irq(struct adis * adis,bool enable)409 static inline int adis_enable_irq(struct adis *adis, bool enable)
410 {
411 int ret;
412
413 mutex_lock(&adis->state_lock);
414 ret = __adis_enable_irq(adis, enable);
415 mutex_unlock(&adis->state_lock);
416
417 return ret;
418 }
419
adis_check_status(struct adis * adis)420 static inline int adis_check_status(struct adis *adis)
421 {
422 int ret;
423
424 mutex_lock(&adis->state_lock);
425 ret = __adis_check_status(adis);
426 mutex_unlock(&adis->state_lock);
427
428 return ret;
429 }
430
adis_dev_lock(struct adis * adis)431 static inline void adis_dev_lock(struct adis *adis)
432 {
433 mutex_lock(&adis->state_lock);
434 }
435
adis_dev_unlock(struct adis * adis)436 static inline void adis_dev_unlock(struct adis *adis)
437 {
438 mutex_unlock(&adis->state_lock);
439 }
440
441 int adis_single_conversion(struct iio_dev *indio_dev,
442 const struct iio_chan_spec *chan,
443 unsigned int error_mask, int *val);
444
445 #define ADIS_VOLTAGE_CHAN(addr, si, chan, name, info_all, bits) { \
446 .type = IIO_VOLTAGE, \
447 .indexed = 1, \
448 .channel = (chan), \
449 .extend_name = name, \
450 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
451 BIT(IIO_CHAN_INFO_SCALE), \
452 .info_mask_shared_by_all = info_all, \
453 .address = (addr), \
454 .scan_index = (si), \
455 .scan_type = { \
456 .sign = 'u', \
457 .realbits = (bits), \
458 .storagebits = 16, \
459 .endianness = IIO_BE, \
460 }, \
461 }
462
463 #define ADIS_SUPPLY_CHAN(addr, si, info_all, bits) \
464 ADIS_VOLTAGE_CHAN(addr, si, 0, "supply", info_all, bits)
465
466 #define ADIS_AUX_ADC_CHAN(addr, si, info_all, bits) \
467 ADIS_VOLTAGE_CHAN(addr, si, 1, NULL, info_all, bits)
468
469 #define ADIS_TEMP_CHAN(addr, si, info_all, bits) { \
470 .type = IIO_TEMP, \
471 .indexed = 1, \
472 .channel = 0, \
473 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
474 BIT(IIO_CHAN_INFO_SCALE) | \
475 BIT(IIO_CHAN_INFO_OFFSET), \
476 .info_mask_shared_by_all = info_all, \
477 .address = (addr), \
478 .scan_index = (si), \
479 .scan_type = { \
480 .sign = 'u', \
481 .realbits = (bits), \
482 .storagebits = 16, \
483 .endianness = IIO_BE, \
484 }, \
485 }
486
487 #define ADIS_MOD_CHAN(_type, mod, addr, si, info_sep, info_all, bits) { \
488 .type = (_type), \
489 .modified = 1, \
490 .channel2 = IIO_MOD_ ## mod, \
491 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
492 (info_sep), \
493 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
494 .info_mask_shared_by_all = info_all, \
495 .address = (addr), \
496 .scan_index = (si), \
497 .scan_type = { \
498 .sign = 's', \
499 .realbits = (bits), \
500 .storagebits = 16, \
501 .endianness = IIO_BE, \
502 }, \
503 }
504
505 #define ADIS_ACCEL_CHAN(mod, addr, si, info_sep, info_all, bits) \
506 ADIS_MOD_CHAN(IIO_ACCEL, mod, addr, si, info_sep, info_all, bits)
507
508 #define ADIS_GYRO_CHAN(mod, addr, si, info_sep, info_all, bits) \
509 ADIS_MOD_CHAN(IIO_ANGL_VEL, mod, addr, si, info_sep, info_all, bits)
510
511 #define ADIS_INCLI_CHAN(mod, addr, si, info_sep, info_all, bits) \
512 ADIS_MOD_CHAN(IIO_INCLI, mod, addr, si, info_sep, info_all, bits)
513
514 #define ADIS_ROT_CHAN(mod, addr, si, info_sep, info_all, bits) \
515 ADIS_MOD_CHAN(IIO_ROT, mod, addr, si, info_sep, info_all, bits)
516
517 #ifdef CONFIG_IIO_ADIS_LIB_BUFFER
518
519 int
520 devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
521 irq_handler_t trigger_handler);
522
523 int devm_adis_probe_trigger(struct adis *adis, struct iio_dev *indio_dev);
524
525 int adis_update_scan_mode(struct iio_dev *indio_dev,
526 const unsigned long *scan_mask);
527
528 #else /* CONFIG_IIO_BUFFER */
529
530 static inline int
devm_adis_setup_buffer_and_trigger(struct adis * adis,struct iio_dev * indio_dev,irq_handler_t trigger_handler)531 devm_adis_setup_buffer_and_trigger(struct adis *adis, struct iio_dev *indio_dev,
532 irq_handler_t trigger_handler)
533 {
534 return 0;
535 }
536
devm_adis_probe_trigger(struct adis * adis,struct iio_dev * indio_dev)537 static inline int devm_adis_probe_trigger(struct adis *adis,
538 struct iio_dev *indio_dev)
539 {
540 return 0;
541 }
542
543 #define adis_update_scan_mode NULL
544
545 #endif /* CONFIG_IIO_BUFFER */
546
547 #ifdef CONFIG_DEBUG_FS
548
549 int adis_debugfs_reg_access(struct iio_dev *indio_dev,
550 unsigned int reg, unsigned int writeval,
551 unsigned int *readval);
552
553 #else
554
555 #define adis_debugfs_reg_access NULL
556
557 #endif
558
559 #endif
560