1 /**
2 ******************************************************************************
3 * @file rtl8721dlp_rcc.h
4 * @author
5 * @version V1.0.0
6 * @date 2016-05-17
7 * @brief This file contains all the functions prototypes for peripheral reset and clock control driver.
8 ******************************************************************************
9 * @attention
10 *
11 * This module is a confidential and proprietary property of RealTek and
12 * possession or use of this module requires written permission of RealTek.
13 *
14 * Copyright(c) 2015, Realtek Semiconductor Corporation. All rights reserved.
15 ******************************************************************************
16 */
17
18 #ifndef _RTL8721D_LP_RCC_H_
19 #define _RTL8721D_LP_RCC_H_
20
21 /** @addtogroup AmebaD_Platform
22 * @{
23 */
24
25 /** @defgroup RCC
26 * @brief RCC driver modules
27 * @{
28 */
29
30
31 /** @defgroup LP_RCC
32 * @verbatim
33 *****************************************************************************************
34 * Introduction
35 *****************************************************************************************
36 * - functions prototypes for peripheral reset and clock control driver.
37 *
38 *****************************************************************************************
39 *
40 *****************************************************************************************
41 * how to use
42 *****************************************************************************************
43 * use UART0 as example:
44 * RCC_PeriphClockCmd(APBPeriph_UART0, APBPeriph_UART0_CLOCK, ENABLE);
45 *
46 *****************************************************************************************
47 * @endverbatim
48 */
49
50 /** @addtogroup LP_RCC
51 * @brief LP_RCC driver modules
52 * @{
53 */
54
55 /* Exported constants --------------------------------------------------------*/
56
57 /** @defgroup LP_RCC_CLK_Exported_Constants LP_RCC CLK Exported Constants
58 * @{
59 */
60 #define SYS_CLK_CTRL0 0x00 //0x210
61 #define SYS_CLK_CTRL1 0x01 //0x214
62 #define SYS_CLK_CTRL2 0x02 //0x004 AON
63 #define SYS_CLK_CTRL3 0x03 //TODO
64 #define APBPeriph_CLOCK_NULL 0 //if you dont want to set any clock, you can use this
65
66 #define APBPeriph_WLON_CLOCK (SYS_CLK_CTRL0 << 30 | BIT_LSYS_WLON_CKE)
67 #define APBPeriph_FLASH_CLOCK (SYS_CLK_CTRL0 << 30 | BIT_FLASH_CKE)
68 #define APBPeriph_GDMA0_CLOCK (SYS_CLK_CTRL0 << 30 | BIT_LSYS_GDMA0_CKE)
69 #define APBPeriph_EFUSE_CLOCK (SYS_CLK_CTRL0 << 30 | BIT_SYSON_CK_EELDR_EN)
70
71 #define APBPeriph_GPIO_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_GPIO0_CKE)
72 #define APBPeriph_QDEC0_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_QDEC0_CKE)
73 #define APBPeriph_SGPIO_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_SPGIO0_CKE)
74 #define APBPeriph_I2C0_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_I2C0_CKE)
75 #define APBPeriph_ADC_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_ADC_CKE)
76 #define APBPeriph_UART1_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_UART1_CKE)
77 #define APBPeriph_LOGUART_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_UART0_CKE)
78 #define APBPeriph_GTIMER_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_TIMER0_CKE)
79 #define APBPeriph_IPC_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_LSYS_IPC_CKE)
80 #define APBPeriph_VENDOR_REG_CLOCK (SYS_CLK_CTRL1 << 30 | BIT_VENDOR_CKE)
81
82 #define APBPeriph_RTC_CLOCK (SYS_CLK_CTRL2 << 30 | BIT_AON_RTC_CKE)
83 #define APBPeriph_CTOUCH_CLOCK (SYS_CLK_CTRL2 << 30 | BIT_AON_CTOUCH_CKE)
84 #define APBPeriph_CK32KGEN_CLOCK (SYS_CLK_CTRL2 << 30 | BIT_AON_CK32KGEN_CKE)
85 #define APBPeriph_KEYSCAN_CLOCK (SYS_CLK_CTRL2 << 30 | BIT_AON_KEYSCAN_CKE)
86 #define APBPeriph_TSF_CLOCK (SYS_CLK_CTRL2 << 30 | BIT_AON_TSF_CKE)
87
88 /* Switch SPIC clock using RCC_PeriphClockSource_SPIC(), don't use the following macro. Because SPIC has RCC_PeriphClockCmd has bug. */
89 #define APBPeriph_FLASH_CLOCK_ANA4M (SYS_CLK_CTRL0 << 30 | BIT_FLASH_CKE | BIT_SHIFT_FLASH_CLK_ANA4M)
90 #define APBPeriph_FLASH_CLOCK_XTAL (SYS_CLK_CTRL0 << 30 | BIT_FLASH_CKE | BIT_SHIFT_FLASH_CLK_XTAL)
91 #define APBPeriph_FLASH_CLOCK_PLL (SYS_CLK_CTRL0 << 30 | BIT_FLASH_CKE | BIT_SHIFT_FLASH_CLK_PLL)
92
93 /**
94 * @}
95 */
96
97 /** @defgroup LP_RCC_FUNC_Exported_Constants LP_RCC FUNC Exported Constants
98 * @{
99 */
100 #define SYS_FUNC_EN0 0x03 //0x208
101 #define SYS_FUNC_EN1 0x02 //0x20C
102 #define SYS_FUNC_EN2 0x01 //0x004 AON
103 #define SYS_FUNC_EN3 0x00 //TODO
104 #define APBPeriph_NULL 0 //if you dont want to set any function, you can use this
105
106 #define APBPeriph_WLON (SYS_FUNC_EN0 << 30 | BIT_LSYS_WLON_FEN)
107 #define APBPeriph_FLASH (SYS_FUNC_EN0 << 30 | BIT_FLASH_FUN_EN)
108 #define APBPeriph_GDMA0 (SYS_FUNC_EN0 << 30 | BIT_LSYS_GDMA0_FEN)
109 #define APBPeriph_EFUSE (SYS_FUNC_EN0 << 30 | BIT_SYS_FEN_EELDR)
110
111 #define APBPeriph_GPIO (SYS_FUNC_EN1 << 30 | BIT_LSYS_GPIO0_FEN)
112 #define APBPeriph_QDEC0 (SYS_FUNC_EN1 << 30 | BIT_LSYS_QDEC0_FEN)
113 #define APBPeriph_SGPIO (SYS_FUNC_EN1 << 30 | BIT_LSYS_SPGIO0_FEN)
114 #define APBPeriph_I2C0 (SYS_FUNC_EN1 << 30 | BIT_LSYS_I2C0_FEN)
115 #define APBPeriph_ADC (SYS_FUNC_EN1 << 30 | BIT_LSYS_ADC_FEN)
116 #define APBPeriph_UART1 (SYS_FUNC_EN1 << 30 | BIT_LSYS_UART1_FEN_GLB | BIT_LSYS_UART1_FEN_FUN)
117 #define APBPeriph_LOGUART (SYS_FUNC_EN1 << 30 | BIT_LSYS_UART0_FEN_GLB | BIT_LSYS_UART0_FEN_FUN)
118 #define APBPeriph_GTIMER (SYS_FUNC_EN1 << 30 | BIT_LSYS_TIMER0_FEN)
119 #define APBPeriph_IPC (SYS_FUNC_EN1 << 30 | BIT_LSYS_IPC_FEN)
120 #define APBPeriph_VENDOR_REG (SYS_FUNC_EN1 << 30 | BIT_VENDOR_EN)
121
122 #define APBPeriph_RTC (SYS_FUNC_EN2 << 30 | BIT_AON_RTC_FEN)
123 #define APBPeriph_CTOUCH (SYS_FUNC_EN2 << 30 | BIT_AON_CTOUCH_FEN)
124 #define APBPeriph_CK32KGEN (SYS_FUNC_EN2 << 30 | BIT_AON_CK32KGEN_FEN)
125 #define APBPeriph_KEYSCAN (SYS_FUNC_EN2 << 30 | BIT_AON_KEYSCAN_FEN)
126 #define APBPeriph_TSF (SYS_FUNC_EN2 << 30 | BIT_AON_TSF_FEN)
127
128 /**
129 * @}
130 */
131
132 /* Exported functions --------------------------------------------------------*/
133 /** @defgroup LP_RCC_Exported_Functions LP_RCC Exported Functions
134 * @{
135 */
136 _LONG_CALL_ void RCC_PeriphClockCmd(u32 APBPeriph, u32 APBPeriph_Clock, u8 NewState);
137 _LONG_CALL_ void RCC_PeriphClockSource_RTC(u32 Xtal);
138 _LONG_CALL_ void RCC_PeriphClockSource_I2C(UNUSED_WARN_DIS u32 Idx, u32 Source);
139 _LONG_CALL_ void RCC_PeriphClockSource_QDEC(UNUSED_WARN_DIS u32 Idx, u32 Source);
140 _LONG_CALL_ void RCC_PeriphClockSource_UART (UART_TypeDef* UARTx, u32 Source);
141
142 /**
143 * @brief Configure SPIC Clock.
144 * @param Source: This parameter can be one of the following values:
145 * @arg BIT_SHIFT_FLASH_CLK_ANA4M
146 * @arg BIT_SHIFT_FLASH_CLK_XTAL
147 * @arg BIT_SHIFT_FLASH_CLK_PLL
148 * @retval None
149 * @note Used to switch SPIC clock
150 */
RCC_PeriphClockSource_SPIC(u32 Source)151 __STATIC_INLINE void RCC_PeriphClockSource_SPIC (u32 Source)
152 {
153 u32 Temp = 0;
154
155 Temp = HAL_READ32(SYSTEM_CTRL_BASE_LP, REG_LP_CLK_CTRL0);
156 Temp &= ~ (BIT_MASK_FLASH_CLK_SEL << BIT_SHIFT_FLASH_CLK_SEL);
157 Temp |= Source;
158 HAL_WRITE32(SYSTEM_CTRL_BASE_LP, REG_LP_CLK_CTRL0, Temp);
159 }
160
161 /**
162 * @}
163 */
164
165 /**
166 * @}
167 */
168
169 /**
170 * @}
171 */
172
173 /**
174 * @}
175 */
176
177 /* Registers Definitions --------------------------------------------------------*/
178 /* Other definations --------------------------------------------------------*/
179
180 #endif /* _RTL8721D_LP_RCC_H_ */
181 /******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
182