1 /*
2  * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 #ifndef COMMON_DEF_H
7 #define COMMON_DEF_H
8 
9 #include <common/bl_common.h>
10 #include <lib/utils_def.h>
11 #include <lib/xlat_tables/xlat_tables_defs.h>
12 
13 #include <platform_def.h>
14 
15 #define SZ_32				U(0x00000020)
16 #define SZ_64				U(0x00000040)
17 #define SZ_128				U(0x00000080)
18 #define SZ_256				U(0x00000100)
19 #define SZ_512				U(0x00000200)
20 
21 #define SZ_1K				U(0x00000400)
22 #define SZ_2K				U(0x00000800)
23 #define SZ_4K				U(0x00001000)
24 #define SZ_8K				U(0x00002000)
25 #define SZ_16K				U(0x00004000)
26 #define SZ_32K				U(0x00008000)
27 #define SZ_64K				U(0x00010000)
28 #define SZ_128K				U(0x00020000)
29 #define SZ_256K				U(0x00040000)
30 #define SZ_512K				U(0x00080000)
31 
32 #define SZ_1M				U(0x00100000)
33 #define SZ_2M				U(0x00200000)
34 #define SZ_4M				U(0x00400000)
35 #define SZ_8M				U(0x00800000)
36 #define SZ_16M				U(0x01000000)
37 #define SZ_32M				U(0x02000000)
38 #define SZ_64M				U(0x04000000)
39 #define SZ_128M				U(0x08000000)
40 #define SZ_256M				U(0x10000000)
41 #define SZ_512M				U(0x20000000)
42 
43 #define SZ_1G				U(0x40000000)
44 #define SZ_2G				U(0x80000000)
45 
46 /******************************************************************************
47  * Required platform porting definitions that are expected to be common to
48  * all platforms
49  *****************************************************************************/
50 
51 /*
52  * Platform binary types for linking
53  */
54 #ifdef __aarch64__
55 #define PLATFORM_LINKER_FORMAT          "elf64-littleaarch64"
56 #define PLATFORM_LINKER_ARCH            aarch64
57 #else
58 #define PLATFORM_LINKER_FORMAT          "elf32-littlearm"
59 #define PLATFORM_LINKER_ARCH            arm
60 #endif /* __aarch64__ */
61 
62 /*
63  * Generic platform constants
64  */
65 #define FIRMWARE_WELCOME_STR		"Booting Trusted Firmware\n"
66 
67 #define BL2_IMAGE_DESC {				\
68 	.image_id = BL2_IMAGE_ID,			\
69 	SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,	\
70 		VERSION_2, image_info_t, 0),		\
71 	.image_info.image_base = BL2_BASE,		\
72 	.image_info.image_max_size = BL2_LIMIT - BL2_BASE,\
73 	SET_STATIC_PARAM_HEAD(ep_info, PARAM_EP,	\
74 		VERSION_2, entry_point_info_t, SECURE | EXECUTABLE),\
75 	.ep_info.pc = BL2_BASE,				\
76 }
77 
78 /*
79  * The following constants identify the extents of the code & read-only data
80  * regions. These addresses are used by the MMU setup code and therefore they
81  * must be page-aligned.
82  *
83  * When the code and read-only data are mapped as a single atomic section
84  * (i.e. when SEPARATE_CODE_AND_RODATA=0) then we treat the whole section as
85  * code by specifying the read-only data section as empty.
86  *
87  * BL1 is different than the other images in the sense that its read-write data
88  * originally lives in Trusted ROM and needs to be relocated in Trusted SRAM at
89  * run-time. Therefore, the read-write data in ROM can be mapped with the same
90  * memory attributes as the read-only data region. For this reason, BL1 uses
91  * different macros.
92  *
93  * Note that BL1_ROM_END is not necessarily aligned on a page boundary as it
94  * just points to the end of BL1's actual content in Trusted ROM. Therefore it
95  * needs to be rounded up to the next page size in order to map the whole last
96  * page of it with the right memory attributes.
97  */
98 #if SEPARATE_CODE_AND_RODATA
99 
100 #define BL1_CODE_END		BL_CODE_END
101 #define BL1_RO_DATA_BASE	BL_RO_DATA_BASE
102 #define BL1_RO_DATA_END		round_up(BL1_ROM_END, PAGE_SIZE)
103 #if BL2_IN_XIP_MEM
104 #define BL2_CODE_END		BL_CODE_END
105 #define BL2_RO_DATA_BASE	BL_RO_DATA_BASE
106 #define BL2_RO_DATA_END		round_up(BL2_ROM_END, PAGE_SIZE)
107 #endif /* BL2_IN_XIP_MEM */
108 #else
109 #define BL_RO_DATA_BASE		UL(0)
110 #define BL_RO_DATA_END		UL(0)
111 #define BL1_CODE_END		round_up(BL1_ROM_END, PAGE_SIZE)
112 #if BL2_IN_XIP_MEM
113 #define BL2_RO_DATA_BASE	UL(0)
114 #define BL2_RO_DATA_END		UL(0)
115 #define BL2_CODE_END		round_up(BL2_ROM_END, PAGE_SIZE)
116 #endif /* BL2_IN_XIP_MEM */
117 #endif /* SEPARATE_CODE_AND_RODATA */
118 
119 #if MEASURED_BOOT
120 /*
121  * Start critical data Ids from 2^32/2 reserving Ids from 0 to (2^32/2 - 1)
122  * for Images, It is a critical data Id base for all platforms.
123  */
124 #define CRITICAL_DATA_ID_BASE	U(0x80000000)
125 #endif /* MEASURED_BOOT */
126 
127 #endif /* COMMON_DEF_H */
128