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Searched defs:BL2_LIMIT (Results 1 – 25 of 32) sorted by relevance

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/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1028a/ls1028ardb/
A Dplat_def.h47 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
50 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-lx2160a/lx2160aqds/
A Dplat_def.h52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-lx2160a/lx2160ardb/
A Dplat_def.h52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-lx2160a/lx2162aqds/
A Dplat_def.h52 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE \ macro
55 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/brcm/board/stingray/include/
A Dplatform_def.h113 #define BL2_LIMIT (BL2_BASE + 0x40000) macro
119 #define BL2_LIMIT (BL2_BASE + 0x40000) macro
125 #define BL2_LIMIT (BRCM_BL_RAM_BASE + BRCM_BL_RAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1043a/ls1043ardb/
A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1046a/ls1046afrwy/
A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1046a/ls1046aqds/
A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1046a/ls1046ardb/
A Dplat_def.h44 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1088a/ls1088aqds/
A Dplat_def.h42 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/nxp/soc-ls1088a/ls1088ardb/
A Dplat_def.h42 #define BL2_LIMIT (NXP_OCRAM_ADDR + NXP_OCRAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/hisilicon/poplar/include/
A Dpoplar_layout.h126 #define BL2_LIMIT (BL2_BASE + BL2_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/renesas/common/include/
A Dplatform_def.h109 #define BL2_LIMIT U(0xE6320000) macro
111 #define BL2_LIMIT U(0xE6360000) macro
/arm-trusted-firmware-2.8.0/plat/socionext/uniphier/include/
A Dplatform_def.h54 #define BL2_LIMIT (BL2_BASE + UNIPHIER_BL2_MAX_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey/include/
A Dhikey_layout.h64 #define BL2_LIMIT (0xF9830000) /* 0xf983_0000 */ macro
/arm-trusted-firmware-2.8.0/plat/hisilicon/hikey960/include/
A Dplatform_def.h62 #define BL2_LIMIT (BL2_BASE + 0x58000) /* 1AC5_8000 */ macro
/arm-trusted-firmware-2.8.0/include/plat/marvell/armada/a3k/common/
A Dmarvell_def.h161 #define BL2_LIMIT BL31_BASE macro
/arm-trusted-firmware-2.8.0/include/plat/marvell/armada/a8k/common/
A Dmarvell_def.h197 #define BL2_LIMIT BL31_BASE macro
/arm-trusted-firmware-2.8.0/plat/st/stm32mp1/include/
A Dplatform_def.h55 #define BL2_LIMIT (STM32MP_BL2_BASE + \ macro
/arm-trusted-firmware-2.8.0/plat/imx/imx7/picopi/include/
A Dplatform_def.h119 #define BL2_LIMIT (BL2_RAM_BASE + BL2_RAM_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/imx/imx7/warp7/include/
A Dplatform_def.h122 #define BL2_LIMIT (BL2_RAM_BASE + BL2_RAM_SIZE) macro
/arm-trusted-firmware-2.8.0/include/plat/arm/common/
A Darm_def.h568 #define BL2_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE) macro
575 #define BL2_LIMIT BL1_RW_BASE macro
/arm-trusted-firmware-2.8.0/plat/rpi/rpi3/include/
A Dplatform_def.h183 #define BL2_LIMIT BL31_BASE macro
/arm-trusted-firmware-2.8.0/plat/socionext/synquacer/include/
A Dplatform_def.h66 #define BL2_LIMIT (BL2_BASE + BL2_SIZE) macro
/arm-trusted-firmware-2.8.0/plat/arm/board/fvp_ve/include/
A Dplatform_def.h219 #define BL2_LIMIT BL1_RW_BASE macro

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