1# SPDX-License-Identifier: GPL-2.0
2config XTENSA
3	def_bool y
4	select ARCH_32BIT_OFF_T
5	select ARCH_HAS_BINFMT_FLAT if !MMU
6	select ARCH_HAS_CURRENT_STACK_POINTER
7	select ARCH_HAS_DEBUG_VM_PGTABLE
8	select ARCH_HAS_DMA_PREP_COHERENT if MMU
9	select ARCH_HAS_GCOV_PROFILE_ALL
10	select ARCH_HAS_KCOV
11	select ARCH_HAS_SYNC_DMA_FOR_CPU if MMU
12	select ARCH_HAS_SYNC_DMA_FOR_DEVICE if MMU
13	select ARCH_HAS_DMA_SET_UNCACHED if MMU
14	select ARCH_HAS_STRNCPY_FROM_USER if !KASAN
15	select ARCH_HAS_STRNLEN_USER
16	select ARCH_USE_MEMTEST
17	select ARCH_USE_QUEUED_RWLOCKS
18	select ARCH_USE_QUEUED_SPINLOCKS
19	select ARCH_WANT_FRAME_POINTERS
20	select ARCH_WANT_IPC_PARSE_VERSION
21	select BUILDTIME_TABLE_SORT
22	select CLONE_BACKWARDS
23	select COMMON_CLK
24	select DMA_NONCOHERENT_MMAP if MMU
25	select GENERIC_ATOMIC64
26	select GENERIC_IRQ_SHOW
27	select GENERIC_LIB_CMPDI2
28	select GENERIC_LIB_MULDI3
29	select GENERIC_LIB_UCMPDI2
30	select GENERIC_PCI_IOMAP
31	select GENERIC_SCHED_CLOCK
32	select HAVE_ARCH_AUDITSYSCALL
33	select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
34	select HAVE_ARCH_KASAN if MMU && !XIP_KERNEL
35	select HAVE_ARCH_KCSAN
36	select HAVE_ARCH_SECCOMP_FILTER
37	select HAVE_ARCH_TRACEHOOK
38	select HAVE_CONTEXT_TRACKING_USER
39	select HAVE_DEBUG_KMEMLEAK
40	select HAVE_DMA_CONTIGUOUS
41	select HAVE_EXIT_THREAD
42	select HAVE_FUNCTION_TRACER
43	select HAVE_GCC_PLUGINS if GCC_VERSION >= 120000
44	select HAVE_HW_BREAKPOINT if PERF_EVENTS
45	select HAVE_IRQ_TIME_ACCOUNTING
46	select HAVE_PCI
47	select HAVE_PERF_EVENTS
48	select HAVE_STACKPROTECTOR
49	select HAVE_SYSCALL_TRACEPOINTS
50	select HAVE_VIRT_CPU_ACCOUNTING_GEN
51	select IRQ_DOMAIN
52	select MODULES_USE_ELF_RELA
53	select PERF_USE_VMALLOC
54	select TRACE_IRQFLAGS_SUPPORT
55	help
56	  Xtensa processors are 32-bit RISC machines designed by Tensilica
57	  primarily for embedded systems.  These processors are both
58	  configurable and extensible.  The Linux port to the Xtensa
59	  architecture supports all processor configurations and extensions,
60	  with reasonable minimum requirements.  The Xtensa Linux project has
61	  a home page at <http://www.linux-xtensa.org/>.
62
63config GENERIC_HWEIGHT
64	def_bool y
65
66config ARCH_HAS_ILOG2_U32
67	def_bool n
68
69config ARCH_HAS_ILOG2_U64
70	def_bool n
71
72config NO_IOPORT_MAP
73	def_bool n
74
75config HZ
76	int
77	default 100
78
79config LOCKDEP_SUPPORT
80	def_bool y
81
82config STACKTRACE_SUPPORT
83	def_bool y
84
85config MMU
86	def_bool n
87	select PFAULT
88
89config HAVE_XTENSA_GPIO32
90	def_bool n
91
92config KASAN_SHADOW_OFFSET
93	hex
94	default 0x6e400000
95
96config CPU_BIG_ENDIAN
97	def_bool $(success,test "$(shell,echo __XTENSA_EB__ | $(CC) -E -P -)" = 1)
98
99config CPU_LITTLE_ENDIAN
100	def_bool !CPU_BIG_ENDIAN
101
102config CC_HAVE_CALL0_ABI
103	def_bool $(success,test "$(shell,echo __XTENSA_CALL0_ABI__ | $(CC) -mabi=call0 -E -P - 2>/dev/null)" = 1)
104
105menu "Processor type and features"
106
107choice
108	prompt "Xtensa Processor Configuration"
109	default XTENSA_VARIANT_FSF
110
111config XTENSA_VARIANT_FSF
112	bool "fsf - default (not generic) configuration"
113	select MMU
114
115config XTENSA_VARIANT_DC232B
116	bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
117	select MMU
118	select HAVE_XTENSA_GPIO32
119	help
120	  This variant refers to Tensilica's Diamond 232L Standard core Rev.B (LE).
121
122config XTENSA_VARIANT_DC233C
123	bool "dc233c - Diamond 233L Standard Core Rev.C (LE)"
124	select MMU
125	select HAVE_XTENSA_GPIO32
126	help
127	  This variant refers to Tensilica's Diamond 233L Standard core Rev.C (LE).
128
129config XTENSA_VARIANT_CUSTOM
130	bool "Custom Xtensa processor configuration"
131	select HAVE_XTENSA_GPIO32
132	help
133	  Select this variant to use a custom Xtensa processor configuration.
134	  You will be prompted for a processor variant CORENAME.
135endchoice
136
137config XTENSA_VARIANT_CUSTOM_NAME
138	string "Xtensa Processor Custom Core Variant Name"
139	depends on XTENSA_VARIANT_CUSTOM
140	help
141	  Provide the name of a custom Xtensa processor variant.
142	  This CORENAME selects arch/xtensa/variant/CORENAME.
143	  Don't forget you have to select MMU if you have one.
144
145config XTENSA_VARIANT_NAME
146	string
147	default "dc232b"			if XTENSA_VARIANT_DC232B
148	default "dc233c"			if XTENSA_VARIANT_DC233C
149	default "fsf"				if XTENSA_VARIANT_FSF
150	default XTENSA_VARIANT_CUSTOM_NAME	if XTENSA_VARIANT_CUSTOM
151
152config XTENSA_VARIANT_MMU
153	bool "Core variant has a Full MMU (TLB, Pages, Protection, etc)"
154	depends on XTENSA_VARIANT_CUSTOM
155	default y
156	select MMU
157	help
158	  Build a Conventional Kernel with full MMU support,
159	  ie: it supports a TLB with auto-loading, page protection.
160
161config XTENSA_VARIANT_HAVE_PERF_EVENTS
162	bool "Core variant has Performance Monitor Module"
163	depends on XTENSA_VARIANT_CUSTOM
164	default n
165	help
166	  Enable if core variant has Performance Monitor Module with
167	  External Registers Interface.
168
169	  If unsure, say N.
170
171config XTENSA_FAKE_NMI
172	bool "Treat PMM IRQ as NMI"
173	depends on XTENSA_VARIANT_HAVE_PERF_EVENTS
174	default n
175	help
176	  If PMM IRQ is the only IRQ at EXCM level it is safe to
177	  treat it as NMI, which improves accuracy of profiling.
178
179	  If there are other interrupts at or above PMM IRQ priority level
180	  but not above the EXCM level, PMM IRQ still may be treated as NMI,
181	  but only if these IRQs are not used. There will be a build warning
182	  saying that this is not safe, and a bugcheck if one of these IRQs
183	  actually fire.
184
185	  If unsure, say N.
186
187config PFAULT
188	bool "Handle protection faults" if EXPERT && !MMU
189	default y
190	help
191	  Handle protection faults. MMU configurations must enable it.
192	  noMMU configurations may disable it if used memory map never
193	  generates protection faults or faults are always fatal.
194
195	  If unsure, say Y.
196
197config XTENSA_UNALIGNED_USER
198	bool "Unaligned memory access in user space"
199	help
200	  The Xtensa architecture currently does not handle unaligned
201	  memory accesses in hardware but through an exception handler.
202	  Per default, unaligned memory accesses are disabled in user space.
203
204	  Say Y here to enable unaligned memory access in user space.
205
206config HAVE_SMP
207	bool "System Supports SMP (MX)"
208	depends on XTENSA_VARIANT_CUSTOM
209	select XTENSA_MX
210	help
211	  This option is used to indicate that the system-on-a-chip (SOC)
212	  supports Multiprocessing. Multiprocessor support implemented above
213	  the CPU core definition and currently needs to be selected manually.
214
215	  Multiprocessor support is implemented with external cache and
216	  interrupt controllers.
217
218	  The MX interrupt distributer adds Interprocessor Interrupts
219	  and causes the IRQ numbers to be increased by 4 for devices
220	  like the open cores ethernet driver and the serial interface.
221
222	  You still have to select "Enable SMP" to enable SMP on this SOC.
223
224config SMP
225	bool "Enable Symmetric multi-processing support"
226	depends on HAVE_SMP
227	select GENERIC_SMP_IDLE_THREAD
228	help
229	  Enabled SMP Software; allows more than one CPU/CORE
230	  to be activated during startup.
231
232config NR_CPUS
233	depends on SMP
234	int "Maximum number of CPUs (2-32)"
235	range 2 32
236	default "4"
237
238config HOTPLUG_CPU
239	bool "Enable CPU hotplug support"
240	depends on SMP
241	help
242	  Say Y here to allow turning CPUs off and on. CPUs can be
243	  controlled through /sys/devices/system/cpu.
244
245	  Say N if you want to disable CPU hotplug.
246
247config SECONDARY_RESET_VECTOR
248	bool "Secondary cores use alternative reset vector"
249	default y
250	depends on HAVE_SMP
251	help
252	  Secondary cores may be configured to use alternative reset vector,
253	  or all cores may use primary reset vector.
254	  Say Y here to supply handler for the alternative reset location.
255
256config FAST_SYSCALL_XTENSA
257	bool "Enable fast atomic syscalls"
258	default n
259	help
260	  fast_syscall_xtensa is a syscall that can make atomic operations
261	  on UP kernel when processor has no s32c1i support.
262
263	  This syscall is deprecated. It may have issues when called with
264	  invalid arguments. It is provided only for backwards compatibility.
265	  Only enable it if your userspace software requires it.
266
267	  If unsure, say N.
268
269config FAST_SYSCALL_SPILL_REGISTERS
270	bool "Enable spill registers syscall"
271	default n
272	help
273	  fast_syscall_spill_registers is a syscall that spills all active
274	  register windows of a calling userspace task onto its stack.
275
276	  This syscall is deprecated. It may have issues when called with
277	  invalid arguments. It is provided only for backwards compatibility.
278	  Only enable it if your userspace software requires it.
279
280	  If unsure, say N.
281
282choice
283	prompt "Kernel ABI"
284	default KERNEL_ABI_DEFAULT
285	help
286	  Select ABI for the kernel code. This ABI is independent of the
287	  supported userspace ABI and any combination of the
288	  kernel/userspace ABI is possible and should work.
289
290	  In case both kernel and userspace support only call0 ABI
291	  all register windows support code will be omitted from the
292	  build.
293
294	  If unsure, choose the default ABI.
295
296config KERNEL_ABI_DEFAULT
297	bool "Default ABI"
298	help
299	  Select this option to compile kernel code with the default ABI
300	  selected for the toolchain.
301	  Normally cores with windowed registers option use windowed ABI and
302	  cores without it use call0 ABI.
303
304config KERNEL_ABI_CALL0
305	bool "Call0 ABI" if CC_HAVE_CALL0_ABI
306	help
307	  Select this option to compile kernel code with call0 ABI even with
308	  toolchain that defaults to windowed ABI.
309	  When this option is not selected the default toolchain ABI will
310	  be used for the kernel code.
311
312endchoice
313
314config USER_ABI_CALL0
315	bool
316
317choice
318	prompt "Userspace ABI"
319	default USER_ABI_DEFAULT
320	help
321	  Select supported userspace ABI.
322
323	  If unsure, choose the default ABI.
324
325config USER_ABI_DEFAULT
326	bool "Default ABI only"
327	help
328	  Assume default userspace ABI. For XEA2 cores it is windowed ABI.
329	  call0 ABI binaries may be run on such kernel, but signal delivery
330	  will not work correctly for them.
331
332config USER_ABI_CALL0_ONLY
333	bool "Call0 ABI only"
334	select USER_ABI_CALL0
335	help
336	  Select this option to support only call0 ABI in userspace.
337	  Windowed ABI binaries will crash with a segfault caused by
338	  an illegal instruction exception on the first 'entry' opcode.
339
340	  Choose this option if you're planning to run only user code
341	  built with call0 ABI.
342
343config USER_ABI_CALL0_PROBE
344	bool "Support both windowed and call0 ABI by probing"
345	select USER_ABI_CALL0
346	help
347	  Select this option to support both windowed and call0 userspace
348	  ABIs. When enabled all processes are started with PS.WOE disabled
349	  and a fast user exception handler for an illegal instruction is
350	  used to turn on PS.WOE bit on the first 'entry' opcode executed by
351	  the userspace.
352
353	  This option should be enabled for the kernel that must support
354	  both call0 and windowed ABIs in userspace at the same time.
355
356	  Note that Xtensa ISA does not guarantee that entry opcode will
357	  raise an illegal instruction exception on cores with XEA2 when
358	  PS.WOE is disabled, check whether the target core supports it.
359
360endchoice
361
362endmenu
363
364config XTENSA_CALIBRATE_CCOUNT
365	def_bool n
366	help
367	  On some platforms (XT2000, for example), the CPU clock rate can
368	  vary.  The frequency can be determined, however, by measuring
369	  against a well known, fixed frequency, such as an UART oscillator.
370
371config SERIAL_CONSOLE
372	def_bool n
373
374config PLATFORM_HAVE_XIP
375	def_bool n
376
377menu "Platform options"
378
379choice
380	prompt "Xtensa System Type"
381	default XTENSA_PLATFORM_ISS
382
383config XTENSA_PLATFORM_ISS
384	bool "ISS"
385	select XTENSA_CALIBRATE_CCOUNT
386	select SERIAL_CONSOLE
387	help
388	  ISS is an acronym for Tensilica's Instruction Set Simulator.
389
390config XTENSA_PLATFORM_XT2000
391	bool "XT2000"
392	help
393	  XT2000 is the name of Tensilica's feature-rich emulation platform.
394	  This hardware is capable of running a full Linux distribution.
395
396config XTENSA_PLATFORM_XTFPGA
397	bool "XTFPGA"
398	select ETHOC if ETHERNET
399	select PLATFORM_WANT_DEFAULT_MEM if !MMU
400	select SERIAL_CONSOLE
401	select XTENSA_CALIBRATE_CCOUNT
402	select PLATFORM_HAVE_XIP
403	help
404	  XTFPGA is the name of Tensilica board family (LX60, LX110, LX200, ML605).
405	  This hardware is capable of running a full Linux distribution.
406
407endchoice
408
409config PLATFORM_NR_IRQS
410	int
411	default 3 if XTENSA_PLATFORM_XT2000
412	default 0
413
414config XTENSA_CPU_CLOCK
415	int "CPU clock rate [MHz]"
416	depends on !XTENSA_CALIBRATE_CCOUNT
417	default 16
418
419config GENERIC_CALIBRATE_DELAY
420	bool "Auto calibration of the BogoMIPS value"
421	help
422	  The BogoMIPS value can easily be derived from the CPU frequency.
423
424config CMDLINE_BOOL
425	bool "Default bootloader kernel arguments"
426
427config CMDLINE
428	string "Initial kernel command string"
429	depends on CMDLINE_BOOL
430	default "console=ttyS0,38400 root=/dev/ram"
431	help
432	  On some architectures (EBSA110 and CATS), there is currently no way
433	  for the boot loader to pass arguments to the kernel. For these
434	  architectures, you should supply some command-line options at build
435	  time by entering them here. As a minimum, you should specify the
436	  memory size and the root device (e.g., mem=64M root=/dev/nfs).
437
438config USE_OF
439	bool "Flattened Device Tree support"
440	select OF
441	select OF_EARLY_FLATTREE
442	help
443	  Include support for flattened device tree machine descriptions.
444
445config BUILTIN_DTB_SOURCE
446	string "DTB to build into the kernel image"
447	depends on OF
448
449config PARSE_BOOTPARAM
450	bool "Parse bootparam block"
451	default y
452	help
453	  Parse parameters passed to the kernel from the bootloader. It may
454	  be disabled if the kernel is known to run without the bootloader.
455
456	  If unsure, say Y.
457
458choice
459	prompt "Semihosting interface"
460	default XTENSA_SIMCALL_ISS
461	depends on XTENSA_PLATFORM_ISS
462	help
463	  Choose semihosting interface that will be used for serial port,
464	  block device and networking.
465
466config XTENSA_SIMCALL_ISS
467	bool "simcall"
468	help
469	  Use simcall instruction. simcall is only available on simulators,
470	  it does nothing on hardware.
471
472config XTENSA_SIMCALL_GDBIO
473	bool "GDBIO"
474	help
475	  Use break instruction. It is available on real hardware when GDB
476	  is attached to it via JTAG.
477
478endchoice
479
480config BLK_DEV_SIMDISK
481	tristate "Host file-based simulated block device support"
482	default n
483	depends on XTENSA_PLATFORM_ISS && BLOCK
484	help
485	  Create block devices that map to files in the host file system.
486	  Device binding to host file may be changed at runtime via proc
487	  interface provided the device is not in use.
488
489config BLK_DEV_SIMDISK_COUNT
490	int "Number of host file-based simulated block devices"
491	range 1 10
492	depends on BLK_DEV_SIMDISK
493	default 2
494	help
495	  This is the default minimal number of created block devices.
496	  Kernel/module parameter 'simdisk_count' may be used to change this
497	  value at runtime. More file names (but no more than 10) may be
498	  specified as parameters, simdisk_count grows accordingly.
499
500config SIMDISK0_FILENAME
501	string "Host filename for the first simulated device"
502	depends on BLK_DEV_SIMDISK = y
503	default ""
504	help
505	  Attach a first simdisk to a host file. Conventionally, this file
506	  contains a root file system.
507
508config SIMDISK1_FILENAME
509	string "Host filename for the second simulated device"
510	depends on BLK_DEV_SIMDISK = y && BLK_DEV_SIMDISK_COUNT != 1
511	default ""
512	help
513	  Another simulated disk in a host file for a buildroot-independent
514	  storage.
515
516config XTFPGA_LCD
517	bool "Enable XTFPGA LCD driver"
518	depends on XTENSA_PLATFORM_XTFPGA
519	default n
520	help
521	  There's a 2x16 LCD on most of XTFPGA boards, kernel may output
522	  progress messages there during bootup/shutdown. It may be useful
523	  during board bringup.
524
525	  If unsure, say N.
526
527config XTFPGA_LCD_BASE_ADDR
528	hex "XTFPGA LCD base address"
529	depends on XTFPGA_LCD
530	default "0x0d0c0000"
531	help
532	  Base address of the LCD controller inside KIO region.
533	  Different boards from XTFPGA family have LCD controller at different
534	  addresses. Please consult prototyping user guide for your board for
535	  the correct address. Wrong address here may lead to hardware lockup.
536
537config XTFPGA_LCD_8BIT_ACCESS
538	bool "Use 8-bit access to XTFPGA LCD"
539	depends on XTFPGA_LCD
540	default n
541	help
542	  LCD may be connected with 4- or 8-bit interface, 8-bit access may
543	  only be used with 8-bit interface. Please consult prototyping user
544	  guide for your board for the correct interface width.
545
546comment "Kernel memory layout"
547
548config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
549	bool "Initialize Xtensa MMU inside the Linux kernel code"
550	depends on !XTENSA_VARIANT_FSF && !XTENSA_VARIANT_DC232B
551	default y if XTENSA_VARIANT_DC233C || XTENSA_VARIANT_CUSTOM
552	help
553	  Earlier version initialized the MMU in the exception vector
554	  before jumping to _startup in head.S and had an advantage that
555	  it was possible to place a software breakpoint at 'reset' and
556	  then enter your normal kernel breakpoints once the MMU was mapped
557	  to the kernel mappings (0XC0000000).
558
559	  This unfortunately won't work for U-Boot and likely also won't
560	  work for using KEXEC to have a hot kernel ready for doing a
561	  KDUMP.
562
563	  So now the MMU is initialized in head.S but it's necessary to
564	  use hardware breakpoints (gdb 'hbreak' cmd) to break at _startup.
565	  xt-gdb can't place a Software Breakpoint in the  0XD region prior
566	  to mapping the MMU and after mapping even if the area of low memory
567	  was mapped gdb wouldn't remove the breakpoint on hitting it as the
568	  PC wouldn't match. Since Hardware Breakpoints are recommended for
569	  Linux configurations it seems reasonable to just assume they exist
570	  and leave this older mechanism for unfortunate souls that choose
571	  not to follow Tensilica's recommendation.
572
573	  Selecting this will cause U-Boot to set the KERNEL Load and Entry
574	  address at 0x00003000 instead of the mapped std of 0xD0003000.
575
576	  If in doubt, say Y.
577
578config XIP_KERNEL
579	bool "Kernel Execute-In-Place from ROM"
580	depends on PLATFORM_HAVE_XIP
581	help
582	  Execute-In-Place allows the kernel to run from non-volatile storage
583	  directly addressable by the CPU, such as NOR flash. This saves RAM
584	  space since the text section of the kernel is not loaded from flash
585	  to RAM. Read-write sections, such as the data section and stack,
586	  are still copied to RAM. The XIP kernel is not compressed since
587	  it has to run directly from flash, so it will take more space to
588	  store it. The flash address used to link the kernel object files,
589	  and for storing it, is configuration dependent. Therefore, if you
590	  say Y here, you must know the proper physical address where to
591	  store the kernel image depending on your own flash memory usage.
592
593	  Also note that the make target becomes "make xipImage" rather than
594	  "make Image" or "make uImage". The final kernel binary to put in
595	  ROM memory will be arch/xtensa/boot/xipImage.
596
597	  If unsure, say N.
598
599config MEMMAP_CACHEATTR
600	hex "Cache attributes for the memory address space"
601	depends on !MMU
602	default 0x22222222
603	help
604	  These cache attributes are set up for noMMU systems. Each hex digit
605	  specifies cache attributes for the corresponding 512MB memory
606	  region: bits 0..3 -- for addresses 0x00000000..0x1fffffff,
607	  bits 4..7 -- for addresses 0x20000000..0x3fffffff, and so on.
608
609	  Cache attribute values are specific for the MMU type.
610	  For region protection MMUs:
611	    1: WT cached,
612	    2: cache bypass,
613	    4: WB cached,
614	    f: illegal.
615	  For full MMU:
616	    bit 0: executable,
617	    bit 1: writable,
618	    bits 2..3:
619	      0: cache bypass,
620	      1: WB cache,
621	      2: WT cache,
622	      3: special (c and e are illegal, f is reserved).
623	  For MPU:
624	    0: illegal,
625	    1: WB cache,
626	    2: WB, no-write-allocate cache,
627	    3: WT cache,
628	    4: cache bypass.
629
630config KSEG_PADDR
631	hex "Physical address of the KSEG mapping"
632	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX && MMU
633	default 0x00000000
634	help
635	  This is the physical address where KSEG is mapped. Please refer to
636	  the chosen KSEG layout help for the required address alignment.
637	  Unpacked kernel image (including vectors) must be located completely
638	  within KSEG.
639	  Physical memory below this address is not available to linux.
640
641	  If unsure, leave the default value here.
642
643config KERNEL_VIRTUAL_ADDRESS
644	hex "Kernel virtual address"
645	depends on MMU && XIP_KERNEL
646	default 0xd0003000
647	help
648	  This is the virtual address where the XIP kernel is mapped.
649	  XIP kernel may be mapped into KSEG or KIO region, virtual address
650	  provided here must match kernel load address provided in
651	  KERNEL_LOAD_ADDRESS.
652
653config KERNEL_LOAD_ADDRESS
654	hex "Kernel load address"
655	default 0x60003000 if !MMU
656	default 0x00003000 if MMU && INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
657	default 0xd0003000 if MMU && !INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
658	help
659	  This is the address where the kernel is loaded.
660	  It is virtual address for MMUv2 configurations and physical address
661	  for all other configurations.
662
663	  If unsure, leave the default value here.
664
665choice
666	prompt "Relocatable vectors location"
667	default XTENSA_VECTORS_IN_TEXT
668	help
669	  Choose whether relocatable vectors are merged into the kernel .text
670	  or placed separately at runtime. This option does not affect
671	  configurations without VECBASE register where vectors are always
672	  placed at their hardware-defined locations.
673
674config XTENSA_VECTORS_IN_TEXT
675	bool "Merge relocatable vectors into kernel text"
676	depends on !MTD_XIP
677	help
678	  This option puts relocatable vectors into the kernel .text section
679	  with proper alignment.
680	  This is a safe choice for most configurations.
681
682config XTENSA_VECTORS_SEPARATE
683	bool "Put relocatable vectors at fixed address"
684	help
685	  This option puts relocatable vectors at specific virtual address.
686	  Vectors are merged with the .init data in the kernel image and
687	  are copied into their designated location during kernel startup.
688	  Use it to put vectors into IRAM or out of FLASH on kernels with
689	  XIP-aware MTD support.
690
691endchoice
692
693config VECTORS_ADDR
694	hex "Kernel vectors virtual address"
695	default 0x00000000
696	depends on XTENSA_VECTORS_SEPARATE
697	help
698	  This is the virtual address of the (relocatable) vectors base.
699	  It must be within KSEG if MMU is used.
700
701config XIP_DATA_ADDR
702	hex "XIP kernel data virtual address"
703	depends on XIP_KERNEL
704	default 0x00000000
705	help
706	  This is the virtual address where XIP kernel data is copied.
707	  It must be within KSEG if MMU is used.
708
709config PLATFORM_WANT_DEFAULT_MEM
710	def_bool n
711
712config DEFAULT_MEM_START
713	hex
714	prompt "PAGE_OFFSET/PHYS_OFFSET" if !MMU && PLATFORM_WANT_DEFAULT_MEM
715	default 0x60000000 if PLATFORM_WANT_DEFAULT_MEM
716	default 0x00000000
717	help
718	  This is the base address used for both PAGE_OFFSET and PHYS_OFFSET
719	  in noMMU configurations.
720
721	  If unsure, leave the default value here.
722
723choice
724	prompt "KSEG layout"
725	depends on MMU
726	default XTENSA_KSEG_MMU_V2
727
728config XTENSA_KSEG_MMU_V2
729	bool "MMUv2: 128MB cached + 128MB uncached"
730	help
731	  MMUv2 compatible kernel memory map: TLB way 5 maps 128MB starting
732	  at KSEG_PADDR to 0xd0000000 with cache and to 0xd8000000
733	  without cache.
734	  KSEG_PADDR must be aligned to 128MB.
735
736config XTENSA_KSEG_256M
737	bool "256MB cached + 256MB uncached"
738	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
739	help
740	  TLB way 6 maps 256MB starting at KSEG_PADDR to 0xb0000000
741	  with cache and to 0xc0000000 without cache.
742	  KSEG_PADDR must be aligned to 256MB.
743
744config XTENSA_KSEG_512M
745	bool "512MB cached + 512MB uncached"
746	depends on INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX
747	help
748	  TLB way 6 maps 512MB starting at KSEG_PADDR to 0xa0000000
749	  with cache and to 0xc0000000 without cache.
750	  KSEG_PADDR must be aligned to 256MB.
751
752endchoice
753
754config HIGHMEM
755	bool "High Memory Support"
756	depends on MMU
757	select KMAP_LOCAL
758	help
759	  Linux can use the full amount of RAM in the system by
760	  default. However, the default MMUv2 setup only maps the
761	  lowermost 128 MB of memory linearly to the areas starting
762	  at 0xd0000000 (cached) and 0xd8000000 (uncached).
763	  When there are more than 128 MB memory in the system not
764	  all of it can be "permanently mapped" by the kernel.
765	  The physical memory that's not permanently mapped is called
766	  "high memory".
767
768	  If you are compiling a kernel which will never run on a
769	  machine with more than 128 MB total physical RAM, answer
770	  N here.
771
772	  If unsure, say Y.
773
774config ARCH_FORCE_MAX_ORDER
775	int "Maximum zone order"
776	default "11"
777	help
778	  The kernel memory allocator divides physically contiguous memory
779	  blocks into "zones", where each zone is a power of two number of
780	  pages.  This option selects the largest power of two that the kernel
781	  keeps in the memory allocator.  If you need to allocate very large
782	  blocks of physically contiguous memory, then you may need to
783	  increase this value.
784
785	  This config option is actually maximum order plus one. For example,
786	  a value of 11 means that the largest free memory block is 2^10 pages.
787
788endmenu
789
790menu "Power management options"
791
792config ARCH_HIBERNATION_POSSIBLE
793	def_bool y
794
795source "kernel/power/Kconfig"
796
797endmenu
798