1 /* 2 * Renesas SCP/MCP Software 3 * Copyright (c) 2020-2021, Renesas Electronics Corporation. All rights 4 * reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 #ifndef CONFIG_POWER_DOMAIN_H 10 #define CONFIG_POWER_DOMAIN_H 11 12 #include <rcar_scmi_id.h> 13 14 #define CONFIG_POWER_DOMAIN_CORE_CLUS0CORE0 PD_RCAR_CLUS0CORE0 15 #define CONFIG_POWER_DOMAIN_CORE_CLUS0CORE1 PD_RCAR_CLUS0CORE1 16 #define CONFIG_POWER_DOMAIN_CORE_CLUS0CORE2 PD_RCAR_CLUS0CORE2 17 #define CONFIG_POWER_DOMAIN_CORE_CLUS0CORE3 PD_RCAR_CLUS0CORE3 18 #define CONFIG_POWER_DOMAIN_CORE_CLUS1CORE0 PD_RCAR_CLUS1CORE0 19 #define CONFIG_POWER_DOMAIN_CORE_CLUS1CORE1 PD_RCAR_CLUS1CORE1 20 #define CONFIG_POWER_DOMAIN_CORE_CLUS1CORE2 PD_RCAR_CLUS1CORE2 21 #define CONFIG_POWER_DOMAIN_CORE_CLUS1CORE3 PD_RCAR_CLUS1CORE3 22 #define CONFIG_POWER_DOMAIN_CHILD_CLUSTER0 PD_RCAR_CLUSTER0 23 #define CONFIG_POWER_DOMAIN_CHILD_CLUSTER1 PD_RCAR_CLUSTER1 24 25 enum rcar_powerdomain_child_index { 26 CONFIG_POWER_DOMAIN_CHILD_A3IR, 27 CONFIG_POWER_DOMAIN_CHILD_3DGE, 28 CONFIG_POWER_DOMAIN_CHILD_3DGD, 29 CONFIG_POWER_DOMAIN_CHILD_3DGC, 30 CONFIG_POWER_DOMAIN_CHILD_3DGB, 31 CONFIG_POWER_DOMAIN_CHILD_3DGA, 32 CONFIG_POWER_DOMAIN_CHILD_A2VC1, 33 CONFIG_POWER_DOMAIN_CHILD_A3VC, 34 CONFIG_POWER_DOMAIN_CHILD_CR7, 35 CONFIG_POWER_DOMAIN_CHILD_A3VP, 36 CONFIG_POWER_DOMAIN_CHILD_DDR_BKUP, 37 CONFIG_POWER_DOMAIN_CHILD_ALWAYS_ON, 38 CONFIG_POWER_DOMAIN_CHILD_SYSTOP, 39 40 /* Number of defined elements */ 41 CONFIG_POWER_DOMAIN_CHILD_COUNT, 42 43 CONFIG_POWER_DOMAIN_CHILD_NONE = (0xFFFFFFFFU), 44 }; 45 46 /*! 47 * \brief Types of rcar power domain. 48 */ 49 enum rcar_pd_type { 50 /*! Processor. */ 51 RCAR_PD_TYPE_CORE, 52 /*! Processor cluster. */ 53 RCAR_PD_TYPE_CLUSTER, 54 /*! Generic device. */ 55 RCAR_PD_TYPE_ALWAYS_ON, 56 RCAR_PD_TYPE_DEVICE, 57 /*! Debug device. */ 58 RCAR_PD_TYPE_DEVICE_DEBUG, 59 /*! System. */ 60 RCAR_PD_TYPE_SYSTEM, 61 /*! Number of power domain types. */ 62 RCAR_PD_TYPE_COUNT 63 }; 64 65 #endif /* CONFIG_POWER_DOMAIN_H */ 66