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Searched defs:CR1 (Results 1 – 22 of 22) sorted by relevance

/lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/CMSIS/
A Dstm32f745xx.h205 __IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */ member
602 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
633 __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ member
750 __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ member
807 …__IO uint32_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset:… member
843 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
891 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f756xx.h208 __IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */ member
605 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
683 __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ member
800 __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ member
857 …__IO uint32_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset:… member
893 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
941 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f746xx.h207 __IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */ member
604 __IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
682 __IO uint32_t CR1; /*!< PWR power control register 1, Address offset: 0x00 */ member
799 __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ member
856 …__IO uint32_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset:… member
892 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
940 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
/lk-master/external/platform/stm32f0xx/CMSIS/inc/
A Dstm32f030x6.h278 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
367 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
382 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
411 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f030x8.h284 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
373 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
388 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
417 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f070x6.h280 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
369 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
384 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
413 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f070xb.h289 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
378 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
393 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
422 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f030xc.h290 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
379 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
394 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
423 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f031x6.h280 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
376 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
392 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
421 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f038xx.h279 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
375 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
391 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
420 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f051x8.h339 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
435 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
451 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
501 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f058xx.h338 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
434 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
450 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
500 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f071xb.h359 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
455 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
471 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
521 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f048xx.h370 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
466 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
482 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
532 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f072xb.h420 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
516 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
532 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
582 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f078xx.h420 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
516 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
532 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
582 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f042x6.h370 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
466 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
482 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
532 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f091xc.h423 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
519 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
535 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
585 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
A Dstm32f098xx.h423 …__IO uint32_t CR1; /*!< I2C Control register 1, Address offset: 0x00… member
519 …__IO uint32_t CR1; /*!< SPI Control register 1 (not used in I2S mode), Address offset:… member
535 __IO uint32_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
585 __IO uint32_t CR1; /*!< USART Control register 1, Address offset: 0x00 */ member
/lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/CMSIS/
A Dstm32f4xx.h622 …__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */ … member
1125 __IO uint16_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
1154 __IO uint32_t CR1; /*!< FMPI2C Control register 1, Address offset: 0x00 */ member
1341 __IO uint32_t CR1; /*!< SAI block x configuration register 1, Address offset: 0x04 */ member
1385 …__IO uint16_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset:… member
1469 __IO uint16_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
1519 __IO uint16_t CR1; /*!< USART Control register 1, Address offset: 0x0C */ member
/lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/CMSIS/
A Dstm32f2xx.h311 …__IO uint32_t CR1; /*!< ADC control register 1, Address offset: 0x04 */ … member
691 __IO uint16_t CR1; /*!< I2C Control register 1, Address offset: 0x00 */ member
853 …__IO uint16_t CR1; /*!< SPI control register 1 (not used in I2S mode), Address offset:… member
879 __IO uint16_t CR1; /*!< TIM control register 1, Address offset: 0x00 */ member
929 __IO uint16_t CR1; /*!< USART Control register 1, Address offset: 0x0C */ member
/lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/CMSIS/
A Dstm32f10x.h532 __IO uint32_t CR1; member
1017 __IO uint16_t CR1; member
1149 __IO uint16_t CR1; member
1175 __IO uint16_t CR1; member
1229 __IO uint16_t CR1; member

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