| /lk-master/external/platform/stm32f0xx/CMSIS/inc/ |
| A D | stm32f051x8.h | 183 …__IO uint16_t CSR; /*!< COMP control and status register, … member
188 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
194 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
372 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
390 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f058xx.h | 182 …__IO uint16_t CSR; /*!< COMP control and status register, … member
187 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
193 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
371 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
389 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f071xb.h | 185 …__IO uint16_t CSR; /*!< COMP control and status register, … member
190 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
196 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
392 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
410 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f072xb.h | 246 …__IO uint16_t CSR; /*!< COMP control and status register, … member
251 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
257 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
453 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
471 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f078xx.h | 246 …__IO uint16_t CSR; /*!< COMP control and status register, … member
251 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
257 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
453 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
471 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f091xc.h | 245 …__IO uint16_t CSR; /*!< COMP control and status register, … member
250 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
256 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
456 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
474 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f098xx.h | 245 …__IO uint16_t CSR; /*!< COMP control and status register, … member
250 …__IO uint32_t CSR; /*!< COMP control and status register, used for bits common to several … member
256 __IO uint32_t CSR; /*!< Kept for legacy purpose. Use structure 'COMP_Common_TypeDef'. */ member
456 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
474 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f030x6.h | 311 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
329 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f030x8.h | 317 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
335 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f070x6.h | 313 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
331 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f070xb.h | 322 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
340 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f030xc.h | 323 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
341 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f031x6.h | 313 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
331 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f038xx.h | 312 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
330 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f048xx.h | 403 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
421 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| A D | stm32f042x6.h | 403 …__IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04… member
421 …__IO uint32_t CSR; /*!< RCC clock control & status register, Addres… member
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| /lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/CMSIS/ |
| A D | stm32f4xx.h | 645 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
1235 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
1270 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
1418 __IO uint32_t CSR; /*!< Channel Status register, Address offset: 0x14 */ member
1457 __IO uint32_t CSR; /*!< Channel Status register, Address offset: 0x14 */ member
1597 …__IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ member
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| /lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/CMSIS/ |
| A D | stm32f2xx.h | 334 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
730 __IO uint32_t CSR; /*!< PWR power control/status register, Address offset: 0x04 */ member
765 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
991 __IO uint32_t CSR[51]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1C0 */ member
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| /lk-master/external/platform/stm32f1xx/STM32F10x_StdPeriph_Driver/CMSIS/ |
| A D | stm32f10x.h | 584 __IO uint16_t CSR; member
729 __IO uint32_t CSR; member
1056 __IO uint32_t CSR; member
1074 __IO uint32_t CSR; member
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| /lk-master/external/platform/stm32f7xx/STM32F7xx_HAL_Driver/CMSIS/ |
| A D | stm32f756xx.h | 230 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
721 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
820 __IO uint32_t CSR; /*!< Channel Status register, Address offset: 0x14 */ member
1020 …__IO uint32_t CSR[54]; /*!< HASH context swap registers, Address offset: 0x0F8-0x1CC */ member
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| A D | stm32f745xx.h | 227 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
671 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
770 __IO uint32_t CSR; /*!< Channel Status register, Address offset: 0x14 */ member
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| A D | stm32f746xx.h | 229 …__IO uint32_t CSR; /*!< ADC Common status register, Address offset: ADC1 base … member
720 …__IO uint32_t CSR; /*!< RCC clock control & status register, Add… member
819 __IO uint32_t CSR; /*!< Channel Status register, Address offset: 0x14 */ member
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