| /lk-master/external/platform/lpc15xx/lpcopen/lpc_chip_15xx/inc/ |
| A D | ritimer_15xx.h | 50 __IO uint32_t CTRL; /*!< Control register */ member
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| A D | gpiogroup_15xx.h | 48 __IO uint32_t CTRL; /*!< GPIO grouped interrupt control register */ member
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| A D | rtc_15xx.h | 48 __IO uint32_t CTRL; /*!< RTC control register */ member
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| A D | dac_15xx.h | 49 __IO uint32_t CTRL; /*!< DAC control register */ member
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| A D | mrt_15xx.h | 56 __IO uint32_t CTRL; /*!< Timer control register */ member
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| A D | uart_15xx.h | 51 __IO uint32_t CTRL; /*!< Control register */ member
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| A D | acmp_15xx.h | 56 __IO uint32_t CTRL; /*!< Comparator block control register */ member
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| A D | adc_15xx.h | 55 …__IO uint32_t CTRL; /*!< A/D Control Register. The AD0CR register must be written to select … member
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| A D | dma_15xx.h | 131 __IO uint32_t CTRL; /*!< DMA control register */ member
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| /lk-master/external/arch/arm/arm-m/CMSIS/Include/ |
| A D | core_cm0plus.h | 474 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
527 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| A D | core_sc000.h | 490 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
543 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| A D | core_armv8mbl.h | 562 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
614 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
829 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
935 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| A D | core_cm23.h | 562 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
614 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
904 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1010 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| A D | core_cm3.h | 708 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
848 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1158 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| A D | core_sc300.h | 693 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
833 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1143 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| A D | core_cm0.h | 450 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
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| A D | core_cm4.h | 766 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
906 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1216 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| A D | core_armv8mml.h | 964 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1116 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1402 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1514 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| A D | core_cm1.h | 476 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
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| A D | core_cm33.h | 964 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1116 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1477 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1589 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| A D | core_cm35p.h | 964 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1116 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1477 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
1589 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| A D | core_cm7.h | 990 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1130 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1443 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
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| A D | core_cm55.h | 1025 …__IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SysTick Control and Status Regist… member
1178 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) Control Register */ member
1523 …__IOM uint32_t CTRL; /*!< Offset: 0xE04 (R/W) PMU Control Register */ member
2315 __IOM uint32_t CTRL; /*!< Offset: 0x004 (R/W) MPU Control Register */ member
2430 __IOM uint32_t CTRL; /*!< Offset: 0x000 (R/W) SAU Control Register */ member
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| /lk-master/external/platform/stm32f2xx/STM32F2xx_StdPeriph_Driver/inc/ |
| A D | stm32f2xx_dma.h | 536 #define IS_DMA_FLOW_CTRL(CTRL) (((CTRL) == DMA_FlowCtrl_Memory) || \ argument
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| /lk-master/external/platform/stm32f4xx/STM32F4xx_StdPeriph_Driver/inc/ |
| A D | stm32f4xx_dma.h | 536 #define IS_DMA_FLOW_CTRL(CTRL) (((CTRL) == DMA_FlowCtrl_Memory) || \ argument
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