1 /* 2 * Copyright (C) 2015-2020 Alibaba Group Holding Limited 3 */ 4 #ifndef __HAL_IOMUX_HAAS1000_H__ 5 #define __HAL_IOMUX_HAAS1000_H__ 6 7 #ifdef __cplusplus 8 extern "C" { 9 #endif 10 11 #include "plat_types.h" 12 13 #ifndef ROM_BUILD 14 #define PMU_HAS_LED_PIN 15 #endif 16 17 enum HAL_IOMUX_PIN_T { 18 HAL_IOMUX_PIN_P0_0 = 0, 19 HAL_IOMUX_PIN_P0_1, 20 HAL_IOMUX_PIN_P0_2, 21 HAL_IOMUX_PIN_P0_3, 22 HAL_IOMUX_PIN_P0_4, 23 HAL_IOMUX_PIN_P0_5, 24 HAL_IOMUX_PIN_P0_6, 25 HAL_IOMUX_PIN_P0_7, 26 27 HAL_IOMUX_PIN_P1_0, 28 HAL_IOMUX_PIN_P1_1, 29 HAL_IOMUX_PIN_P1_2, 30 HAL_IOMUX_PIN_P1_3, 31 HAL_IOMUX_PIN_P1_4, 32 HAL_IOMUX_PIN_P1_5, 33 HAL_IOMUX_PIN_P1_6, 34 HAL_IOMUX_PIN_P1_7, 35 36 HAL_IOMUX_PIN_P2_0, 37 HAL_IOMUX_PIN_P2_1, 38 HAL_IOMUX_PIN_P2_2, 39 HAL_IOMUX_PIN_P2_3, 40 HAL_IOMUX_PIN_P2_4, 41 HAL_IOMUX_PIN_P2_5, 42 HAL_IOMUX_PIN_P2_6, 43 HAL_IOMUX_PIN_P2_7, 44 45 HAL_IOMUX_PIN_P3_0, 46 HAL_IOMUX_PIN_P3_1, 47 HAL_IOMUX_PIN_P3_2, 48 HAL_IOMUX_PIN_P3_3, 49 HAL_IOMUX_PIN_P3_4, 50 HAL_IOMUX_PIN_P3_5, 51 HAL_IOMUX_PIN_P3_6, 52 HAL_IOMUX_PIN_P3_7, 53 54 HAL_IOMUX_PIN_P4_0, 55 HAL_IOMUX_PIN_P4_1, 56 HAL_IOMUX_PIN_P4_2, 57 HAL_IOMUX_PIN_P4_3, 58 HAL_IOMUX_PIN_P4_4, 59 HAL_IOMUX_PIN_P4_5, 60 HAL_IOMUX_PIN_P4_6, 61 HAL_IOMUX_PIN_P4_7, 62 63 HAL_IOMUX_PIN_NUM, 64 65 HAL_IOMUX_PIN_LED1 = HAL_IOMUX_PIN_NUM, 66 HAL_IOMUX_PIN_LED2, 67 68 HAL_IOMUX_PIN_LED_NUM, 69 }; 70 71 enum HAL_GPIO_PIN_T { 72 HAL_GPIO_PIN_P0_0 = HAL_IOMUX_PIN_P0_0, 73 HAL_GPIO_PIN_P0_1 = HAL_IOMUX_PIN_P0_1, 74 HAL_GPIO_PIN_P0_2 = HAL_IOMUX_PIN_P0_2, 75 HAL_GPIO_PIN_P0_3 = HAL_IOMUX_PIN_P0_3, 76 HAL_GPIO_PIN_P0_4 = HAL_IOMUX_PIN_P0_4, 77 HAL_GPIO_PIN_P0_5 = HAL_IOMUX_PIN_P0_5, 78 HAL_GPIO_PIN_P0_6 = HAL_IOMUX_PIN_P0_6, 79 HAL_GPIO_PIN_P0_7 = HAL_IOMUX_PIN_P0_7, 80 81 HAL_GPIO_PIN_P1_0 = HAL_IOMUX_PIN_P1_0, 82 HAL_GPIO_PIN_P1_1 = HAL_IOMUX_PIN_P1_1, 83 HAL_GPIO_PIN_P1_2 = HAL_IOMUX_PIN_P1_2, 84 HAL_GPIO_PIN_P1_3 = HAL_IOMUX_PIN_P1_3, 85 HAL_GPIO_PIN_P1_4 = HAL_IOMUX_PIN_P1_4, 86 HAL_GPIO_PIN_P1_5 = HAL_IOMUX_PIN_P1_5, 87 HAL_GPIO_PIN_P1_6 = HAL_IOMUX_PIN_P1_6, 88 HAL_GPIO_PIN_P1_7 = HAL_IOMUX_PIN_P1_7, 89 90 HAL_GPIO_PIN_P2_0 = HAL_IOMUX_PIN_P2_0, 91 HAL_GPIO_PIN_P2_1 = HAL_IOMUX_PIN_P2_1, 92 HAL_GPIO_PIN_P2_2 = HAL_IOMUX_PIN_P2_2, 93 HAL_GPIO_PIN_P2_3 = HAL_IOMUX_PIN_P2_3, 94 HAL_GPIO_PIN_P2_4 = HAL_IOMUX_PIN_P2_4, 95 HAL_GPIO_PIN_P2_5 = HAL_IOMUX_PIN_P2_5, 96 HAL_GPIO_PIN_P2_6 = HAL_IOMUX_PIN_P2_6, 97 HAL_GPIO_PIN_P2_7 = HAL_IOMUX_PIN_P2_7, 98 99 HAL_GPIO_PIN_P3_0 = HAL_IOMUX_PIN_P3_0, 100 HAL_GPIO_PIN_P3_1 = HAL_IOMUX_PIN_P3_1, 101 HAL_GPIO_PIN_P3_2 = HAL_IOMUX_PIN_P3_2, 102 HAL_GPIO_PIN_P3_3 = HAL_IOMUX_PIN_P3_3, 103 HAL_GPIO_PIN_P3_4 = HAL_IOMUX_PIN_P3_4, 104 HAL_GPIO_PIN_P3_5 = HAL_IOMUX_PIN_P3_5, 105 HAL_GPIO_PIN_P3_6 = HAL_IOMUX_PIN_P3_6, 106 HAL_GPIO_PIN_P3_7 = HAL_IOMUX_PIN_P3_7, 107 108 HAL_GPIO_PIN_P4_0 = HAL_IOMUX_PIN_P4_0, 109 HAL_GPIO_PIN_P4_1 = HAL_IOMUX_PIN_P4_1, 110 HAL_GPIO_PIN_P4_2 = HAL_IOMUX_PIN_P4_2, 111 HAL_GPIO_PIN_P4_3 = HAL_IOMUX_PIN_P4_3, 112 HAL_GPIO_PIN_P4_4 = HAL_IOMUX_PIN_P4_4, 113 HAL_GPIO_PIN_P4_5 = HAL_IOMUX_PIN_P4_5, 114 HAL_GPIO_PIN_P4_6 = HAL_IOMUX_PIN_P4_6, 115 HAL_GPIO_PIN_P4_7 = HAL_IOMUX_PIN_P4_7, 116 117 HAL_GPIO_PIN_NUM = HAL_IOMUX_PIN_NUM, 118 119 HAL_GPIO_PIN_LED1 = HAL_IOMUX_PIN_LED1, 120 HAL_GPIO_PIN_LED2 = HAL_IOMUX_PIN_LED2, 121 122 HAL_GPIO_PIN_LED_NUM = HAL_IOMUX_PIN_LED_NUM, 123 }; 124 125 enum HAL_IOMUX_FUNCTION_T { 126 HAL_IOMUX_FUNC_NONE = 0, 127 HAL_IOMUX_FUNC_GPIO, 128 HAL_IOMUX_FUNC_AS_GPIO = HAL_IOMUX_FUNC_GPIO, 129 HAL_IOMUX_FUNC_BT_UART_CTS, 130 HAL_IOMUX_FUNC_BT_UART_RTS, 131 HAL_IOMUX_FUNC_BT_UART_RX, 132 HAL_IOMUX_FUNC_BT_UART_TX, 133 HAL_IOMUX_FUNC_CLK_32K_IN, 134 HAL_IOMUX_FUNC_CLK_REQ_IN, 135 HAL_IOMUX_FUNC_CLK_REQ_OUT, 136 HAL_IOMUX_FUNC_CLK_OUT, 137 HAL_IOMUX_FUNC_I2C_M0_SCL, 138 HAL_IOMUX_FUNC_I2C_M0_SDA, 139 HAL_IOMUX_FUNC_I2C_M1_SCL, 140 HAL_IOMUX_FUNC_I2C_M1_SDA, 141 HAL_IOMUX_FUNC_I2S0_MCLK, 142 HAL_IOMUX_FUNC_I2S0_SCK, 143 HAL_IOMUX_FUNC_I2S0_SDI0, 144 HAL_IOMUX_FUNC_I2S0_SDI1, 145 HAL_IOMUX_FUNC_I2S0_SDI2, 146 HAL_IOMUX_FUNC_I2S0_SDI3, 147 HAL_IOMUX_FUNC_I2S0_SDO, 148 HAL_IOMUX_FUNC_I2S0_WS, 149 HAL_IOMUX_FUNC_PCM_CLK, 150 HAL_IOMUX_FUNC_PCM_DI, 151 HAL_IOMUX_FUNC_PCM_DO, 152 HAL_IOMUX_FUNC_PCM_FSYNC, 153 HAL_IOMUX_FUNC_PDM0_CK, 154 HAL_IOMUX_FUNC_PDM0_D, 155 HAL_IOMUX_FUNC_PDM1_CK, 156 HAL_IOMUX_FUNC_PDM1_D, 157 HAL_IOMUX_FUNC_PDM2_CK, 158 HAL_IOMUX_FUNC_PDM2_D, 159 HAL_IOMUX_FUNC_PWM0, 160 HAL_IOMUX_FUNC_PWM1, 161 HAL_IOMUX_FUNC_PWM2, 162 HAL_IOMUX_FUNC_PWM3, 163 HAL_IOMUX_FUNC_SDMMC_CLK, 164 HAL_IOMUX_FUNC_SDMMC_CMD, 165 HAL_IOMUX_FUNC_SDMMC_DATA0, 166 HAL_IOMUX_FUNC_SDMMC_DATA1, 167 HAL_IOMUX_FUNC_SDMMC_DATA2, 168 HAL_IOMUX_FUNC_SDMMC_DATA3, 169 HAL_IOMUX_FUNC_SDMMC_DATA4, 170 HAL_IOMUX_FUNC_SDMMC_DATA5, 171 HAL_IOMUX_FUNC_SDMMC_DATA6, 172 HAL_IOMUX_FUNC_SDMMC_DATA7, 173 HAL_IOMUX_FUNC_SPDIF0_DI, 174 HAL_IOMUX_FUNC_SPDIF0_DO, 175 HAL_IOMUX_FUNC_SPI_CLK,//spi0 176 HAL_IOMUX_FUNC_SPI_CS0, 177 HAL_IOMUX_FUNC_SPI_CS1, 178 HAL_IOMUX_FUNC_SPI_CS2, 179 HAL_IOMUX_FUNC_SPI_CS3, 180 HAL_IOMUX_FUNC_SPI_DCN, 181 HAL_IOMUX_FUNC_SPI_DI0, 182 HAL_IOMUX_FUNC_SPI_DI1, 183 HAL_IOMUX_FUNC_SPI_DI2, 184 HAL_IOMUX_FUNC_SPI_DI3, 185 HAL_IOMUX_FUNC_SPI_DIO, 186 HAL_IOMUX_FUNC_SPILCD_CLK,//spi1 187 HAL_IOMUX_FUNC_SPILCD_CS0, 188 HAL_IOMUX_FUNC_SPILCD_CS1, 189 HAL_IOMUX_FUNC_SPILCD_CS2, 190 HAL_IOMUX_FUNC_SPILCD_CS3, 191 HAL_IOMUX_FUNC_SPILCD_DCN, 192 HAL_IOMUX_FUNC_SPILCD_DI0, 193 HAL_IOMUX_FUNC_SPILCD_DI1, 194 HAL_IOMUX_FUNC_SPILCD_DI2, 195 HAL_IOMUX_FUNC_SPILCD_DI3, 196 HAL_IOMUX_FUNC_SPILCD_DIO, 197 HAL_IOMUX_FUNC_UART0_RX, 198 HAL_IOMUX_FUNC_UART0_TX, 199 HAL_IOMUX_FUNC_UART1_CTS, 200 HAL_IOMUX_FUNC_UART1_RTS, 201 HAL_IOMUX_FUNC_UART1_RX, 202 HAL_IOMUX_FUNC_UART1_TX, 203 HAL_IOMUX_FUNC_UART2_RX, 204 HAL_IOMUX_FUNC_UART2_TX, 205 HAL_IOMUX_FUNC_UART2_CTS, 206 HAL_IOMUX_FUNC_UART2_RTS, 207 HAL_IOMUX_FUNC_WF_UART_CTS, 208 HAL_IOMUX_FUNC_WF_UART_RTS, 209 HAL_IOMUX_FUNC_WF_UART_RX, 210 HAL_IOMUX_FUNC_WF_UART_TX, 211 HAL_IOMUX_FUNC_WF_FEM_CNTL0,//no ctrl1 212 HAL_IOMUX_FUNC_WF_FEM_CNTL2, 213 HAL_IOMUX_FUNC_WF_FEM_CNTL3, 214 HAL_IOMUX_FUNC_WF_FEM_CNTL4, 215 HAL_IOMUX_FUNC_WF_FEM_CNTL5, 216 HAL_IOMUX_FUNC_WF_FEM_CNTL6, 217 HAL_IOMUX_FUNC_WF_FEM_CNTL7, 218 HAL_IOMUX_FUNC_WF_FEM_CNTL8, 219 HAL_IOMUX_FUNC_WF_FEM_CNTL9, 220 HAL_IOMUX_FUNC_WF_SDIO_CLK, 221 HAL_IOMUX_FUNC_WF_SDIO_CMD, 222 HAL_IOMUX_FUNC_WF_SDIO_DATA0, 223 HAL_IOMUX_FUNC_WF_SDIO_DATA1, 224 HAL_IOMUX_FUNC_WF_SDIO_DATA2, 225 HAL_IOMUX_FUNC_WF_SDIO_DATA3, 226 HAL_IOMUX_FUNC_WF_WAKE_HOST, 227 HAL_IOMUX_FUNC_WF_TXON, 228 229 HAL_IOMUX_FUNC_END 230 }; 231 232 enum HAL_IOMUX_ISPI_ACCESS_T { 233 HAL_IOMUX_ISPI_BT_RF = (1 << 0), 234 HAL_IOMUX_ISPI_BT_PMU = (1 << 1), 235 HAL_IOMUX_ISPI_BT_ANA = (1 << 2), 236 HAL_IOMUX_ISPI_MCU_RF = (1 << 3), 237 HAL_IOMUX_ISPI_MCU_PMU = (1 << 4), 238 HAL_IOMUX_ISPI_MCU_ANA = (1 << 5), 239 }; 240 241 void hal_iomux_set_i2s_mclk(void); 242 243 void hal_iomux_set_i2s1(void); 244 245 void hal_iomux_set_mcu_clock_out(void); 246 247 void hal_iomux_set_bt_clock_out(void); 248 249 int32_t hal_iomux_set_io_driver(enum HAL_IOMUX_PIN_T pin, uint32_t val); 250 #ifdef __cplusplus 251 } 252 #endif 253 254 #endif 255