1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2016 Intel Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 * 24 */ 25 26 #ifndef __I915_VMA_TYPES_H__ 27 #define __I915_VMA_TYPES_H__ 28 29 #include <linux/rbtree.h> 30 31 #include <drm/drm_mm.h> 32 33 #include "gem/i915_gem_object_types.h" 34 35 enum i915_cache_level; 36 37 /** 38 * DOC: Global GTT views 39 * 40 * Background and previous state 41 * 42 * Historically objects could exists (be bound) in global GTT space only as 43 * singular instances with a view representing all of the object's backing pages 44 * in a linear fashion. This view will be called a normal view. 45 * 46 * To support multiple views of the same object, where the number of mapped 47 * pages is not equal to the backing store, or where the layout of the pages 48 * is not linear, concept of a GGTT view was added. 49 * 50 * One example of an alternative view is a stereo display driven by a single 51 * image. In this case we would have a framebuffer looking like this 52 * (2x2 pages): 53 * 54 * 12 55 * 34 56 * 57 * Above would represent a normal GGTT view as normally mapped for GPU or CPU 58 * rendering. In contrast, fed to the display engine would be an alternative 59 * view which could look something like this: 60 * 61 * 1212 62 * 3434 63 * 64 * In this example both the size and layout of pages in the alternative view is 65 * different from the normal view. 66 * 67 * Implementation and usage 68 * 69 * GGTT views are implemented using VMAs and are distinguished via enum 70 * i915_gtt_view_type and struct i915_gtt_view. 71 * 72 * A new flavour of core GEM functions which work with GGTT bound objects were 73 * added with the _ggtt_ infix, and sometimes with _view postfix to avoid 74 * renaming in large amounts of code. They take the struct i915_gtt_view 75 * parameter encapsulating all metadata required to implement a view. 76 * 77 * As a helper for callers which are only interested in the normal view, 78 * globally const i915_gtt_view_normal singleton instance exists. All old core 79 * GEM API functions, the ones not taking the view parameter, are operating on, 80 * or with the normal GGTT view. 81 * 82 * Code wanting to add or use a new GGTT view needs to: 83 * 84 * 1. Add a new enum with a suitable name. 85 * 2. Extend the metadata in the i915_gtt_view structure if required. 86 * 3. Add support to i915_get_vma_pages(). 87 * 88 * New views are required to build a scatter-gather table from within the 89 * i915_get_vma_pages function. This table is stored in the vma.gtt_view and 90 * exists for the lifetime of an VMA. 91 * 92 * Core API is designed to have copy semantics which means that passed in 93 * struct i915_gtt_view does not need to be persistent (left around after 94 * calling the core API functions). 95 * 96 */ 97 98 struct i915_vma_resource; 99 100 struct intel_remapped_plane_info { 101 /* in gtt pages */ 102 u32 offset:31; 103 u32 linear:1; 104 union { 105 /* in gtt pages for !linear */ 106 struct { 107 u16 width; 108 u16 height; 109 u16 src_stride; 110 u16 dst_stride; 111 }; 112 113 /* in gtt pages for linear */ 114 u32 size; 115 }; 116 } __packed; 117 118 struct intel_remapped_info { 119 struct intel_remapped_plane_info plane[4]; 120 /* in gtt pages */ 121 u32 plane_alignment; 122 } __packed; 123 124 struct intel_rotation_info { 125 struct intel_remapped_plane_info plane[2]; 126 } __packed; 127 128 struct intel_partial_info { 129 u64 offset; 130 unsigned int size; 131 } __packed; 132 133 enum i915_gtt_view_type { 134 I915_GTT_VIEW_NORMAL = 0, 135 I915_GTT_VIEW_ROTATED = sizeof(struct intel_rotation_info), 136 I915_GTT_VIEW_PARTIAL = sizeof(struct intel_partial_info), 137 I915_GTT_VIEW_REMAPPED = sizeof(struct intel_remapped_info), 138 }; 139 assert_i915_gem_gtt_types(void)140 static inline void assert_i915_gem_gtt_types(void) 141 { 142 BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16)); 143 BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int)); 144 BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 5 * sizeof(u32) + 16 * sizeof(u16)); 145 146 /* Check that rotation/remapped shares offsets for simplicity */ 147 BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) != 148 offsetof(struct intel_rotation_info, plane[0])); 149 BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) != 150 offsetofend(struct intel_rotation_info, plane[1])); 151 152 /* As we encode the size of each branch inside the union into its type, 153 * we have to be careful that each branch has a unique size. 154 */ 155 switch ((enum i915_gtt_view_type)0) { 156 case I915_GTT_VIEW_NORMAL: 157 case I915_GTT_VIEW_PARTIAL: 158 case I915_GTT_VIEW_ROTATED: 159 case I915_GTT_VIEW_REMAPPED: 160 /* gcc complains if these are identical cases */ 161 break; 162 } 163 } 164 165 struct i915_gtt_view { 166 enum i915_gtt_view_type type; 167 union { 168 /* Members need to contain no holes/padding */ 169 struct intel_partial_info partial; 170 struct intel_rotation_info rotated; 171 struct intel_remapped_info remapped; 172 }; 173 }; 174 175 /** 176 * DOC: Virtual Memory Address 177 * 178 * A VMA represents a GEM BO that is bound into an address space. Therefore, a 179 * VMA's presence cannot be guaranteed before binding, or after unbinding the 180 * object into/from the address space. 181 * 182 * To make things as simple as possible (ie. no refcounting), a VMA's lifetime 183 * will always be <= an objects lifetime. So object refcounting should cover us. 184 */ 185 struct i915_vma { 186 struct drm_mm_node node; 187 188 struct i915_address_space *vm; 189 const struct i915_vma_ops *ops; 190 191 struct drm_i915_gem_object *obj; 192 193 struct sg_table *pages; 194 void __iomem *iomap; 195 void *private; /* owned by creator */ 196 197 struct i915_fence_reg *fence; 198 199 u64 size; 200 struct i915_page_sizes page_sizes; 201 202 /* mmap-offset associated with fencing for this vma */ 203 struct i915_mmap_offset *mmo; 204 205 u32 guard; /* padding allocated around vma->pages within the node */ 206 u32 fence_size; 207 u32 fence_alignment; 208 u32 display_alignment; 209 210 /** 211 * Count of the number of times this vma has been opened by different 212 * handles (but same file) for execbuf, i.e. the number of aliases 213 * that exist in the ctx->handle_vmas LUT for this vma. 214 */ 215 atomic_t open_count; 216 atomic_t flags; 217 /** 218 * How many users have pinned this object in GTT space. 219 * 220 * This is a tightly bound, fairly small number of users, so we 221 * stuff inside the flags field so that we can both check for overflow 222 * and detect a no-op i915_vma_pin() in a single check, while also 223 * pinning the vma. 224 * 225 * The worst case display setup would have the same vma pinned for 226 * use on each plane on each crtc, while also building the next atomic 227 * state and holding a pin for the length of the cleanup queue. In the 228 * future, the flip queue may be increased from 1. 229 * Estimated worst case: 3 [qlen] * 4 [max crtcs] * 7 [max planes] = 84 230 * 231 * For GEM, the number of concurrent users for pwrite/pread is 232 * unbounded. For execbuffer, it is currently one but will in future 233 * be extended to allow multiple clients to pin vma concurrently. 234 * 235 * We also use suballocated pages, with each suballocation claiming 236 * its own pin on the shared vma. At present, this is limited to 237 * exclusive cachelines of a single page, so a maximum of 64 possible 238 * users. 239 */ 240 #define I915_VMA_PIN_MASK 0x3ff 241 #define I915_VMA_OVERFLOW 0x200 242 243 /** Flags and address space this VMA is bound to */ 244 #define I915_VMA_GLOBAL_BIND_BIT 10 245 #define I915_VMA_LOCAL_BIND_BIT 11 246 247 #define I915_VMA_GLOBAL_BIND ((int)BIT(I915_VMA_GLOBAL_BIND_BIT)) 248 #define I915_VMA_LOCAL_BIND ((int)BIT(I915_VMA_LOCAL_BIND_BIT)) 249 250 #define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND) 251 252 #define I915_VMA_ERROR_BIT 12 253 #define I915_VMA_ERROR ((int)BIT(I915_VMA_ERROR_BIT)) 254 255 #define I915_VMA_GGTT_BIT 13 256 #define I915_VMA_CAN_FENCE_BIT 14 257 #define I915_VMA_USERFAULT_BIT 15 258 #define I915_VMA_GGTT_WRITE_BIT 16 259 260 #define I915_VMA_GGTT ((int)BIT(I915_VMA_GGTT_BIT)) 261 #define I915_VMA_CAN_FENCE ((int)BIT(I915_VMA_CAN_FENCE_BIT)) 262 #define I915_VMA_USERFAULT ((int)BIT(I915_VMA_USERFAULT_BIT)) 263 #define I915_VMA_GGTT_WRITE ((int)BIT(I915_VMA_GGTT_WRITE_BIT)) 264 265 #define I915_VMA_SCANOUT_BIT 17 266 #define I915_VMA_SCANOUT ((int)BIT(I915_VMA_SCANOUT_BIT)) 267 268 struct i915_active active; 269 270 #define I915_VMA_PAGES_BIAS 24 271 #define I915_VMA_PAGES_ACTIVE (BIT(24) | 1) 272 atomic_t pages_count; /* number of active binds to the pages */ 273 274 /** 275 * Whether we hold a reference on the vm dma_resv lock to temporarily 276 * block vm freeing until the vma is destroyed. 277 * Protected by the vm mutex. 278 */ 279 bool vm_ddestroy; 280 281 /** 282 * Support different GGTT views into the same object. 283 * This means there can be multiple VMA mappings per object and per VM. 284 * i915_gtt_view_type is used to distinguish between those entries. 285 * The default one of zero (I915_GTT_VIEW_NORMAL) is default and also 286 * assumed in GEM functions which take no ggtt view parameter. 287 */ 288 struct i915_gtt_view gtt_view; 289 290 /** This object's place on the active/inactive lists */ 291 struct list_head vm_link; 292 293 struct list_head obj_link; /* Link in the object's VMA list */ 294 struct rb_node obj_node; 295 struct hlist_node obj_hash; 296 297 /** This vma's place in the eviction list */ 298 struct list_head evict_link; 299 300 struct list_head closed_link; 301 302 /** The async vma resource. Protected by the vm_mutex */ 303 struct i915_vma_resource *resource; 304 }; 305 306 #endif 307