1 /* 2 * Copyright (c) 2016 - 2020, Broadcom 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef EMMC_H 8 #define EMMC_H 9 10 #include <stdint.h> 11 12 #include <common/debug.h> 13 14 #include <platform_def.h> 15 16 #include "emmc_chal_types.h" 17 #include "emmc_chal_sd.h" 18 #include "emmc_csl_sdprot.h" 19 #include "emmc_csl_sdcmd.h" 20 #include "emmc_pboot_hal_memory_drv.h" 21 22 /* ------------------------------------------------------------------- */ 23 #define EXT_CSD_SIZE 512 24 25 #ifdef PLAT_SD_MAX_READ_LENGTH 26 #define SD_MAX_READ_LENGTH PLAT_SD_MAX_READ_LENGTH 27 #ifdef USE_EMMC_LARGE_BLK_TRANSFER_LENGTH 28 #define SD_MAX_BLK_TRANSFER_LENGTH 0x10000000 29 #else 30 #define SD_MAX_BLK_TRANSFER_LENGTH 0x1000 31 #endif 32 #else 33 #define SD_MAX_READ_LENGTH EMMC_BLOCK_SIZE 34 #define SD_MAX_BLK_TRANSFER_LENGTH EMMC_BLOCK_SIZE 35 #endif 36 37 struct emmc_global_buffer { 38 union { 39 uint8_t Ext_CSD_storage[EXT_CSD_SIZE]; 40 uint8_t tempbuf[SD_MAX_READ_LENGTH]; 41 } u; 42 }; 43 44 struct emmc_global_vars { 45 struct sd_card_data cardData; 46 struct sd_handle sdHandle; 47 struct sd_dev sdDevice; 48 struct sd_card_info sdCard; 49 unsigned int init_done; 50 }; 51 52 #define ICFG_SDIO0_CAP0__SLOT_TYPE_R 27 53 #define ICFG_SDIO0_CAP0__INT_MODE_R 26 54 #define ICFG_SDIO0_CAP0__SYS_BUS_64BIT_R 25 55 #define ICFG_SDIO0_CAP0__VOLTAGE_1P8V_R 24 56 #define ICFG_SDIO0_CAP0__VOLTAGE_3P0V_R 23 57 #define ICFG_SDIO0_CAP0__VOLTAGE_3P3V_R 22 58 #define ICFG_SDIO0_CAP0__SUSPEND_RESUME_R 21 59 #define ICFG_SDIO0_CAP0__SDMA_R 20 60 #define ICFG_SDIO0_CAP0__HIGH_SPEED_R 19 61 #define ICFG_SDIO0_CAP0__ADMA2_R 18 62 #define ICFG_SDIO0_CAP0__EXTENDED_MEDIA_R 17 63 #define ICFG_SDIO0_CAP0__MAX_BLOCK_LEN_R 15 64 #define ICFG_SDIO0_CAP0__BASE_CLK_FREQ_R 7 65 #define ICFG_SDIO0_CAP0__TIMEOUT_UNIT_R 6 66 #define ICFG_SDIO0_CAP0__TIMEOUT_CLK_FREQ_R 0 67 #define ICFG_SDIO0_CAP1__SPI_BLOCK_MODE_R 22 68 #define ICFG_SDIO0_CAP1__SPI_MODE_R 21 69 #define ICFG_SDIO0_CAP1__CLK_MULT_R 13 70 #define ICFG_SDIO0_CAP1__RETUNING_MODE_R 11 71 #define ICFG_SDIO0_CAP1__TUNE_SDR50_R 10 72 #define ICFG_SDIO0_CAP1__TIME_RETUNE_R 6 73 #define ICFG_SDIO0_CAP1__DRIVER_D_R 5 74 #define ICFG_SDIO0_CAP1__DRIVER_C_R 4 75 #define ICFG_SDIO0_CAP1__DRIVER_A_R 3 76 #define ICFG_SDIO0_CAP1__DDR50_R 2 77 #define ICFG_SDIO0_CAP1__SDR104_R 1 78 #define ICFG_SDIO0_CAP1__SDR50_R 0 79 80 #define SDIO0_CTRL_REGS_BASE_ADDR (SDIO0_EMMCSDXC_SYSADDR) 81 #define SDIO0_IDM_RESET_CTRL_ADDR (SDIO_IDM0_IDM_RESET_CONTROL) 82 83 #define EMMC_CTRL_REGS_BASE_ADDR SDIO0_CTRL_REGS_BASE_ADDR 84 #define EMMC_IDM_RESET_CTRL_ADDR SDIO0_IDM_RESET_CTRL_ADDR 85 #define EMMC_IDM_IO_CTRL_DIRECT_ADDR SDIO_IDM0_IO_CONTROL_DIRECT 86 87 extern struct emmc_global_buffer *emmc_global_buf_ptr; 88 89 extern struct emmc_global_vars *emmc_global_vars_ptr; 90 91 #define EMMC_CARD_DETECT_TIMEOUT_MS 1200 92 #define EMMC_CMD_TIMEOUT_MS 200 93 #define EMMC_BUSY_CMD_TIMEOUT_MS 200 94 #define EMMC_CLOCK_SETTING_TIMEOUT_MS 100 95 #define EMMC_WFE_RETRY 40000 96 #define EMMC_WFE_RETRY_DELAY_US 10 97 98 #ifdef EMMC_DEBUG 99 #define EMMC_TRACE INFO 100 #else 101 #define EMMC_TRACE(...) 102 #endif 103 104 #endif /* EMMC_H */ 105