1 /** 2 * Copyright (c) 2021 Raspberry Pi (Trading) Ltd. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 #ifndef _ADDRESSMAP_H_ 7 #define _ADDRESSMAP_H_ 8 9 // Register address offsets for atomic RMW aliases 10 #define REG_ALIAS_RW_BITS (0x0u << 12u) 11 #define REG_ALIAS_XOR_BITS (0x1u << 12u) 12 #define REG_ALIAS_SET_BITS (0x2u << 12u) 13 #define REG_ALIAS_CLR_BITS (0x3u << 12u) 14 15 #define ROM_BASE 0x00000000 16 #define XIP_BASE 0x10000000 17 #define XIP_MAIN_BASE 0x10000000 18 #define XIP_NOALLOC_BASE 0x11000000 19 #define XIP_NOCACHE_BASE 0x12000000 20 #define XIP_NOCACHE_NOALLOC_BASE 0x13000000 21 #define XIP_CTRL_BASE 0x14000000 22 #define XIP_SRAM_BASE 0x15000000 23 #define XIP_SRAM_END 0x15004000 24 #define XIP_SSI_BASE 0x18000000 25 #define SRAM_BASE 0x20000000 26 #define SRAM_STRIPED_BASE 0x20000000 27 #define SRAM_STRIPED_END 0x20040000 28 #define SRAM4_BASE 0x20040000 29 #define SRAM5_BASE 0x20041000 30 #define SRAM_END 0x20042000 31 #define SRAM0_BASE 0x21000000 32 #define SRAM1_BASE 0x21010000 33 #define SRAM2_BASE 0x21020000 34 #define SRAM3_BASE 0x21030000 35 #define SYSINFO_BASE 0x40000000 36 #define SYSCFG_BASE 0x40004000 37 #define CLOCKS_BASE 0x40008000 38 #define RESETS_BASE 0x4000c000 39 #define PSM_BASE 0x40010000 40 #define IO_BANK0_BASE 0x40014000 41 #define IO_QSPI_BASE 0x40018000 42 #define PADS_BANK0_BASE 0x4001c000 43 #define PADS_QSPI_BASE 0x40020000 44 #define XOSC_BASE 0x40024000 45 #define PLL_SYS_BASE 0x40028000 46 #define PLL_USB_BASE 0x4002c000 47 #define BUSCTRL_BASE 0x40030000 48 #define UART0_BASE 0x40034000 49 #define UART1_BASE 0x40038000 50 #define SPI0_BASE 0x4003c000 51 #define SPI1_BASE 0x40040000 52 #define I2C0_BASE 0x40044000 53 #define I2C1_BASE 0x40048000 54 #define ADC_BASE 0x4004c000 55 #define PWM_BASE 0x40050000 56 #define TIMER_BASE 0x40054000 57 #define WATCHDOG_BASE 0x40058000 58 #define RTC_BASE 0x4005c000 59 #define ROSC_BASE 0x40060000 60 #define VREG_AND_CHIP_RESET_BASE 0x40064000 61 #define TBMAN_BASE 0x4006c000 62 #define DMA_BASE 0x50000000 63 #define USBCTRL_DPRAM_BASE 0x50100000 64 #define USBCTRL_BASE 0x50100000 65 #define USBCTRL_REGS_BASE 0x50110000 66 #define PIO0_BASE 0x50200000 67 #define PIO1_BASE 0x50300000 68 #define XIP_AUX_BASE 0x50400000 69 #define SIO_BASE 0xd0000000 70 #define PPB_BASE 0xe0000000 71 72 #endif // _ADDRESSMAP_H_ 73