1 /*
2 * @brief LPC15xx GPIO group driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2013
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __GPIOGROUP_15XX_H_
33 #define __GPIOGROUP_15XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /** @defgroup GPIOGP_15XX CHIP: LPC15xx GPIO group driver
40 * @ingroup CHIP_15XX_Drivers
41 * @{
42 */
43
44 /**
45 * @brief GPIO grouped interrupt register block structure
46 */
47 typedef struct { /*!< GPIO_GROUP_INTn Structure */
48 __IO uint32_t CTRL; /*!< GPIO grouped interrupt control register */
49 __I uint32_t RESERVED0[7];
50 __IO uint32_t PORT_POL[8]; /*!< GPIO grouped interrupt port polarity register */
51 __IO uint32_t PORT_ENA[8]; /*!< GPIO grouped interrupt port m enable register */
52 uint32_t RESERVED1[1000];
53 } LPC_GPIOGROUPINT_T;
54
55 /**
56 * LPC15xx GPIO group bit definitions
57 */
58 #define GPIOGR_INT (1 << 0) /*!< GPIO interrupt pending/clear bit */
59 #define GPIOGR_COMB (1 << 1) /*!< GPIO interrupt OR(0)/AND(1) mode bit */
60 #define GPIOGR_TRIG (1 << 2) /*!< GPIO interrupt edge(0)/level(1) mode bit */
61
62 /**
63 * @brief Initialize GPIO group interrupt block
64 * @param pGPIO : The base of GPIO group 0 peripheral on the chip
65 * @return Nothing
66 */
Chip_GPIOGP_Init(LPC_GPIOGROUPINT_T * pGPIO)67 STATIC INLINE void Chip_GPIOGP_Init(LPC_GPIOGROUPINT_T *pGPIO)
68 {
69 Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GINT);
70 Chip_SYSCTL_PeriphReset(RESET_GINT);
71 }
72
73 /**
74 * @brief De-Initialize GPIO group interrupt block
75 * @param pGPIO : The base of GPIO group 0 peripheral on the chip
76 * @return Nothing
77 */
Chip_GPIOGP_DeInit(LPC_GPIOGROUPINT_T * pGPIO)78 STATIC INLINE void Chip_GPIOGP_DeInit(LPC_GPIOGROUPINT_T *pGPIO)
79 {
80 Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_GINT);
81 }
82
83 /**
84 * @brief Clear interrupt pending status for the selected group
85 * @param pGPIOGPINT : Pointer to GPIO group register block
86 * @param group : GPIO group number
87 * @return None
88 */
Chip_GPIOGP_ClearIntStatus(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group)89 STATIC INLINE void Chip_GPIOGP_ClearIntStatus(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
90 {
91 uint32_t temp;
92
93 temp = pGPIOGPINT[group].CTRL;
94 pGPIOGPINT[group].CTRL = temp | GPIOGR_INT;
95 }
96
97 /**
98 * @brief Returns current GPIO group inetrrupt pending status
99 * @param pGPIOGPINT : Pointer to GPIO group register block
100 * @param group : GPIO group number
101 * @return true if the group interrupt is pending, otherwise false.
102 */
Chip_GPIOGP_GetIntStatus(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group)103 STATIC INLINE bool Chip_GPIOGP_GetIntStatus(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
104 {
105 return (bool) ((pGPIOGPINT[group].CTRL & GPIOGR_INT) != 0);
106 }
107
108 /**
109 * @brief Selected GPIO group functionality for trigger on any pin in group (OR mode)
110 * @param pGPIOGPINT : Pointer to GPIO group register block
111 * @param group : GPIO group number
112 * @return None
113 */
Chip_GPIOGP_SelectOrMode(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group)114 STATIC INLINE void Chip_GPIOGP_SelectOrMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
115 {
116 pGPIOGPINT[group].CTRL &= ~GPIOGR_COMB;
117 }
118
119 /**
120 * @brief Selected GPIO group functionality for trigger on all matching pins in group (AND mode)
121 * @param pGPIOGPINT : Pointer to GPIO group register block
122 * @param group : GPIO group number
123 * @return None
124 */
Chip_GPIOGP_SelectAndMode(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group)125 STATIC INLINE void Chip_GPIOGP_SelectAndMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
126 {
127 pGPIOGPINT[group].CTRL |= GPIOGR_COMB;
128 }
129
130 /**
131 * @brief Selected GPIO group functionality edge trigger mode
132 * @param pGPIOGPINT : Pointer to GPIO group register block
133 * @param group : GPIO group number
134 * @return None
135 */
Chip_GPIOGP_SelectEdgeMode(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group)136 STATIC INLINE void Chip_GPIOGP_SelectEdgeMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
137 {
138 pGPIOGPINT[group].CTRL &= ~GPIOGR_TRIG;
139 }
140
141 /**
142 * @brief Selected GPIO group functionality level trigger mode
143 * @param pGPIOGPINT : Pointer to GPIO group register block
144 * @param group : GPIO group number
145 * @return None
146 */
Chip_GPIOGP_SelectLevelMode(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group)147 STATIC INLINE void Chip_GPIOGP_SelectLevelMode(LPC_GPIOGROUPINT_T *pGPIOGPINT, uint8_t group)
148 {
149 pGPIOGPINT[group].CTRL |= GPIOGR_TRIG;
150 }
151
152 /**
153 * @brief Set selected pins for the group and port to low level trigger
154 * @param pGPIOGPINT : Pointer to GPIO group register block
155 * @param group : GPIO group number
156 * @param port : GPIO port number
157 * @param pinMask : Or'ed value of pins to select for low level (bit 0 = pin 0, 1 = pin1, etc.)
158 * @return None
159 */
Chip_GPIOGP_SelectLowLevel(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group,uint8_t port,uint32_t pinMask)160 STATIC INLINE void Chip_GPIOGP_SelectLowLevel(LPC_GPIOGROUPINT_T *pGPIOGPINT,
161 uint8_t group,
162 uint8_t port,
163 uint32_t pinMask)
164 {
165 pGPIOGPINT[group].PORT_POL[port] &= ~pinMask;
166 }
167
168 /**
169 * @brief Set selected pins for the group and port to high level trigger
170 * @param pGPIOGPINT : Pointer to GPIO group register block
171 * @param group : GPIO group number
172 * @param port : GPIO port number
173 * @param pinMask : Or'ed value of pins to select for high level (bit 0 = pin 0, 1 = pin1, etc.)
174 * @return None
175 */
Chip_GPIOGP_SelectHighLevel(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group,uint8_t port,uint32_t pinMask)176 STATIC INLINE void Chip_GPIOGP_SelectHighLevel(LPC_GPIOGROUPINT_T *pGPIOGPINT,
177 uint8_t group,
178 uint8_t port,
179 uint32_t pinMask)
180 {
181 pGPIOGPINT[group].PORT_POL[port] |= pinMask;
182 }
183
184 /**
185 * @brief Disabled selected pins for the group interrupt
186 * @param pGPIOGPINT : Pointer to GPIO group register block
187 * @param group : GPIO group number
188 * @param port : GPIO port number
189 * @param pinMask : Or'ed value of pins to disable interrupt for (bit 0 = pin 0, 1 = pin1, etc.)
190 * @return None
191 * @note Disabled pins do not contrinute to the group interrupt.
192 */
Chip_GPIOGP_DisableGroupPins(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group,uint8_t port,uint32_t pinMask)193 STATIC INLINE void Chip_GPIOGP_DisableGroupPins(LPC_GPIOGROUPINT_T *pGPIOGPINT,
194 uint8_t group,
195 uint8_t port,
196 uint32_t pinMask)
197 {
198 pGPIOGPINT[group].PORT_ENA[port] &= ~pinMask;
199 }
200
201 /**
202 * @brief Enable selected pins for the group interrupt
203 * @param pGPIOGPINT : Pointer to GPIO group register block
204 * @param group : GPIO group number
205 * @param port : GPIO port number
206 * @param pinMask : Or'ed value of pins to enable interrupt for (bit 0 = pin 0, 1 = pin1, etc.)
207 * @return None
208 * @note Enabled pins contribute to the group interrupt.
209 */
Chip_GPIOGP_EnableGroupPins(LPC_GPIOGROUPINT_T * pGPIOGPINT,uint8_t group,uint8_t port,uint32_t pinMask)210 STATIC INLINE void Chip_GPIOGP_EnableGroupPins(LPC_GPIOGROUPINT_T *pGPIOGPINT,
211 uint8_t group,
212 uint8_t port,
213 uint32_t pinMask)
214 {
215 pGPIOGPINT[group].PORT_ENA[port] |= pinMask;
216 }
217
218 /**
219 * @}
220 */
221
222 #ifdef __cplusplus
223 }
224 #endif
225
226 #endif /* __GPIOGROUP_15XX_H_ */
227