1 /*
2 * @brief LPC15xx SCTIPU driver
3 *
4 * @note
5 * Copyright(C) NXP Semiconductors, 2013
6 * All rights reserved.
7 *
8 * @par
9 * Software that is described herein is for illustrative purposes only
10 * which provides customers with programming information regarding the
11 * LPC products. This software is supplied "AS IS" without any warranties of
12 * any kind, and NXP Semiconductors and its licensor disclaim any and
13 * all warranties, express or implied, including all implied warranties of
14 * merchantability, fitness for a particular purpose and non-infringement of
15 * intellectual property rights. NXP Semiconductors assumes no responsibility
16 * or liability for the use of the software, conveys no license or rights under any
17 * patent, copyright, mask work right, or any other intellectual property rights in
18 * or to any products. NXP Semiconductors reserves the right to make changes
19 * in the software without notification. NXP Semiconductors also makes no
20 * representation or warranty that such application will be suitable for the
21 * specified use without further testing or modification.
22 *
23 * @par
24 * Permission to use, copy, modify, and distribute this software and its
25 * documentation is hereby granted, under NXP Semiconductors' and its
26 * licensor's relevant copyrights in the software, without fee, provided that it
27 * is used in conjunction with NXP Semiconductors microcontrollers. This
28 * copyright, permission, and disclaimer notice must appear in all copies of
29 * this code.
30 */
31
32 #ifndef __SCTIPU_15XX_H_
33 #define __SCTIPU_15XX_H_
34
35 #ifdef __cplusplus
36 extern "C" {
37 #endif
38
39 /** @defgroup SCTIPU_15XX CHIP: LPC15xx SCT Input Processing Unit (SCTIPU) driver
40 * @ingroup CHIP_15XX_Drivers
41 * @{
42 */
43
44 /**
45 * @brief LPC15XX SCTIPU abort enable/source register block structure
46 */
47 typedef struct { /*!< LPC15XX abort enable/source structure */
48 __IO uint32_t ABORT_ENABLE; /*!< SCTIPU abort enable register */
49 __IO uint32_t ABORT_SOURCE; /*!< SCTIPU abort source register */
50 __I uint32_t RESERVED[6];
51 } LPC_SCTIPU_ABT_T;
52
53 /**
54 * @brief LPC15XX SCTIPU register block structure
55 */
56 typedef struct { /*!< LPC15XX SCTIPU Structure */
57 __IO uint32_t SAMPLE_CTRL; /*!< SCTIPU sample control register */
58 __I uint32_t RESERVED[7];
59 LPC_SCTIPU_ABT_T ABORT[4]; /*!< SCTIPU abort enable/source registers */
60 } LPC_SCTIPU_T;
61
62 /**
63 * @brief Initialize the SCTIPU
64 * @return Nothing
65 * @note Must be called prior to any other SCTIPU function. Sets up clocking and
66 * initial SCTIPU states.
67 */
Chip_SCTIPU_Init(void)68 STATIC INLINE void Chip_SCTIPU_Init(void)
69 {
70 Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SCTIPU);
71 Chip_SYSCTL_PeriphReset(RESET_SCTIPU);
72 }
73
74 /**
75 * @brief De-Initialize the SCTIPU
76 * @return Nothing
77 */
Chip_SCTIPU_DeInit(void)78 STATIC INLINE void Chip_SCTIPU_DeInit(void)
79 {
80 Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SCTIPU);
81 }
82
83 /**
84 * SCTIPU sample control register bit definitions
85 */
86 #define SCTIPU_CTRL_INSEL(ch, src) ((src) << (ch)) /*!< Select SCTIPU sample (src) source for output channel ch */
87 #define SCTIPU_CTRL_INSELMASK(ch) (1 << (ch)) /*!< SCTIPU sample (src) source mask for output channel ch */
88 #define SCTIPU_CTRL_SAMPENA (0) /*!< Selects Sample_Enable_A as the latch/sample-enable control for the Sample_Output latch */
89 #define SCTIPU_CTRL_SAMPENB (1) /*!< Selects Sample_Enable_A as the latch/sample-enable control for the Sample_Output latch */
90 #define SCTIPU_CTRL_SAMPENC (2) /*!< Selects Sample_Enable_A as the latch/sample-enable control for the Sample_Output latch */
91 #define SCTIPU_CTRL_SAMPEND (3) /*!< Selects Sample_Enable_A as the latch/sample-enable control for the Sample_Output latch */
92 #define SCTIPU_CTRL_SAMPENDSEL(ch, src) ((src) << (2 + (ch * 2))) /*!< Select SCTIPU sample (src) source for output channel ch */
93 #define SCTIPU_CTRL_SAMPENDMASK(ch) (0x3 << (2 + (ch * 2))) /*!< SCTIPU sample (src) source mask for output channel ch */
94 #define SCTIPU_CTRL_LATCHENSEL(ch, ltc) ((ltc) << (12 + ch)) /*!< Select SCTIPU latched mode for output channel ch */
95 #define SCTIPU_CTRL_LATCHENMASK(ch) (1 << (12 + ch)) /*!< SCTIPU latched mode mask for output channel ch */
96 #define SCTIPU_RESERVED_BITS 0xFFFF0000
97
98 /**
99 * @brief Sets up an configuration and input source for a SCTIPU output channel
100 * @param ch : SCTIPU channel, 0-3
101 * @param useb : 0 to use SAMPLE_IN_A for the channel, or 1 for SAMPLE_IN_B
102 * @param sampIn : Sample enable input, must be SCTIPU_CTRL_SAMPENA via SCTIPU_CTRL_SAMPEND
103 * @param useLatch : 0 to transparent mode. for the channel, or 1 for latched mode
104 * @return Nothing
105 * @note Example: Chip_SCTIPU_ConfigSample(0, true, SCTIPU_CTRL_SAMPENC, true);
106 */
107 void Chip_SCTIPU_ConfigSample(uint8_t ch, uint8_t useb, uint8_t sampIn, uint8_t useLatch);
108
109 /**
110 * SCTIPU abort enable sources
111 */
112 #define SCTIPU_ABTENA_SCT_ABORT0 (1 << 0) /*!< Enable abort source SCT_ABORT0. Select pin from switch matrix */
113 #define SCTIPU_ABTENA_SCT_ABORT1 (1 << 1) /*!< Enable abort source SCT_ABORT1. Select pin from switch matrix */
114 #define SCTIPU_ABTENA_SCT0_OUT9 (1 << 2) /*!< Enable abort source SCT0_OUT9 */
115 #define SCTIPU_ABTENA_ADC0_THCMP_IRQ (1 << 3) /*!< Enable abort source ADC0_THCMP_IRQ */
116 #define SCTIPU_ABTENA_ADC1_THCMP_IRQ (1 << 4) /*!< Enable abort source ADC1_THCMP_IRQ */
117 #define SCTIPU_ABTENA_ACMP0_O (1 << 5) /*!< Enable abort source ACMP0_O */
118 #define SCTIPU_ABTENA_ACMP1_O (1 << 6) /*!< Enable abort source ACMP1_O */
119 #define SCTIPU_ABTENA_ACMP2_O (1 << 7) /*!< Enable abort source ACMP2_O */
120 #define SCTIPU_ABTENA_ACMP3_O (1 << 8) /*!< Enable abort source ACMP3_O */
121
122 /**
123 * @brief Selects multiple abort input enables that will be enabled to contribute to the ORed output
124 * @param ch : SCTIPU channel, 0-3
125 * @param srcAbort : Or'ed values of SCTIPU_ABTENA_* defintions used for OR'ed abort enables
126 * @return Nothing
127 * @note Example: Chip_SCTIPU_ConfigSample(0, SCTIPU_ABTENA_ACMP0_O | SCTIPU_ABTENA_ACMP1_O);<br>
128 */
Chip_SCTIPU_AbortInputEnable(uint8_t ch,uint32_t srcAbort)129 STATIC INLINE void Chip_SCTIPU_AbortInputEnable(uint8_t ch, uint32_t srcAbort)
130 {
131 LPC_SCTIPU->ABORT[ch].ABORT_ENABLE = srcAbort;
132 }
133
134 /**
135 * @brief Gets the activated SCT abort sources
136 * @param ch : SCTIPU channel, 0-3
137 * @return Nothing
138 * @note To determine if a source is active, mask the return value with a
139 * SCTIPU_ABTENA_* definition.
140 */
Chip_SCTIPU_GetActiveAbortSrc(uint8_t ch)141 STATIC INLINE uint32_t Chip_SCTIPU_GetActiveAbortSrc(uint8_t ch)
142 {
143 return LPC_SCTIPU->ABORT[ch].ABORT_SOURCE;
144 }
145
146 /**
147 * @brief Clears activated SCT abort sources
148 * @param ch : SCTIPU channel, 0-3
149 * @param srcClear : Or'ed values of SCTIPU_ABTENA_* defintions used for clearing activated states
150 * @return Nothing
151 */
Chip_SCTIPU_ClearActiveAbortSrc(uint8_t ch,uint32_t srcClear)152 STATIC INLINE void Chip_SCTIPU_ClearActiveAbortSrc(uint8_t ch, uint32_t srcClear)
153 {
154 LPC_SCTIPU->ABORT[ch].ABORT_SOURCE = srcClear;
155 }
156
157 /**
158 * @}
159 */
160
161 #ifdef __cplusplus
162 }
163 #endif
164
165 #endif /* __SCTIPU_15XX_H_ */
166