1 /* 2 * Arm SCP/MCP Software 3 * Copyright (c) 2022, Arm Limited and Contributors. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #ifndef MOD_NOR_H 9 #define MOD_NOR_H 10 11 #include "qspi_api.h" 12 13 #include <fwk_id.h> 14 15 #include <stdint.h> 16 /*! 17 * \addtogroup GroupModule Product Modules 18 * \{ 19 */ 20 21 /*! 22 * \defgroup GroupNOR NOR Driver 23 * 24 * \brief NOR device driver. 25 * 26 * \details This module implements a device driver for the NOR 27 * 28 * \{ 29 */ 30 31 /* 32 * \brief NOR API indices 33 */ 34 enum mod_nor_api_type { 35 MOD_NOR_API_TYPE_DEFAULT = 0, 36 MOD_NOR_API_TYPE_COUNT, 37 }; 38 39 /* 40 * \brief NOR read mode indices 41 */ 42 enum mod_nor_read_mode { 43 /* Read Operation */ 44 MOD_NOR_READ = 0, 45 MOD_NOR_READ_FAST, 46 MOD_NOR_READ_FAST_1_1_2, 47 MOD_NOR_READ_FAST_1_2_2, 48 MOD_NOR_READ_FAST_1_1_4, 49 MOD_NOR_READ_FAST_1_4_4, 50 MOD_NOR_READ_4BYTE, 51 MOD_NOR_READ_FAST_4BYTE, 52 MOD_NOR_READ_FAST_1_1_2_4BYTE, 53 MOD_NOR_READ_FAST_1_2_2_4BYTE, 54 MOD_NOR_READ_FAST_1_1_4_4BYTE, 55 MOD_NOR_READ_FAST_1_4_4_4BYTE, 56 57 MOD_NOR_READ_MODE_COUNT 58 }; 59 60 /* 61 * \brief NOR program mode indices 62 */ 63 enum mod_nor_program_mode { 64 /* Program Operation */ 65 MOD_NOR_PROGRAM = 0, 66 MOD_NOR_PROGRAM_1_1_2, 67 MOD_NOR_PROGRAM_1_2_2, 68 MOD_NOR_PROGRAM_1_1_4, 69 MOD_NOR_PROGRAM_1_4_4, 70 MOD_NOR_PROGRAM_4BYTE, 71 MOD_NOR_PROGRAM_1_1_4_4BYTE, 72 MOD_NOR_PROGRAM_1_4_4_4BYTE, 73 74 MOD_NOR_PROGRAM_MODE_COUNT 75 }; 76 77 /* 78 * \brief NOR erase mode indices 79 */ 80 enum mod_nor_erase_mode { 81 /* Erase Operation */ 82 MOD_NOR_ERASE_SECTOR_4KB = 0, 83 MOD_NOR_ERASE_SECTOR_32KB, 84 MOD_NOR_ERASE_BLOCK, 85 MOD_NOR_ERASE_CHIP, 86 MOD_NOR_ERASE_SECTOR_4KB_4BYTE, 87 MOD_NOR_ERASE_SECTOR_32KB_4BYTE, 88 MOD_NOR_ERASE_BLOCK_4BYTE, 89 90 MOD_NOR_ERASE_MODE_COUNT 91 }; 92 93 /*! 94 * \brief APIs to access the descriptors in the flash memory. 95 */ 96 struct mod_nor_api { 97 /*! 98 * \brief Read data from the SPI-NOR device 99 * 100 * \param id The nor element identifier. 101 * \param slave Slvae device number of the SPI-NOR. 102 * \param mode Read mode indices. 103 * \param offset The top address on the SPI-NOR for reading. 104 * \param buf Pointer to store reading data. 105 * \param len Length of reading data. 106 * 107 * \retval ::FWK_SUCCESS The operation succeeded. 108 * \retval ::FWK_E_PARAM An invalid command was encountered. 109 * \retval ::FWK_E_SUPPORT The SPI-NOR does not support a mode specified by 110 * the argmument. \retval ::FWK_E_STATE The qspi module isn't started yet. 111 * \return One of the other specific error codes. 112 */ 113 int (*read)( 114 fwk_id_t id, 115 uint8_t slave, 116 enum mod_nor_read_mode mode, 117 uint32_t offset, 118 void *buf, 119 uint32_t len); 120 121 /*! 122 * \brief Program data to the SPI-NOR device 123 * 124 * \param id The nor element identifier. 125 * \param slave Slvae device number of the SPI-NOR. 126 * \param mode Program mode indices. 127 * \param offset The top address on the SPI-NOR for programming. 128 * \param buf Pointer to store programming data. 129 * \param len Length of programming data. 130 * 131 * \retval ::FWK_SUCCESS The operation succeeded. 132 * \retval ::FWK_E_PARAM An invalid command was encountered. 133 * \retval ::FWK_E_SUPPORT The SPI-NOR does not support a mode specified by 134 * the argmument. \retval ::FWK_E_DEVICE Programming failed. \retval 135 * ::FWK_E_STATE The qspi module isn't started yet. \return One of the other 136 * specific error codes. 137 */ 138 int (*program)( 139 fwk_id_t id, 140 uint8_t slave, 141 enum mod_nor_program_mode mode, 142 uint32_t offset, 143 void *buf, 144 uint32_t len); 145 146 /*! 147 * \brief Erase data to the SPI-NOR device 148 * 149 * \param id The nor element identifier. 150 * \param slave Slvae device number of the SPI-NOR. 151 * \param mode Erase mode indices. 152 * \param offset The top address on the SPI-NOR for erase. 153 * \param len Length of erase data. 154 * 155 * \retval ::FWK_SUCCESS The operation succeeded. 156 * \retval ::FWK_E_PARAM An invalid command was encountered. 157 * \retval ::FWK_E_SUPPORT The SPI-NOR does not support a mode specified by 158 * the argmument. \retval ::FWK_E_DEVICE Erase failed. \retval ::FWK_E_STATE 159 * The qspi module isn't started yet. \return One of the other specific 160 * error codes. 161 */ 162 int (*erase)( 163 fwk_id_t id, 164 uint8_t slave, 165 enum mod_nor_erase_mode mode, 166 uint32_t offset, 167 uint32_t len); 168 169 /*! 170 * \brief Reset the SPI-NOR device 171 * 172 * \param id The nor element identifier. 173 * \param slave Slvae device number of the SPI-NOR. 174 * 175 * \retval ::FWK_SUCCESS The operation succeeded. 176 * \retval ::FWK_E_PARAM An invalid command was encountered. 177 * \retval ::FWK_E_STATE The qspi module isn't started yet. 178 * \return One of the other specific error codes. 179 */ 180 int (*reset)(fwk_id_t id, uint8_t slave); 181 182 /*! 183 * \brief configure the memory mapped read for the SPI-NOR device 184 * 185 * \param id The nor element identifier. 186 * \param slave Slave device number of the SPI-NOR. 187 * \param mode Read mode indices. 188 * \param enable flag to enable or disable XIP. 189 * 190 * \retval ::FWK_SUCCESS The operation succeeded. 191 * \retval ::FWK_E_PARAM An invalid command was encountered. 192 * \retval ::FWK_E_STATE The qspi module isn't started yet. 193 * \return One of the other specific error codes. 194 */ 195 int (*configure_mmap_read)( 196 fwk_id_t id, 197 uint8_t slave, 198 enum mod_nor_read_mode mode, 199 bool enable); 200 }; 201 202 /* 203 * \brief NOR command indices 204 */ 205 enum mod_nor_command_idx { 206 MOD_NOR_COMMAND_RESET_ENABLE = 0, 207 MOD_NOR_COMMAND_RESET_EXECUTE, 208 MOD_NOR_COMMAND_READ_ID, 209 MOD_NOR_COMMAND_READ_SFDP, 210 MOD_NOR_COMMAND_WRITE_ENABLE, 211 MOD_NOR_COMMAND_WRITE_DISABLE, 212 MOD_NOR_COMMAND_READ_STATUS, 213 MOD_NOR_COMMAND_WRITE_STATUS, 214 MOD_NOR_COMMAND_READ, 215 MOD_NOR_COMMAND_FAST_READ, 216 MOD_NOR_COMMAND_FAST_READ_1_1_2, 217 MOD_NOR_COMMAND_FAST_READ_1_2_2, 218 MOD_NOR_COMMAND_FAST_READ_1_1_4, 219 MOD_NOR_COMMAND_FAST_READ_1_4_4, 220 MOD_NOR_COMMAND_READ_4B, 221 MOD_NOR_COMMAND_FAST_READ_4B, 222 MOD_NOR_COMMAND_FAST_READ_1_1_2_4B, 223 MOD_NOR_COMMAND_FAST_READ_1_2_2_4B, 224 MOD_NOR_COMMAND_FAST_READ_1_1_4_4B, 225 MOD_NOR_COMMAND_FAST_READ_1_4_4_4B, 226 MOD_NOR_COMMAND_PROGRAM, 227 MOD_NOR_COMMAND_PROGRAM_1_1_2, 228 MOD_NOR_COMMAND_PROGRAM_1_2_2, 229 MOD_NOR_COMMAND_PROGRAM_1_1_4, 230 MOD_NOR_COMMAND_PROGRAM_1_4_4, 231 MOD_NOR_COMMAND_PROGRAM_4B, 232 MOD_NOR_COMMAND_PROGRAM_1_1_4_4B, 233 MOD_NOR_COMMAND_PROGRAM_1_4_4_4B, 234 MOD_NOR_COMMAND_ERASE_SECTOR_4KB, 235 MOD_NOR_COMMAND_ERASE_SECTOR_32KB, 236 MOD_NOR_COMMAND_ERASE_BLOCK, 237 MOD_NOR_COMMAND_ERASE_CHIP, 238 MOD_NOR_COMMAND_ERASE_SECTOR_4KB_4B, 239 MOD_NOR_COMMAND_ERASE_SECTOR_32KB_4B, 240 MOD_NOR_COMMAND_ERASE_BLOCK_4B, 241 242 MOD_NOR_COMMAND_COUNT 243 }; 244 245 /* 246 * \brief operation list of NOR device 247 */ 248 struct mod_nor_operation { 249 qspi_ope_func_t set_io_protocol; 250 qspi_ope_func_t set_4byte_addr_mode; 251 qspi_ope_func_t get_program_result; 252 qspi_ope_func_t get_erase_result; 253 }; 254 255 /*! 256 * \brief NOR device configuration data. 257 */ 258 struct mod_nor_dev_config { 259 fwk_id_t driver_id; 260 fwk_id_t api_id; 261 bool enable_reset_on_boot; 262 uint16_t program_page_size; 263 uint32_t erase_block_size; 264 struct qspi_command *command_table; 265 struct mod_nor_operation *operation; 266 }; 267 268 /*! 269 * \} 270 */ 271 272 /*! 273 * \} 274 */ 275 276 #endif /* MOD_NOR_H */ 277