1 /* SPDX-License-Identifier: ISC */
2 /* Copyright (C) 2020 MediaTek Inc. */
3
4 #ifndef __MT7915_H
5 #define __MT7915_H
6
7 #include <linux/interrupt.h>
8 #include <linux/ktime.h>
9 #include "../mt76_connac.h"
10 #include "regs.h"
11
12 #define MT7915_MAX_INTERFACES 19
13 #define MT7915_WTBL_SIZE 288
14 #define MT7916_WTBL_SIZE 544
15 #define MT7915_WTBL_RESERVED (mt7915_wtbl_size(dev) - 1)
16 #define MT7915_WTBL_STA (MT7915_WTBL_RESERVED - \
17 MT7915_MAX_INTERFACES)
18
19 #define MT7915_WATCHDOG_TIME (HZ / 10)
20 #define MT7915_RESET_TIMEOUT (30 * HZ)
21
22 #define MT7915_TX_RING_SIZE 2048
23 #define MT7915_TX_MCU_RING_SIZE 256
24 #define MT7915_TX_FWDL_RING_SIZE 128
25
26 #define MT7915_RX_RING_SIZE 1536
27 #define MT7915_RX_MCU_RING_SIZE 512
28
29 #define MT7915_FIRMWARE_WA "mediatek/mt7915_wa.bin"
30 #define MT7915_FIRMWARE_WM "mediatek/mt7915_wm.bin"
31 #define MT7915_ROM_PATCH "mediatek/mt7915_rom_patch.bin"
32
33 #define MT7916_FIRMWARE_WA "mediatek/mt7916_wa.bin"
34 #define MT7916_FIRMWARE_WM "mediatek/mt7916_wm.bin"
35 #define MT7916_ROM_PATCH "mediatek/mt7916_rom_patch.bin"
36
37 #define MT7986_FIRMWARE_WA "mediatek/mt7986_wa.bin"
38 #define MT7986_FIRMWARE_WM "mediatek/mt7986_wm.bin"
39 #define MT7986_FIRMWARE_WM_MT7975 "mediatek/mt7986_wm_mt7975.bin"
40 #define MT7986_ROM_PATCH "mediatek/mt7986_rom_patch.bin"
41 #define MT7986_ROM_PATCH_MT7975 "mediatek/mt7986_rom_patch_mt7975.bin"
42
43 #define MT7915_EEPROM_DEFAULT "mediatek/mt7915_eeprom.bin"
44 #define MT7915_EEPROM_DEFAULT_DBDC "mediatek/mt7915_eeprom_dbdc.bin"
45 #define MT7916_EEPROM_DEFAULT "mediatek/mt7916_eeprom.bin"
46 #define MT7986_EEPROM_MT7975_DEFAULT "mediatek/mt7986_eeprom_mt7975.bin"
47 #define MT7986_EEPROM_MT7975_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7975_dual.bin"
48 #define MT7986_EEPROM_MT7976_DEFAULT "mediatek/mt7986_eeprom_mt7976.bin"
49 #define MT7986_EEPROM_MT7976_DEFAULT_DBDC "mediatek/mt7986_eeprom_mt7976_dbdc.bin"
50 #define MT7986_EEPROM_MT7976_DUAL_DEFAULT "mediatek/mt7986_eeprom_mt7976_dual.bin"
51
52 #define MT7915_EEPROM_SIZE 3584
53 #define MT7916_EEPROM_SIZE 4096
54
55 #define MT7915_EEPROM_BLOCK_SIZE 16
56 #define MT7915_HW_TOKEN_SIZE 4096
57 #define MT7915_TOKEN_SIZE 8192
58
59 #define MT7915_CFEND_RATE_DEFAULT 0x49 /* OFDM 24M */
60 #define MT7915_CFEND_RATE_11B 0x03 /* 11B LP, 11M */
61
62 #define MT7915_THERMAL_THROTTLE_MAX 100
63 #define MT7915_CDEV_THROTTLE_MAX 99
64
65 #define MT7915_SKU_RATE_NUM 161
66
67 #define MT7915_MAX_TWT_AGRT 16
68 #define MT7915_MAX_STA_TWT_AGRT 8
69 #define MT7915_MIN_TWT_DUR 64
70 #define MT7915_MAX_QUEUE (MT_RXQ_BAND2 + __MT_MCUQ_MAX + 2)
71
72 #define MT7915_WED_RX_TOKEN_SIZE 12288
73
74 #define MT7915_CRIT_TEMP_IDX 0
75 #define MT7915_MAX_TEMP_IDX 1
76 #define MT7915_CRIT_TEMP 110
77 #define MT7915_MAX_TEMP 120
78
79 struct mt7915_vif;
80 struct mt7915_sta;
81 struct mt7915_dfs_pulse;
82 struct mt7915_dfs_pattern;
83
84 enum mt7915_txq_id {
85 MT7915_TXQ_FWDL = 16,
86 MT7915_TXQ_MCU_WM,
87 MT7915_TXQ_BAND0,
88 MT7915_TXQ_BAND1,
89 MT7915_TXQ_MCU_WA,
90 };
91
92 enum mt7915_rxq_id {
93 MT7915_RXQ_BAND0 = 0,
94 MT7915_RXQ_BAND1,
95 MT7915_RXQ_MCU_WM = 0,
96 MT7915_RXQ_MCU_WA,
97 MT7915_RXQ_MCU_WA_EXT,
98 };
99
100 enum mt7916_rxq_id {
101 MT7916_RXQ_MCU_WM = 0,
102 MT7916_RXQ_MCU_WA,
103 MT7916_RXQ_MCU_WA_MAIN,
104 MT7916_RXQ_MCU_WA_EXT,
105 MT7916_RXQ_BAND0,
106 MT7916_RXQ_BAND1,
107 };
108
109 struct mt7915_twt_flow {
110 struct list_head list;
111 u64 start_tsf;
112 u64 tsf;
113 u32 duration;
114 u16 wcid;
115 __le16 mantissa;
116 u8 exp;
117 u8 table_id;
118 u8 id;
119 u8 protection:1;
120 u8 flowtype:1;
121 u8 trigger:1;
122 u8 sched:1;
123 };
124
125 DECLARE_EWMA(avg_signal, 10, 8)
126
127 struct mt7915_sta {
128 struct mt76_wcid wcid; /* must be first */
129
130 struct mt7915_vif *vif;
131
132 struct list_head poll_list;
133 struct list_head rc_list;
134 u32 airtime_ac[8];
135
136 int ack_signal;
137 struct ewma_avg_signal avg_ack_signal;
138
139 unsigned long changed;
140 unsigned long jiffies;
141 unsigned long ampdu_state;
142 struct mt76_connac_sta_key_conf bip;
143
144 struct {
145 u8 flowid_mask;
146 struct mt7915_twt_flow flow[MT7915_MAX_STA_TWT_AGRT];
147 } twt;
148 };
149
150 struct mt7915_vif_cap {
151 bool ht_ldpc:1;
152 bool vht_ldpc:1;
153 bool he_ldpc:1;
154 bool vht_su_ebfer:1;
155 bool vht_su_ebfee:1;
156 bool vht_mu_ebfer:1;
157 bool vht_mu_ebfee:1;
158 bool he_su_ebfer:1;
159 bool he_su_ebfee:1;
160 bool he_mu_ebfer:1;
161 };
162
163 struct mt7915_vif {
164 struct mt76_vif mt76; /* must be first */
165
166 struct mt7915_vif_cap cap;
167 struct mt7915_sta sta;
168 struct mt7915_phy *phy;
169
170 struct ieee80211_tx_queue_params queue_params[IEEE80211_NUM_ACS];
171 struct cfg80211_bitrate_mask bitrate_mask;
172 };
173
174 /* per-phy stats. */
175 struct mib_stats {
176 u32 ack_fail_cnt;
177 u32 fcs_err_cnt;
178 u32 rts_cnt;
179 u32 rts_retries_cnt;
180 u32 ba_miss_cnt;
181 u32 tx_bf_cnt;
182 u32 tx_mu_mpdu_cnt;
183 u32 tx_mu_acked_mpdu_cnt;
184 u32 tx_su_acked_mpdu_cnt;
185 u32 tx_bf_ibf_ppdu_cnt;
186 u32 tx_bf_ebf_ppdu_cnt;
187
188 u32 tx_bf_rx_fb_all_cnt;
189 u32 tx_bf_rx_fb_he_cnt;
190 u32 tx_bf_rx_fb_vht_cnt;
191 u32 tx_bf_rx_fb_ht_cnt;
192
193 u32 tx_bf_rx_fb_bw; /* value of last sample, not cumulative */
194 u32 tx_bf_rx_fb_nc_cnt;
195 u32 tx_bf_rx_fb_nr_cnt;
196 u32 tx_bf_fb_cpl_cnt;
197 u32 tx_bf_fb_trig_cnt;
198
199 u32 tx_ampdu_cnt;
200 u32 tx_stop_q_empty_cnt;
201 u32 tx_mpdu_attempts_cnt;
202 u32 tx_mpdu_success_cnt;
203 u32 tx_pkt_ebf_cnt;
204 u32 tx_pkt_ibf_cnt;
205
206 u32 tx_rwp_fail_cnt;
207 u32 tx_rwp_need_cnt;
208
209 /* rx stats */
210 u32 rx_fifo_full_cnt;
211 u32 channel_idle_cnt;
212 u32 primary_cca_busy_time;
213 u32 secondary_cca_busy_time;
214 u32 primary_energy_detect_time;
215 u32 cck_mdrdy_time;
216 u32 ofdm_mdrdy_time;
217 u32 green_mdrdy_time;
218 u32 rx_vector_mismatch_cnt;
219 u32 rx_delimiter_fail_cnt;
220 u32 rx_mrdy_cnt;
221 u32 rx_len_mismatch_cnt;
222 u32 rx_mpdu_cnt;
223 u32 rx_ampdu_cnt;
224 u32 rx_ampdu_bytes_cnt;
225 u32 rx_ampdu_valid_subframe_cnt;
226 u32 rx_ampdu_valid_subframe_bytes_cnt;
227 u32 rx_pfdrop_cnt;
228 u32 rx_vec_queue_overflow_drop_cnt;
229 u32 rx_ba_cnt;
230
231 u32 tx_amsdu[8];
232 u32 tx_amsdu_cnt;
233 };
234
235 /* crash-dump */
236 struct mt7915_crash_data {
237 guid_t guid;
238 struct timespec64 timestamp;
239
240 u8 *memdump_buf;
241 size_t memdump_buf_len;
242 };
243
244 struct mt7915_hif {
245 struct list_head list;
246
247 struct device *dev;
248 void __iomem *regs;
249 int irq;
250 };
251
252 struct mt7915_phy {
253 struct mt76_phy *mt76;
254 struct mt7915_dev *dev;
255
256 struct ieee80211_sband_iftype_data iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
257
258 struct ieee80211_vif *monitor_vif;
259
260 struct thermal_cooling_device *cdev;
261 u8 cdev_state;
262 u8 throttle_state;
263 u32 throttle_temp[2]; /* 0: critical high, 1: maximum */
264
265 u32 rxfilter;
266 u64 omac_mask;
267
268 u16 noise;
269
270 s16 coverage_class;
271 u8 slottime;
272
273 u8 rdd_state;
274
275 u32 trb_ts;
276
277 u32 rx_ampdu_ts;
278 u32 ampdu_ref;
279
280 struct mib_stats mib;
281 struct mt76_channel_state state_ts;
282
283 #ifdef CONFIG_NL80211_TESTMODE
284 struct {
285 u32 *reg_backup;
286
287 s32 last_freq_offset;
288 u8 last_rcpi[4];
289 s8 last_ib_rssi[4];
290 s8 last_wb_rssi[4];
291 u8 last_snr;
292
293 u8 spe_idx;
294 } test;
295 #endif
296 };
297
298 struct mt7915_dev {
299 union { /* must be first */
300 struct mt76_dev mt76;
301 struct mt76_phy mphy;
302 };
303
304 struct mt7915_hif *hif2;
305 struct mt7915_reg_desc reg;
306 u8 q_id[MT7915_MAX_QUEUE];
307 u32 q_int_mask[MT7915_MAX_QUEUE];
308 u32 wfdma_mask;
309
310 const struct mt76_bus_ops *bus_ops;
311 struct tasklet_struct irq_tasklet;
312 struct mt7915_phy phy;
313
314 /* monitor rx chain configured channel */
315 struct cfg80211_chan_def rdd2_chandef;
316 struct mt7915_phy *rdd2_phy;
317
318 u16 chainmask;
319 u16 chainshift;
320 u32 hif_idx;
321
322 struct work_struct init_work;
323 struct work_struct rc_work;
324 struct work_struct dump_work;
325 struct work_struct reset_work;
326 wait_queue_head_t reset_wait;
327
328 struct {
329 u32 state;
330 u32 wa_reset_count;
331 u32 wm_reset_count;
332 bool hw_full_reset:1;
333 bool hw_init_done:1;
334 bool restart:1;
335 } recovery;
336
337 /* protects coredump data */
338 struct mutex dump_mutex;
339 #ifdef CONFIG_DEV_COREDUMP
340 struct {
341 struct mt7915_crash_data *crash_data;
342 } coredump;
343 #endif
344
345 struct list_head sta_rc_list;
346 struct list_head sta_poll_list;
347 struct list_head twt_list;
348 spinlock_t sta_poll_lock;
349
350 u32 hw_pattern;
351
352 bool dbdc_support;
353 bool flash_mode;
354 bool muru_debug;
355 bool ibf;
356
357 struct dentry *debugfs_dir;
358 struct rchan *relay_fwlog;
359
360 void *cal;
361
362 struct {
363 u8 debug_wm;
364 u8 debug_wa;
365 u8 debug_bin;
366 } fw;
367
368 struct {
369 u16 table_mask;
370 u8 n_agrt;
371 } twt;
372
373 struct reset_control *rstc;
374 void __iomem *dcm;
375 void __iomem *sku;
376 };
377
378 enum {
379 WFDMA0 = 0x0,
380 WFDMA1,
381 WFDMA_EXT,
382 __MT_WFDMA_MAX,
383 };
384
385 enum {
386 MT_RX_SEL0,
387 MT_RX_SEL1,
388 MT_RX_SEL2, /* monitor chain */
389 };
390
391 enum mt7915_rdd_cmd {
392 RDD_STOP,
393 RDD_START,
394 RDD_DET_MODE,
395 RDD_RADAR_EMULATE,
396 RDD_START_TXQ = 20,
397 RDD_SET_WF_ANT = 30,
398 RDD_CAC_START = 50,
399 RDD_CAC_END,
400 RDD_NORMAL_START,
401 RDD_DISABLE_DFS_CAL,
402 RDD_PULSE_DBG,
403 RDD_READ_PULSE,
404 RDD_RESUME_BF,
405 RDD_IRQ_OFF,
406 };
407
408 static inline struct mt7915_phy *
mt7915_hw_phy(struct ieee80211_hw * hw)409 mt7915_hw_phy(struct ieee80211_hw *hw)
410 {
411 struct mt76_phy *phy = hw->priv;
412
413 return phy->priv;
414 }
415
416 static inline struct mt7915_dev *
mt7915_hw_dev(struct ieee80211_hw * hw)417 mt7915_hw_dev(struct ieee80211_hw *hw)
418 {
419 struct mt76_phy *phy = hw->priv;
420
421 return container_of(phy->dev, struct mt7915_dev, mt76);
422 }
423
424 static inline struct mt7915_phy *
mt7915_ext_phy(struct mt7915_dev * dev)425 mt7915_ext_phy(struct mt7915_dev *dev)
426 {
427 struct mt76_phy *phy = dev->mt76.phys[MT_BAND1];
428
429 if (!phy)
430 return NULL;
431
432 return phy->priv;
433 }
434
mt7915_check_adie(struct mt7915_dev * dev,bool sku)435 static inline u32 mt7915_check_adie(struct mt7915_dev *dev, bool sku)
436 {
437 u32 mask = sku ? MT_CONNINFRA_SKU_MASK : MT_ADIE_TYPE_MASK;
438
439 if (!is_mt7986(&dev->mt76))
440 return 0;
441
442 return mt76_rr(dev, MT_CONNINFRA_SKU_DEC_ADDR) & mask;
443 }
444
445 extern const struct ieee80211_ops mt7915_ops;
446 extern const struct mt76_testmode_ops mt7915_testmode_ops;
447 extern struct pci_driver mt7915_pci_driver;
448 extern struct pci_driver mt7915_hif_driver;
449 extern struct platform_driver mt7986_wmac_driver;
450
451 #ifdef CONFIG_MT7986_WMAC
452 int mt7986_wmac_enable(struct mt7915_dev *dev);
453 void mt7986_wmac_disable(struct mt7915_dev *dev);
454 #else
mt7986_wmac_enable(struct mt7915_dev * dev)455 static inline int mt7986_wmac_enable(struct mt7915_dev *dev)
456 {
457 return 0;
458 }
459
mt7986_wmac_disable(struct mt7915_dev * dev)460 static inline void mt7986_wmac_disable(struct mt7915_dev *dev)
461 {
462 }
463 #endif
464 struct mt7915_dev *mt7915_mmio_probe(struct device *pdev,
465 void __iomem *mem_base, u32 device_id);
466 void mt7915_wfsys_reset(struct mt7915_dev *dev);
467 irqreturn_t mt7915_irq_handler(int irq, void *dev_instance);
468 u64 __mt7915_get_tsf(struct ieee80211_hw *hw, struct mt7915_vif *mvif);
469 u32 mt7915_wed_init_buf(void *ptr, dma_addr_t phys, int token_id);
470
471 int mt7915_register_device(struct mt7915_dev *dev);
472 void mt7915_unregister_device(struct mt7915_dev *dev);
473 int mt7915_eeprom_init(struct mt7915_dev *dev);
474 void mt7915_eeprom_parse_hw_cap(struct mt7915_dev *dev,
475 struct mt7915_phy *phy);
476 int mt7915_eeprom_get_target_power(struct mt7915_dev *dev,
477 struct ieee80211_channel *chan,
478 u8 chain_idx);
479 s8 mt7915_eeprom_get_power_delta(struct mt7915_dev *dev, int band);
480 int mt7915_dma_init(struct mt7915_dev *dev, struct mt7915_phy *phy2);
481 void mt7915_dma_prefetch(struct mt7915_dev *dev);
482 void mt7915_dma_cleanup(struct mt7915_dev *dev);
483 int mt7915_dma_reset(struct mt7915_dev *dev, bool force);
484 int mt7915_txbf_init(struct mt7915_dev *dev);
485 void mt7915_init_txpower(struct mt7915_dev *dev,
486 struct ieee80211_supported_band *sband);
487 void mt7915_reset(struct mt7915_dev *dev);
488 int mt7915_run(struct ieee80211_hw *hw);
489 int mt7915_mcu_init(struct mt7915_dev *dev);
490 int mt7915_mcu_init_firmware(struct mt7915_dev *dev);
491 int mt7915_mcu_twt_agrt_update(struct mt7915_dev *dev,
492 struct mt7915_vif *mvif,
493 struct mt7915_twt_flow *flow,
494 int cmd);
495 int mt7915_mcu_add_dev_info(struct mt7915_phy *phy,
496 struct ieee80211_vif *vif, bool enable);
497 int mt7915_mcu_add_bss_info(struct mt7915_phy *phy,
498 struct ieee80211_vif *vif, int enable);
499 int mt7915_mcu_add_sta(struct mt7915_dev *dev, struct ieee80211_vif *vif,
500 struct ieee80211_sta *sta, bool enable);
501 int mt7915_mcu_add_tx_ba(struct mt7915_dev *dev,
502 struct ieee80211_ampdu_params *params,
503 bool add);
504 int mt7915_mcu_add_rx_ba(struct mt7915_dev *dev,
505 struct ieee80211_ampdu_params *params,
506 bool add);
507 int mt7915_mcu_update_bss_color(struct mt7915_dev *dev, struct ieee80211_vif *vif,
508 struct cfg80211_he_bss_color *he_bss_color);
509 int mt7915_mcu_add_beacon(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
510 int enable, u32 changed);
511 int mt7915_mcu_add_obss_spr(struct mt7915_phy *phy, struct ieee80211_vif *vif,
512 struct ieee80211_he_obss_pd *he_obss_pd);
513 int mt7915_mcu_add_rate_ctrl(struct mt7915_dev *dev, struct ieee80211_vif *vif,
514 struct ieee80211_sta *sta, bool changed);
515 int mt7915_mcu_add_smps(struct mt7915_dev *dev, struct ieee80211_vif *vif,
516 struct ieee80211_sta *sta);
517 int mt7915_set_channel(struct mt7915_phy *phy);
518 int mt7915_mcu_set_chan_info(struct mt7915_phy *phy, int cmd);
519 int mt7915_mcu_set_tx(struct mt7915_dev *dev, struct ieee80211_vif *vif);
520 int mt7915_mcu_update_edca(struct mt7915_dev *dev, void *req);
521 int mt7915_mcu_set_fixed_rate_ctrl(struct mt7915_dev *dev,
522 struct ieee80211_vif *vif,
523 struct ieee80211_sta *sta,
524 void *data, u32 field);
525 int mt7915_mcu_set_eeprom(struct mt7915_dev *dev);
526 int mt7915_mcu_get_eeprom(struct mt7915_dev *dev, u32 offset);
527 int mt7915_mcu_get_eeprom_free_block(struct mt7915_dev *dev, u8 *block_num);
528 int mt7915_mcu_set_mac(struct mt7915_dev *dev, int band, bool enable,
529 bool hdr_trans);
530 int mt7915_mcu_set_test_param(struct mt7915_dev *dev, u8 param, bool test_mode,
531 u8 en);
532 int mt7915_mcu_set_ser(struct mt7915_dev *dev, u8 action, u8 set, u8 band);
533 int mt7915_mcu_set_sku_en(struct mt7915_phy *phy, bool enable);
534 int mt7915_mcu_set_txpower_sku(struct mt7915_phy *phy);
535 int mt7915_mcu_get_txpower_sku(struct mt7915_phy *phy, s8 *txpower, int len);
536 int mt7915_mcu_set_txpower_frame_min(struct mt7915_phy *phy, s8 txpower);
537 int mt7915_mcu_set_txpower_frame(struct mt7915_phy *phy,
538 struct ieee80211_vif *vif,
539 struct ieee80211_sta *sta, s8 txpower);
540 int mt7915_mcu_set_txbf(struct mt7915_dev *dev, u8 action);
541 int mt7915_mcu_set_fcc5_lpn(struct mt7915_dev *dev, int val);
542 int mt7915_mcu_set_pulse_th(struct mt7915_dev *dev,
543 const struct mt7915_dfs_pulse *pulse);
544 int mt7915_mcu_set_radar_th(struct mt7915_dev *dev, int index,
545 const struct mt7915_dfs_pattern *pattern);
546 int mt7915_mcu_set_muru_ctrl(struct mt7915_dev *dev, u32 cmd, u32 val);
547 int mt7915_mcu_apply_group_cal(struct mt7915_dev *dev);
548 int mt7915_mcu_apply_tx_dpd(struct mt7915_phy *phy);
549 int mt7915_mcu_get_chan_mib_info(struct mt7915_phy *phy, bool chan_switch);
550 int mt7915_mcu_get_temperature(struct mt7915_phy *phy);
551 int mt7915_mcu_set_thermal_throttling(struct mt7915_phy *phy, u8 state);
552 int mt7915_mcu_set_thermal_protect(struct mt7915_phy *phy);
553 int mt7915_mcu_get_rx_rate(struct mt7915_phy *phy, struct ieee80211_vif *vif,
554 struct ieee80211_sta *sta, struct rate_info *rate);
555 int mt7915_mcu_rdd_background_enable(struct mt7915_phy *phy,
556 struct cfg80211_chan_def *chandef);
557 int mt7915_mcu_rf_regval(struct mt7915_dev *dev, u32 regidx, u32 *val, bool set);
558 int mt7915_mcu_wa_cmd(struct mt7915_dev *dev, int cmd, u32 a1, u32 a2, u32 a3);
559 int mt7915_mcu_fw_log_2_host(struct mt7915_dev *dev, u8 type, u8 ctrl);
560 int mt7915_mcu_fw_dbg_ctrl(struct mt7915_dev *dev, u32 module, u8 level);
561 void mt7915_mcu_rx_event(struct mt7915_dev *dev, struct sk_buff *skb);
562 void mt7915_mcu_exit(struct mt7915_dev *dev);
563
mt7915_wtbl_size(struct mt7915_dev * dev)564 static inline u16 mt7915_wtbl_size(struct mt7915_dev *dev)
565 {
566 return is_mt7915(&dev->mt76) ? MT7915_WTBL_SIZE : MT7916_WTBL_SIZE;
567 }
568
mt7915_eeprom_size(struct mt7915_dev * dev)569 static inline u16 mt7915_eeprom_size(struct mt7915_dev *dev)
570 {
571 return is_mt7915(&dev->mt76) ? MT7915_EEPROM_SIZE : MT7916_EEPROM_SIZE;
572 }
573
574 void mt7915_dual_hif_set_irq_mask(struct mt7915_dev *dev, bool write_reg,
575 u32 clear, u32 set);
576
mt7915_irq_enable(struct mt7915_dev * dev,u32 mask)577 static inline void mt7915_irq_enable(struct mt7915_dev *dev, u32 mask)
578 {
579 if (dev->hif2)
580 mt7915_dual_hif_set_irq_mask(dev, false, 0, mask);
581 else
582 mt76_set_irq_mask(&dev->mt76, 0, 0, mask);
583
584 tasklet_schedule(&dev->irq_tasklet);
585 }
586
mt7915_irq_disable(struct mt7915_dev * dev,u32 mask)587 static inline void mt7915_irq_disable(struct mt7915_dev *dev, u32 mask)
588 {
589 if (dev->hif2)
590 mt7915_dual_hif_set_irq_mask(dev, true, mask, 0);
591 else
592 mt76_set_irq_mask(&dev->mt76, MT_INT_MASK_CSR, mask, 0);
593 }
594
595 void mt7915_memcpy_fromio(struct mt7915_dev *dev, void *buf, u32 offset,
596 size_t len);
597
598 void mt7915_mac_init(struct mt7915_dev *dev);
599 u32 mt7915_mac_wtbl_lmac_addr(struct mt7915_dev *dev, u16 wcid, u8 dw);
600 bool mt7915_mac_wtbl_update(struct mt7915_dev *dev, int idx, u32 mask);
601 void mt7915_mac_reset_counters(struct mt7915_phy *phy);
602 void mt7915_mac_cca_stats_reset(struct mt7915_phy *phy);
603 void mt7915_mac_enable_nf(struct mt7915_dev *dev, bool ext_phy);
604 void mt7915_mac_enable_rtscts(struct mt7915_dev *dev,
605 struct ieee80211_vif *vif, bool enable);
606 void mt7915_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi,
607 struct sk_buff *skb, struct mt76_wcid *wcid, int pid,
608 struct ieee80211_key_conf *key,
609 enum mt76_txq_id qid, u32 changed);
610 void mt7915_mac_set_timing(struct mt7915_phy *phy);
611 int mt7915_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
612 struct ieee80211_sta *sta);
613 void mt7915_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
614 struct ieee80211_sta *sta);
615 void mt7915_mac_work(struct work_struct *work);
616 void mt7915_mac_reset_work(struct work_struct *work);
617 void mt7915_mac_dump_work(struct work_struct *work);
618 void mt7915_mac_sta_rc_work(struct work_struct *work);
619 void mt7915_mac_update_stats(struct mt7915_phy *phy);
620 void mt7915_mac_twt_teardown_flow(struct mt7915_dev *dev,
621 struct mt7915_sta *msta,
622 u8 flowid);
623 void mt7915_mac_add_twt_setup(struct ieee80211_hw *hw,
624 struct ieee80211_sta *sta,
625 struct ieee80211_twt_setup *twt);
626 int mt7915_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
627 enum mt76_txq_id qid, struct mt76_wcid *wcid,
628 struct ieee80211_sta *sta,
629 struct mt76_tx_info *tx_info);
630 void mt7915_tx_token_put(struct mt7915_dev *dev);
631 void mt7915_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
632 struct sk_buff *skb, u32 *info);
633 bool mt7915_rx_check(struct mt76_dev *mdev, void *data, int len);
634 void mt7915_sta_ps(struct mt76_dev *mdev, struct ieee80211_sta *sta, bool ps);
635 void mt7915_stats_work(struct work_struct *work);
636 int mt76_dfs_start_rdd(struct mt7915_dev *dev, bool force);
637 int mt7915_dfs_init_radar_detector(struct mt7915_phy *phy);
638 void mt7915_set_stream_he_caps(struct mt7915_phy *phy);
639 void mt7915_set_stream_vht_txbf_caps(struct mt7915_phy *phy);
640 void mt7915_update_channel(struct mt76_phy *mphy);
641 int mt7915_mcu_muru_debug_set(struct mt7915_dev *dev, bool enable);
642 int mt7915_mcu_muru_debug_get(struct mt7915_phy *phy, void *ms);
643 int mt7915_mcu_wed_enable_rx_stats(struct mt7915_dev *dev);
644 int mt7915_init_debugfs(struct mt7915_phy *phy);
645 void mt7915_debugfs_rx_fw_monitor(struct mt7915_dev *dev, const void *data, int len);
646 bool mt7915_debugfs_rx_log(struct mt7915_dev *dev, const void *data, int len);
647 #ifdef CONFIG_MAC80211_DEBUGFS
648 void mt7915_sta_add_debugfs(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
649 struct ieee80211_sta *sta, struct dentry *dir);
650 #endif
651 int mt7915_mmio_wed_init(struct mt7915_dev *dev, void *pdev_ptr,
652 bool pci, int *irq);
653
654 #endif
655