1 /* SPDX-License-Identifier: ISC */
2 /*
3 * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
4 */
5
6 #ifndef __MT76x02_DMA_H
7 #define __MT76x02_DMA_H
8
9 #include "mt76x02.h"
10 #include "dma.h"
11
12 #define MT_TXD_INFO_LEN GENMASK(15, 0)
13 #define MT_TXD_INFO_NEXT_VLD BIT(16)
14 #define MT_TXD_INFO_TX_BURST BIT(17)
15 #define MT_TXD_INFO_80211 BIT(19)
16 #define MT_TXD_INFO_TSO BIT(20)
17 #define MT_TXD_INFO_CSO BIT(21)
18 #define MT_TXD_INFO_WIV BIT(24)
19 #define MT_TXD_INFO_QSEL GENMASK(26, 25)
20 #define MT_TXD_INFO_DPORT GENMASK(29, 27)
21 #define MT_TXD_INFO_TYPE GENMASK(31, 30)
22
23 #define MT_RX_FCE_INFO_LEN GENMASK(13, 0)
24 #define MT_RX_FCE_INFO_SELF_GEN BIT(15)
25 #define MT_RX_FCE_INFO_CMD_SEQ GENMASK(19, 16)
26 #define MT_RX_FCE_INFO_EVT_TYPE GENMASK(23, 20)
27 #define MT_RX_FCE_INFO_PCIE_INTR BIT(24)
28 #define MT_RX_FCE_INFO_QSEL GENMASK(26, 25)
29 #define MT_RX_FCE_INFO_D_PORT GENMASK(29, 27)
30 #define MT_RX_FCE_INFO_TYPE GENMASK(31, 30)
31
32 /* MCU request message header */
33 #define MT_MCU_MSG_LEN GENMASK(15, 0)
34 #define MT_MCU_MSG_CMD_SEQ GENMASK(19, 16)
35 #define MT_MCU_MSG_CMD_TYPE GENMASK(26, 20)
36 #define MT_MCU_MSG_PORT GENMASK(29, 27)
37 #define MT_MCU_MSG_TYPE GENMASK(31, 30)
38 #define MT_MCU_MSG_TYPE_CMD BIT(30)
39
40 #define MT_RX_HEADROOM 32
41 #define MT76X02_RX_RING_SIZE 256
42
43 enum dma_msg_port {
44 WLAN_PORT,
45 CPU_RX_PORT,
46 CPU_TX_PORT,
47 HOST_PORT,
48 VIRTUAL_CPU_RX_PORT,
49 VIRTUAL_CPU_TX_PORT,
50 DISCARD,
51 };
52
53 static inline bool
mt76x02_wait_for_wpdma(struct mt76_dev * dev,int timeout)54 mt76x02_wait_for_wpdma(struct mt76_dev *dev, int timeout)
55 {
56 return __mt76_poll(dev, MT_WPDMA_GLO_CFG,
57 MT_WPDMA_GLO_CFG_TX_DMA_BUSY |
58 MT_WPDMA_GLO_CFG_RX_DMA_BUSY,
59 0, timeout);
60 }
61
62 int mt76x02_dma_init(struct mt76x02_dev *dev);
63 void mt76x02_dma_disable(struct mt76x02_dev *dev);
64
65 #endif /* __MT76x02_DMA_H */
66