1 /** 2 ****************************************************************************** 3 * @file stm32f7xx_hal_nand.h 4 * @author MCD Application Team 5 * @version V1.0.1 6 * @date 25-June-2015 7 * @brief Header file of NAND HAL module. 8 ****************************************************************************** 9 * @attention 10 * 11 * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> 12 * 13 * Redistribution and use in source and binary forms, with or without modification, 14 * are permitted provided that the following conditions are met: 15 * 1. Redistributions of source code must retain the above copyright notice, 16 * this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright notice, 18 * this list of conditions and the following disclaimer in the documentation 19 * and/or other materials provided with the distribution. 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 34 * 35 ****************************************************************************** 36 */ 37 38 /* Define to prevent recursive inclusion -------------------------------------*/ 39 #ifndef __STM32F7xx_HAL_NAND_H 40 #define __STM32F7xx_HAL_NAND_H 41 42 #ifdef __cplusplus 43 extern "C" { 44 #endif 45 46 /* Includes ------------------------------------------------------------------*/ 47 #include "stm32f7xx_ll_fmc.h" 48 49 /** @addtogroup STM32F7xx_HAL_Driver 50 * @{ 51 */ 52 53 /** @addtogroup NAND 54 * @{ 55 */ 56 57 /* Exported typedef ----------------------------------------------------------*/ 58 /* Exported types ------------------------------------------------------------*/ 59 /** @defgroup NAND_Exported_Types NAND Exported Types 60 * @{ 61 */ 62 63 /** 64 * @brief HAL NAND State structures definition 65 */ 66 typedef enum { 67 HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */ 68 HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */ 69 HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */ 70 HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */ 71 } HAL_NAND_StateTypeDef; 72 73 /** 74 * @brief NAND Memory electronic signature Structure definition 75 */ 76 typedef struct { 77 /*<! NAND memory electronic signature maker and device IDs */ 78 79 uint8_t Maker_Id; 80 81 uint8_t Device_Id; 82 83 uint8_t Third_Id; 84 85 uint8_t Fourth_Id; 86 } NAND_IDTypeDef; 87 88 /** 89 * @brief NAND Memory address Structure definition 90 */ 91 typedef struct { 92 uint16_t Page; /*!< NAND memory Page address */ 93 94 uint16_t Zone; /*!< NAND memory Zone address */ 95 96 uint16_t Block; /*!< NAND memory Block address */ 97 98 } NAND_AddressTypeDef; 99 100 /** 101 * @brief NAND Memory info Structure definition 102 */ 103 typedef struct { 104 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */ 105 106 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */ 107 108 uint32_t BlockSize; /*!< NAND memory block size number of pages */ 109 110 uint32_t BlockNbr; /*!< NAND memory number of blocks */ 111 112 uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */ 113 } NAND_InfoTypeDef; 114 115 /** 116 * @brief NAND handle Structure definition 117 */ 118 typedef struct { 119 FMC_NAND_TypeDef *Instance; /*!< Register base address */ 120 121 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */ 122 123 HAL_LockTypeDef Lock; /*!< NAND locking object */ 124 125 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */ 126 127 NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */ 128 } NAND_HandleTypeDef; 129 /** 130 * @} 131 */ 132 133 /* Exported constants --------------------------------------------------------*/ 134 /* Exported macro ------------------------------------------------------------*/ 135 /** @defgroup NAND_Exported_Macros NAND Exported Macros 136 * @{ 137 */ 138 139 /** @brief Reset NAND handle state 140 * @param __HANDLE__: specifies the NAND handle. 141 * @retval None 142 */ 143 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) 144 145 /** 146 * @} 147 */ 148 149 /* Exported functions --------------------------------------------------------*/ 150 /** @addtogroup NAND_Exported_Functions NAND Exported Functions 151 * @{ 152 */ 153 154 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions 155 * @{ 156 */ 157 158 /* Initialization/de-initialization functions ********************************/ 159 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); 160 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); 161 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand); 162 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand); 163 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand); 164 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand); 165 166 /** 167 * @} 168 */ 169 170 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions 171 * @{ 172 */ 173 174 /* IO operation functions ****************************************************/ 175 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); 176 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand); 177 HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead); 178 HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite); 179 HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead); 180 HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite); 181 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); 182 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); 183 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); 184 185 /** 186 * @} 187 */ 188 189 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions 190 * @{ 191 */ 192 193 /* NAND Control functions ****************************************************/ 194 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand); 195 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand); 196 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout); 197 198 /** 199 * @} 200 */ 201 202 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions 203 * @{ 204 */ 205 /* NAND State functions *******************************************************/ 206 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand); 207 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); 208 /** 209 * @} 210 */ 211 212 /** 213 * @} 214 */ 215 /* Private types -------------------------------------------------------------*/ 216 /* Private variables ---------------------------------------------------------*/ 217 /* Private constants ---------------------------------------------------------*/ 218 /** @defgroup NAND_Private_Constants NAND Private Constants 219 * @{ 220 */ 221 #define NAND_DEVICE ((uint32_t)0x80000000) 222 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000) 223 224 #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ 225 #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ 226 227 #define NAND_CMD_AREA_A ((uint8_t)0x00) 228 #define NAND_CMD_AREA_B ((uint8_t)0x01) 229 #define NAND_CMD_AREA_C ((uint8_t)0x50) 230 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) 231 232 #define NAND_CMD_WRITE0 ((uint8_t)0x80) 233 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) 234 #define NAND_CMD_ERASE0 ((uint8_t)0x60) 235 #define NAND_CMD_ERASE1 ((uint8_t)0xD0) 236 #define NAND_CMD_READID ((uint8_t)0x90) 237 #define NAND_CMD_STATUS ((uint8_t)0x70) 238 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) 239 #define NAND_CMD_RESET ((uint8_t)0xFF) 240 241 /* NAND memory status */ 242 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100) 243 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200) 244 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400) 245 #define NAND_BUSY ((uint32_t)0x00000000) 246 #define NAND_ERROR ((uint32_t)0x00000001) 247 #define NAND_READY ((uint32_t)0x00000040) 248 /** 249 * @} 250 */ 251 252 /* Private macros ------------------------------------------------------------*/ 253 /** @defgroup NAND_Private_Macros NAND Private Macros 254 * @{ 255 */ 256 257 /** 258 * @brief NAND memory address computation. 259 * @param __ADDRESS__: NAND memory address. 260 * @param __HANDLE__ : NAND handle. 261 * @retval NAND Raw address value 262 */ 263 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \ 264 (((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize))) 265 266 /** 267 * @brief NAND memory address cycling. 268 * @param __ADDRESS__: NAND memory address. 269 * @retval NAND address cycling value. 270 */ 271 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */ 272 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ 273 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */ 274 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ 275 /** 276 * @} 277 */ 278 279 /** 280 * @} 281 */ 282 /** 283 * @} 284 */ 285 286 /** 287 * @} 288 */ 289 290 #ifdef __cplusplus 291 } 292 #endif 293 294 #endif /* __STM32F7xx_HAL_NAND_H */ 295 296 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 297