1 /*
2 * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this
9 * list of conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its
16 * contributors may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #ifndef NRF_CLOCK_H__
33 #define NRF_CLOCK_H__
34
35 #include <nrfx.h>
36
37 #ifdef __cplusplus
38 extern "C" {
39 #endif
40
41 /**
42 * @defgroup nrf_clock_hal Clock HAL
43 * @{
44 * @ingroup nrf_clock
45 * @brief Hardware access layer for managing the CLOCK peripheral.
46 *
47 * This code can be used to manage low-frequency clock (LFCLK), high-frequency clock (HFCLK),
48 * high-frequency 192 MHz clock (HFCLK192M) and high-frequency audio clock (HFCLKAUDIO)
49 * settings.
50 */
51
52 #if defined(CLOCK_LFCLKSRC_BYPASS_Msk) && defined(CLOCK_LFCLKSRC_EXTERNAL_Msk)
53 // Enable support for external LFCLK sources. Read more in the Product Specification.
54 #define NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES
55 #endif
56
57 #if defined(CLOCK_INTENSET_DONE_Msk) || defined(__NRFX_DOXYGEN__)
58 /** @brief Presence of the Low Frequency Clock calibration. */
59 #define NRF_CLOCK_HAS_CALIBRATION 1
60 #else
61 #define NRF_CLOCK_HAS_CALIBRATION 0
62 #endif
63
64 #if defined(CLOCK_CTIV_CTIV_Msk) || defined(__NRFX_DOXYGEN__)
65 /** @brief Presence of the Low Frequency Clock calibration timer. */
66 #define NRF_CLOCK_HAS_CALIBRATION_TIMER 1
67 #else
68 #define NRF_CLOCK_HAS_CALIBRATION_TIMER 0
69 #endif
70
71 #if (defined(CLOCK_INTENSET_HFCLK192MSTARTED_Msk) && !defined(NRF5340_XXAA_NETWORK)) \
72 || defined(__NRFX_DOXYGEN__)
73 /** @brief Presence of the 192 MHz clock. */
74 #define NRF_CLOCK_HAS_HFCLK192M 1
75 #else
76 #define NRF_CLOCK_HAS_HFCLK192M 0
77 #endif
78
79 #if (defined(CLOCK_INTENSET_HFCLKAUDIOSTARTED_Msk) && !defined(NRF5340_XXAA_NETWORK)) \
80 || defined(__NRFX_DOXYGEN__)
81 /** @brief Presence of the Audio clock. */
82 #define NRF_CLOCK_HAS_HFCLKAUDIO 1
83 #else
84 #define NRF_CLOCK_HAS_HFCLKAUDIO 0
85 #endif
86
87 #if (defined(CLOCK_HFCLKCTRL_HCLK_Msk) && !defined(NRF5340_XXAA_NETWORK)) \
88 || defined(__NRFX_DOXYGEN__)
89 /** @brief Presence of HFCLK frequency configuration. */
90 #define NRF_CLOCK_HAS_HFCLK_DIV 1
91 #else
92 #define NRF_CLOCK_HAS_HFCLK_DIV 0
93 #endif
94
95 #if defined(CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk) || defined(__NRFX_DOXYGEN__)
96 /** @brief Presence of ALWAYSRUN registers. */
97 #define NRF_CLOCK_HAS_ALWAYSRUN 1
98 #else
99 #define NRF_CLOCK_HAS_ALWAYSRUN 0
100 #endif
101
102 #if defined(CLOCK_HFCLKSRC_SRC_Msk) || defined(__NRFX_DOXYGEN__)
103 /** @brief Presence of HFCLKSRC register. */
104 #define NRF_CLOCK_HAS_HFCLKSRC 1
105 #else
106 #define NRF_CLOCK_HAS_HFCLKSRC 0
107 #endif
108
109 /**
110 * @brief Low-frequency clock sources.
111 * @details Used by LFCLKSRC, LFCLKSTAT, and LFCLKSRCCOPY registers.
112 */
113 typedef enum
114 {
115 #if defined(CLOCK_LFCLKSRC_SRC_LFULP) || defined(__NRFX_DOXYGEN__)
116 NRF_CLOCK_LFCLK_LFULP = CLOCK_LFCLKSRC_SRC_LFULP, /**< Internal 32 kHz Ultra-low power oscillator. */
117 #endif
118
119 #if defined(CLOCK_LFCLKSRC_SRC_RC) || defined(__NRFX_DOXYGEN__)
120 NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_RC, /**< Internal 32 kHz RC oscillator. */
121 #else
122 NRF_CLOCK_LFCLK_RC = CLOCK_LFCLKSRC_SRC_LFRC, /**< Internal 32 kHz RC oscillator. */
123 #endif
124
125 #if defined(CLOCK_LFCLKSRC_SRC_Xtal) || defined(__NRFX_DOXYGEN__)
126 NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_Xtal, /**< External 32 kHz crystal. */
127 #else
128 NRF_CLOCK_LFCLK_Xtal = CLOCK_LFCLKSRC_SRC_LFXO, /**< External 32 kHz crystal. */
129 #endif
130
131 #if defined(CLOCK_LFCLKSRC_SRC_Synth) || defined(__NRFX_DOXYGEN__)
132 NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_Synth, /**< Internal 32 kHz synthesized from HFCLK system clock. */
133 #elif defined(CLOCK_LFCLKSRC_SRC_LFSYNT)
134 NRF_CLOCK_LFCLK_Synth = CLOCK_LFCLKSRC_SRC_LFSYNT, /**< Internal 32 kHz synthesized from HFCLK system clock. */
135 #endif
136
137 #if defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
138 /**
139 * External 32 kHz low swing signal. Used only with the LFCLKSRC register.
140 * For the others @ref NRF_CLOCK_LFCLK_Xtal is returned for this setting.
141 */
142 NRF_CLOCK_LFCLK_Xtal_Low_Swing = (CLOCK_LFCLKSRC_SRC_Xtal |
143 (CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos)),
144 /**
145 * External 32 kHz full swing signal. Used only with the LFCLKSRC register.
146 * For the others @ref NRF_CLOCK_LFCLK_Xtal is returned for this setting.
147 */
148 NRF_CLOCK_LFCLK_Xtal_Full_Swing = (CLOCK_LFCLKSRC_SRC_Xtal |
149 (CLOCK_LFCLKSRC_BYPASS_Enabled << CLOCK_LFCLKSRC_BYPASS_Pos) |
150 (CLOCK_LFCLKSRC_EXTERNAL_Enabled << CLOCK_LFCLKSRC_EXTERNAL_Pos)),
151 #endif // defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
152 } nrf_clock_lfclk_t;
153
154 /**
155 * @brief High-frequency clock sources.
156 * @details Used by HFCLKSTAT and HFCLK192MSTAT registers.
157 */
158 typedef enum
159 {
160 #if defined(CLOCK_HFCLKSTAT_SRC_RC) || defined(__NRFX_DOXYGEN__)
161 NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_RC, /**< Internal 16 MHz RC oscillator. */
162 #elif defined(CLOCK_HFCLKSTAT_SRC_HFINT)
163 NRF_CLOCK_HFCLK_LOW_ACCURACY = CLOCK_HFCLKSTAT_SRC_HFINT, /**< Internal 16 MHz RC oscillator. */
164 #endif
165 #if defined(CLOCK_HFCLKSTAT_SRC_Xtal) || defined(__NRFX_DOXYGEN__)
166 NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_Xtal /**< External 16 MHz/32 MHz crystal oscillator. */
167 #else
168 NRF_CLOCK_HFCLK_HIGH_ACCURACY = CLOCK_HFCLKSTAT_SRC_HFXO /**< External 32 MHz crystal oscillator. */
169 #endif
170 } nrf_clock_hfclk_t;
171
172 /** @brief Clock domains. */
173 typedef enum
174 {
175 NRF_CLOCK_DOMAIN_LFCLK,
176 NRF_CLOCK_DOMAIN_HFCLK,
177 #if NRF_CLOCK_HAS_HFCLK192M
178 NRF_CLOCK_DOMAIN_HFCLK192M,
179 #endif
180 #if NRF_CLOCK_HAS_HFCLKAUDIO
181 NRF_CLOCK_DOMAIN_HFCLKAUDIO,
182 #endif
183 } nrf_clock_domain_t;
184
185 #if NRF_CLOCK_HAS_HFCLK_DIV || NRF_CLOCK_HAS_HFCLK192M
186 /**
187 * @brief High-frequency clock frequency configuration.
188 * @details Used by HFCLKCTRL and HFCLK192MCTRL registers.
189 */
190 typedef enum
191 {
192 NRF_CLOCK_HFCLK_DIV_1 = CLOCK_HFCLKCTRL_HCLK_Div1, /**< Divide HFCLK/HFCLK192M by 1 */
193 NRF_CLOCK_HFCLK_DIV_2 = CLOCK_HFCLKCTRL_HCLK_Div2, /**< Divide HFCLK/HFCLK192M by 2 */
194 #if NRF_CLOCK_HAS_HFCLK192M
195 NRF_CLOCK_HFCLK_DIV_4 = CLOCK_HFCLK192MCTRL_HCLK192M_Div4, /**< Divide HFCLK192M by 4 */
196 #endif
197 } nrf_clock_hfclk_div_t;
198 #endif // NRF_CLOCK_HAS_HFCLK_DIV || NRF_CLOCK_HAS_HFCLK192M
199
200 /**
201 * @brief Trigger status of task LFCLKSTART/HFCLKSTART.
202 *
203 * @note This enum is deprecated.
204 *
205 * @details Used by LFCLKRUN and HFCLKRUN registers.
206 */
207 typedef enum
208 {
209 NRF_CLOCK_START_TASK_NOT_TRIGGERED = CLOCK_LFCLKRUN_STATUS_NotTriggered, /**< Task LFCLKSTART/HFCLKSTART has not been triggered. */
210 NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
211 } nrf_clock_start_task_status_t;
212
213 /** @brief Interrupts. */
214 typedef enum
215 {
216 NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
217 NRF_CLOCK_INT_LF_STARTED_MASK = CLOCK_INTENSET_LFCLKSTARTED_Msk, /**< Interrupt on LFCLKSTARTED event. */
218 #if NRF_CLOCK_HAS_CALIBRATION
219 NRF_CLOCK_INT_DONE_MASK = CLOCK_INTENSET_DONE_Msk, /**< Interrupt on DONE event. */
220 #endif
221 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
222 NRF_CLOCK_INT_CTTO_MASK = CLOCK_INTENSET_CTTO_Msk, /**< Interrupt on CTTO event. */
223 #endif
224 #if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
225 NRF_CLOCK_INT_CTSTARTED_MASK = CLOCK_INTENSET_CTSTARTED_Msk, /**< Interrupt on CTSTARTED event. */
226 NRF_CLOCK_INT_CTSTOPPED_MASK = CLOCK_INTENSET_CTSTOPPED_Msk /**< Interrupt on CTSTOPPED event. */
227 #endif
228 #if NRF_CLOCK_HAS_HFCLKAUDIO
229 NRF_CLOCK_INT_HFAUDIO_STARTED_MASK = CLOCK_INTENSET_HFCLKAUDIOSTARTED_Msk, /**< Interrupt on HFCLKAUDIOSTARTED event. */
230 #endif
231
232 #if NRF_CLOCK_HAS_HFCLK192M
233 NRF_CLOCK_INT_HF192M_STARTED_MASK = CLOCK_INTENSET_HFCLK192MSTARTED_Msk, /**< Interrupt on HFCLK192MSTARTED event. */
234 #endif
235 } nrf_clock_int_mask_t;
236
237 /**
238 * @brief Tasks.
239 *
240 * @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
241 * The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
242 */
243 typedef enum
244 {
245 NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source. */
246 NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source. */
247 NRF_CLOCK_TASK_LFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTART), /**< Start LFCLK clock source. */
248 NRF_CLOCK_TASK_LFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_LFCLKSTOP), /**< Stop LFCLK clock source. */
249 #if NRF_CLOCK_HAS_CALIBRATION
250 NRF_CLOCK_TASK_CAL = offsetof(NRF_CLOCK_Type, TASKS_CAL), /**< Start calibration of LFCLK RC oscillator. */
251 #endif
252 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
253 NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer. */
254 NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer. */
255 #endif
256 #if NRF_CLOCK_HAS_HFCLKAUDIO
257 NRF_CLOCK_TASK_HFCLKAUDIOSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKAUDIOSTART), /**< Start HFCLKAUDIO clock source. */
258 NRF_CLOCK_TASK_HFCLKAUDIOSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKAUDIOSTOP), /**< Stop HFCLKAUDIO clock source. */
259 #endif
260 #if NRF_CLOCK_HAS_HFCLK192M
261 NRF_CLOCK_TASK_HFCLK192MSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLK192MSTART), /**< Start HFCLK192M clock source. */
262 NRF_CLOCK_TASK_HFCLK192MSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLK192MSTOP), /**< Stop HFCLK192M clock source. */
263 #endif
264 } nrf_clock_task_t;
265
266 /** @brief Events. */
267 typedef enum
268 {
269 NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started. */
270 NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started. */
271 #if NRF_CLOCK_HAS_CALIBRATION
272 NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed. */
273 #endif
274 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
275 NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO), /**< Calibration timer time-out. */
276 #endif
277 #if defined(CLOCK_INTENSET_CTSTARTED_Msk) || defined(__NRFX_DOXYGEN__)
278 NRF_CLOCK_EVENT_CTSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTARTED), /**< Calibration timer started. */
279 NRF_CLOCK_EVENT_CTSTOPPED = offsetof(NRF_CLOCK_Type, EVENTS_CTSTOPPED) /**< Calibration timer stopped. */
280 #endif
281 #if NRF_CLOCK_HAS_HFCLKAUDIO
282 NRF_CLOCK_EVENT_HFCLKAUDIOSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKAUDIOSTARTED), /**< HFCLKAUDIO oscillator started. */
283 #endif
284 #if NRF_CLOCK_HAS_HFCLK192M
285 NRF_CLOCK_EVENT_HFCLK192MSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLK192MSTARTED), /**< HFCLK192M oscillator started. */
286 #endif
287 } nrf_clock_event_t;
288
289 /**
290 * @brief Function for enabling the specified interrupt.
291 *
292 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
293 * @param[in] mask Mask of interrupts to be enabled.
294 */
295 NRF_STATIC_INLINE void nrf_clock_int_enable(NRF_CLOCK_Type * p_reg, uint32_t mask);
296
297 /**
298 * @brief Function for disabling the specified interrupt.
299 *
300 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
301 * @param[in] mask Mask of interrupts to be disabled.
302 */
303 NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask);
304
305 /**
306 * @brief Function for checking if the specified interrupts are enabled.
307 *
308 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
309 * @param[in] mask Mask of interrupts to be checked.
310 *
311 * @return Mask of enabled interrupts.
312 */
313 NRF_STATIC_INLINE uint32_t nrf_clock_int_enable_check(NRF_CLOCK_Type const * p_reg, uint32_t mask);
314
315 /**
316 * @brief Function for retrieving the address of the specified task.
317 * @details This function can be used by the PPI module.
318 *
319 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
320 * @param[in] task CLOCK Task.
321 *
322 * @return Address of the requested task register.
323 */
324 NRF_STATIC_INLINE uint32_t nrf_clock_task_address_get(NRF_CLOCK_Type const * p_reg,
325 nrf_clock_task_t task);
326
327 /**
328 * @brief Function for setting the specified task.
329 *
330 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
331 * @param[in] task Task to be activated.
332 */
333 NRF_STATIC_INLINE void nrf_clock_task_trigger(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task);
334
335 /**
336 * @brief Function for retrieving the address of the specified event.
337 * @details This function can be used by the PPI module.
338 *
339 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
340 * @param[in] event CLOCK Event.
341 *
342 * @return Address of the specified event register.
343 */
344 NRF_STATIC_INLINE uint32_t nrf_clock_event_address_get(NRF_CLOCK_Type const * p_reg,
345 nrf_clock_event_t event);
346
347 /**
348 * @brief Function for clearing the specified event.
349 *
350 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
351 * @param[in] event Event to clear.
352 */
353 NRF_STATIC_INLINE void nrf_clock_event_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event);
354
355 /**
356 * @brief Function for retrieving the state of the specified event.
357 *
358 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
359 * @param[in] event Event to be checked.
360 *
361 * @retval true The event has been generated.
362 * @retval false The event has not been generated.
363 */
364 NRF_STATIC_INLINE bool nrf_clock_event_check(NRF_CLOCK_Type const * p_reg, nrf_clock_event_t event);
365
366 /**
367 * @brief Function for retrieving the trigger status of the task START for given domain.
368 *
369 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
370 * @param[in] domain Clock domain.
371 *
372 * @retval false The task START for the given domain has not been triggered.
373 * @retval true The task START for the given domain has been triggered.
374 */
375 NRF_STATIC_INLINE bool nrf_clock_start_task_check(NRF_CLOCK_Type const * p_reg,
376 nrf_clock_domain_t domain);
377
378 /**
379 * @brief Function for retrieving the state of the clock.
380 *
381 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
382 * @param[in] domain Clock domain.
383 * @param[out] p_clk_src Pointer to clock source that is running. Set to NULL if not needed.
384 * Ignored for HFCLKAUDIO domain. Variable pointed by @p p_clk_src
385 * must be of either @ref nrf_clock_lfclk_t type for LFCLK
386 * or @ref nrf_clock_hfclk_t type for HFCLK and HFCLK192M.
387 *
388 * @retval false The clock is not running.
389 * @retval true The clock is running.
390 */
391 NRF_STATIC_INLINE bool nrf_clock_is_running(NRF_CLOCK_Type const * p_reg,
392 nrf_clock_domain_t domain,
393 void * p_clk_src);
394
395 /**
396 * @brief Function for changing the low-frequency clock source.
397 * @details Check in Product Specification if this function can be called when
398 * the low-frequency clock is running.
399 *
400 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
401 * @param[in] source New low-frequency clock source.
402 */
403 NRF_STATIC_INLINE void nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_lfclk_t source);
404
405 /**
406 * @brief Function for retrieving the selected source for the low-frequency clock.
407 *
408 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
409 *
410 * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
411 * is the selected source for the low-frequency clock.
412 * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
413 * is the selected source for the low-frequency clock.
414 * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesized from
415 * the HFCLK is the selected source for the low-frequency clock.
416 */
417 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(NRF_CLOCK_Type const * p_reg);
418
419 /**
420 * @brief Function for retrieving the active source of the low-frequency clock.
421 *
422 * @note This function is deprecated. Use @ref nrf_clock_is_running instead.
423 *
424 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
425 *
426 * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
427 * is the active source of the low-frequency clock.
428 * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
429 * is the active source of the low-frequency clock.
430 * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesized from
431 * the HFCLK is the active source of the low-frequency clock.
432 */
433 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(NRF_CLOCK_Type const * p_reg);
434
435 /**
436 * @brief Function for retrieving the clock source for the LFCLK clock when
437 * the task LKCLKSTART is triggered.
438 *
439 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
440 *
441 * @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
442 * is running and generating the LFCLK clock.
443 * @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
444 * is running and generating the LFCLK clock.
445 * @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesized from
446 * the HFCLK is running and generating the LFCLK clock.
447 */
448 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg);
449
450 /**
451 * @brief Function for retrieving the state of the LFCLK clock.
452 *
453 * @note This function is deprecated. Use @ref nrf_clock_is_running instead.
454 *
455 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
456 *
457 * @retval false The LFCLK clock is not running.
458 * @retval true The LFCLK clock is running.
459 */
460 NRF_STATIC_INLINE bool nrf_clock_lf_is_running(NRF_CLOCK_Type const * p_reg);
461
462 /**
463 * @brief Function for retrieving the trigger status of the task LFCLKSTART.
464 *
465 * @note This function is deprecated. Use @ref nrf_clock_start_task_check instead.
466 *
467 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
468 *
469 * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task LFCLKSTART has not been triggered.
470 * @retval NRF_CLOCK_START_TASK_TRIGGERED The task LFCLKSTART has been triggered.
471 */
472 NRF_STATIC_INLINE
473 nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(NRF_CLOCK_Type const * p_reg);
474
475 #if NRF_CLOCK_HAS_HFCLKSRC
476 /**
477 * @brief Function for changing the high-frequency clock source.
478 *
479 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
480 * @param[in] source New high-frequency clock source.
481 */
482 NRF_STATIC_INLINE void nrf_clock_hf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_t source);
483 #endif
484
485 /**
486 * @brief Function for retrieving the selected source of the high-frequency clock.
487 *
488 * For SoCs not featuring the HFCLKSRC register, this is always also the active source
489 * of the high-frequency clock.
490 *
491 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
492 *
493 * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY The internal RC oscillator is the selected
494 * source of the high-frequency clock.
495 * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY An external crystal oscillator is the selected
496 * source of the high-frequency clock.
497 */
498 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(NRF_CLOCK_Type const * p_reg);
499
500 /**
501 * @brief Function for retrieving the state of the HFCLK clock.
502 *
503 * @note This function is deprecated. Use @ref nrf_clock_is_running instead.
504 *
505 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
506 * @param[in] clk_src Clock source to be checked.
507 *
508 * @retval false The HFCLK clock is not running.
509 * @retval true The HFCLK clock is running.
510 */
511 NRF_STATIC_INLINE bool nrf_clock_hf_is_running(NRF_CLOCK_Type const * p_reg,
512 nrf_clock_hfclk_t clk_src);
513
514 /**
515 * @brief Function for retrieving the trigger status of the task HFCLKSTART.
516 *
517 * @note This function is deprecated. Use @ref nrf_clock_start_task_check instead.
518 *
519 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
520 *
521 * @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task HFCLKSTART has not been triggered.
522 * @retval NRF_CLOCK_START_TASK_TRIGGERED The task HFCLKSTART has been triggered.
523 */
524 NRF_STATIC_INLINE
525 nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(NRF_CLOCK_Type const * p_reg);
526
527 #if NRF_CLOCK_HAS_HFCLKAUDIO
528 /**
529 * @brief Function for changing the Audio clock FREQ_VALUE.
530 *
531 * The frequency of HFCLKAUDIO ranges from 10.666 MHz to 13.333 MHz in 40.7 Hz steps.
532 * To calculate @p freq_value corresponding to the chosen frequency, use the following equation:
533 * FREQ_VALUE = 2^16 * ((12 * f_out / 32M) - 4)
534 *
535 * @warning Chosen frequency must fit in 11.176 MHz - 11.402 MHz or 12.165 MHz - 12.411 MHz frequency bands.
536 *
537 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
538 * @param[in] freq_value New FREQ_VALUE
539 */
540 NRF_STATIC_INLINE
541 void nrf_clock_hfclkaudio_config_set(NRF_CLOCK_Type * p_reg, uint16_t freq_value);
542
543 /**
544 * @brief Function for retrieving the Audio clock FREQ_VALUE.
545 *
546 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
547 *
548 * The frequency of HFCLKAUDIO ranges from 10.666 MHz to 13.333 MHz in 40.7 Hz steps.
549 * To calculate frequency corresponding to the returned FREQ_VALUE, use the following equation:
550 * f_out = 32M * (4 + FREQ_VALUE * 2^(-16))/12
551
552 * @return FREQ_VALUE of the Audio clock.
553 */
554 NRF_STATIC_INLINE
555 uint16_t nrf_clock_hfclkaudio_config_get(NRF_CLOCK_Type const * p_reg);
556 #endif
557
558 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
559 /**
560 * @brief Function for changing the calibration timer interval.
561 *
562 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
563 * @param[in] interval New calibration timer interval in 0.25 s resolution
564 * (range: 0.25 seconds to 31.75 seconds).
565 */
566 NRF_STATIC_INLINE void nrf_clock_cal_timer_timeout_set(NRF_CLOCK_Type * p_reg, uint32_t interval);
567 #endif
568
569 #if NRF_CLOCK_HAS_HFCLK_DIV
570 /**
571 * @brief Function for changing the HFCLK frequency divider.
572 *
573 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
574 * @param[in] divider New HFCLK divider.
575 */
576 NRF_STATIC_INLINE void nrf_clock_hfclk_div_set(NRF_CLOCK_Type * p_reg,
577 nrf_clock_hfclk_div_t divider);
578
579 /**
580 * @brief Function for retrieving the HFCLK frequency divider.
581 *
582 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
583 *
584 * @return HFCLK frequency divider.
585 */
586 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk_div_get(NRF_CLOCK_Type const * p_reg);
587 #endif
588
589 #if NRF_CLOCK_HAS_HFCLK192M
590 /**
591 * @brief Function for changing the HFCLK192M frequency divider.
592 *
593 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
594 * @param[in] divider New HFCLK192M divider.
595 */
596 NRF_STATIC_INLINE void nrf_clock_hfclk192m_div_set(NRF_CLOCK_Type * p_reg,
597 nrf_clock_hfclk_div_t divider);
598
599 /**
600 * @brief Function for retrieving the HFCLK192M frequency divider.
601 *
602 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
603 *
604 * @return HFCLK192M frequency divider.
605 */
606 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk192m_div_get(NRF_CLOCK_Type const * p_reg);
607
608 /**
609 * @brief Function for changing the HFCLK192M source.
610 *
611 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
612 * @param[in] source New HFCLK192M source.
613 */
614 NRF_STATIC_INLINE void nrf_clock_hfclk192m_src_set(NRF_CLOCK_Type * p_reg,
615 nrf_clock_hfclk_t source);
616
617 /**
618 * @brief Function for retrieving the selected source of the HFCLK192M.
619 *
620 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
621 *
622 * @retval NRF_CLOCK_HFCLK_LOW_ACCURACY The internal RC oscillator is the selected
623 * source of the HFCLK192M.
624 * @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY An external crystal oscillator is the selected
625 * source of the HFCLK192M.
626 */
627 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hfclk192m_src_get(NRF_CLOCK_Type const * p_reg);
628 #endif // NRF_CLOCK_HAS_HFCLK192M
629
630 #if NRF_CLOCK_HAS_ALWAYSRUN
631 /**
632 * @brief Function for setting the clock domain to always run.
633 *
634 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
635 * @param[in] domain Clock domain.
636 * @param[in] alwaysrun Ensure the clock is always running.
637 */
638 NRF_STATIC_INLINE void nrf_clock_alwaysrun_set(NRF_CLOCK_Type const * p_reg,
639 nrf_clock_domain_t domain,
640 bool alwaysrun);
641 /**
642 * @brief Function for checking if the clock domain is configured to always run.
643 *
644 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
645 * @param[in] domain Clock domain.
646 *
647 * @retval true The clock domain is configured to always run.
648 * @retval false The clock domain is not configured to always run.
649 */
650 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_get(NRF_CLOCK_Type const * p_reg,
651 nrf_clock_domain_t domain);
652 /**
653 * @brief Function for checking if the clock domain always run setting is active.
654 *
655 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
656 * @param[in] domain Clock domain.
657 *
658 * @retval true The clock domain always run setting is active.
659 * @retval false The clock domain always run setting is not active.
660 */
661 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_active_get(NRF_CLOCK_Type const * p_reg,
662 nrf_clock_domain_t domain);
663 #endif
664
665 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
666 /**
667 * @brief Function for setting the subscribe configuration for a given
668 * CLOCK task.
669 *
670 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
671 * @param[in] task Task for which to set the configuration.
672 * @param[in] channel Channel through which to subscribe events.
673 */
674 NRF_STATIC_INLINE void nrf_clock_subscribe_set(NRF_CLOCK_Type * p_reg,
675 nrf_clock_task_t task,
676 uint8_t channel);
677
678 /**
679 * @brief Function for clearing the subscribe configuration for a given
680 * CLOCK task.
681 *
682 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
683 * @param[in] task Task for which to clear the configuration.
684 */
685 NRF_STATIC_INLINE void nrf_clock_subscribe_clear(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task);
686
687 /**
688 * @brief Function for setting the publish configuration for a given
689 * CLOCK event.
690 *
691 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
692 * @param[in] event Event for which to set the configuration.
693 * @param[in] channel Channel through which to publish the event.
694 */
695 NRF_STATIC_INLINE void nrf_clock_publish_set(NRF_CLOCK_Type * p_reg,
696 nrf_clock_event_t event,
697 uint8_t channel);
698
699 /**
700 * @brief Function for clearing the publish configuration for a given
701 * CLOCK event.
702 *
703 * @param[in] p_reg Pointer to the structure of registers of the peripheral.
704 * @param[in] event Event for which to clear the configuration.
705 */
706 NRF_STATIC_INLINE void nrf_clock_publish_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event);
707 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
708
709 #ifndef NRF_DECLARE_ONLY
710
nrf_clock_int_enable(NRF_CLOCK_Type * p_reg,uint32_t mask)711 NRF_STATIC_INLINE void nrf_clock_int_enable(NRF_CLOCK_Type * p_reg, uint32_t mask)
712 {
713 p_reg->INTENSET = mask;
714 }
715
nrf_clock_int_disable(NRF_CLOCK_Type * p_reg,uint32_t mask)716 NRF_STATIC_INLINE void nrf_clock_int_disable(NRF_CLOCK_Type * p_reg, uint32_t mask)
717 {
718 p_reg->INTENCLR = mask;
719 }
720
nrf_clock_int_enable_check(NRF_CLOCK_Type const * p_reg,uint32_t mask)721 NRF_STATIC_INLINE uint32_t nrf_clock_int_enable_check(NRF_CLOCK_Type const * p_reg, uint32_t mask)
722 {
723 return p_reg->INTENSET & mask;
724 }
725
nrf_clock_task_address_get(NRF_CLOCK_Type const * p_reg,nrf_clock_task_t task)726 NRF_STATIC_INLINE uint32_t nrf_clock_task_address_get(NRF_CLOCK_Type const * p_reg,
727 nrf_clock_task_t task)
728 {
729 return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
730 }
731
nrf_clock_task_trigger(NRF_CLOCK_Type * p_reg,nrf_clock_task_t task)732 NRF_STATIC_INLINE void nrf_clock_task_trigger(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task)
733 {
734 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
735 }
736
nrf_clock_event_address_get(NRF_CLOCK_Type const * p_reg,nrf_clock_event_t event)737 NRF_STATIC_INLINE uint32_t nrf_clock_event_address_get(NRF_CLOCK_Type const * p_reg,
738 nrf_clock_event_t event)
739 {
740 return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
741 }
742
nrf_clock_event_clear(NRF_CLOCK_Type * p_reg,nrf_clock_event_t event)743 NRF_STATIC_INLINE void nrf_clock_event_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event)
744 {
745 *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
746 nrf_event_readback((uint8_t *)p_reg + (uint32_t)event);
747 }
748
nrf_clock_event_check(NRF_CLOCK_Type const * p_reg,nrf_clock_event_t event)749 NRF_STATIC_INLINE bool nrf_clock_event_check(NRF_CLOCK_Type const * p_reg, nrf_clock_event_t event)
750 {
751 return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + event));
752 }
753
nrf_clock_start_task_check(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain)754 NRF_STATIC_INLINE bool nrf_clock_start_task_check(NRF_CLOCK_Type const * p_reg,
755 nrf_clock_domain_t domain)
756 {
757 switch (domain)
758 {
759 case NRF_CLOCK_DOMAIN_LFCLK:
760 return ((p_reg->LFCLKRUN & CLOCK_LFCLKRUN_STATUS_Msk)
761 >> CLOCK_LFCLKRUN_STATUS_Pos);
762 case NRF_CLOCK_DOMAIN_HFCLK:
763 return ((p_reg->HFCLKRUN & CLOCK_HFCLKRUN_STATUS_Msk)
764 >> CLOCK_HFCLKRUN_STATUS_Pos);
765 #if NRF_CLOCK_HAS_HFCLK192M
766 case NRF_CLOCK_DOMAIN_HFCLK192M:
767 return ((p_reg->HFCLK192MRUN & CLOCK_HFCLK192MRUN_STATUS_Msk)
768 >> CLOCK_HFCLK192MRUN_STATUS_Pos);
769 #endif
770 #if NRF_CLOCK_HAS_HFCLKAUDIO
771 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
772 return ((p_reg->HFCLKAUDIORUN & CLOCK_HFCLKAUDIORUN_STATUS_Msk)
773 >> CLOCK_HFCLKAUDIORUN_STATUS_Pos);
774 #endif
775 default:
776 NRFX_ASSERT(0);
777 return false;
778 }
779 }
780
nrf_clock_is_running(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain,void * p_clk_src)781 NRF_STATIC_INLINE bool nrf_clock_is_running(NRF_CLOCK_Type const * p_reg,
782 nrf_clock_domain_t domain,
783 void * p_clk_src)
784 {
785 switch (domain)
786 {
787 case NRF_CLOCK_DOMAIN_LFCLK:
788 if (p_clk_src != NULL)
789 {
790 (*(nrf_clock_lfclk_t *)p_clk_src) =
791 (nrf_clock_lfclk_t)((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_SRC_Msk)
792 >> CLOCK_LFCLKSTAT_SRC_Pos);
793 }
794 if ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_STATE_Msk)
795 >> CLOCK_LFCLKSTAT_STATE_Pos)
796 {
797 return true;
798 }
799 break;
800 case NRF_CLOCK_DOMAIN_HFCLK:
801 if (p_clk_src != NULL)
802 {
803 (*(nrf_clock_hfclk_t *)p_clk_src) =
804 (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
805 >> CLOCK_HFCLKSTAT_SRC_Pos);
806 }
807 if ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_STATE_Msk)
808 >> CLOCK_HFCLKSTAT_STATE_Pos)
809 {
810 return true;
811 }
812 break;
813 #if NRF_CLOCK_HAS_HFCLK192M
814 case NRF_CLOCK_DOMAIN_HFCLK192M:
815 if (p_clk_src != NULL)
816 {
817 (*(nrf_clock_hfclk_t *)p_clk_src) =
818 (nrf_clock_hfclk_t)((p_reg->HFCLK192MSTAT & CLOCK_HFCLK192MSTAT_SRC_Msk)
819 >> CLOCK_HFCLK192MSTAT_SRC_Pos);
820 }
821 if ((p_reg->HFCLK192MSTAT & CLOCK_HFCLK192MSTAT_STATE_Msk)
822 >> CLOCK_HFCLK192MSTAT_STATE_Pos)
823 {
824 return true;
825 }
826 break;
827 #endif
828 #if NRF_CLOCK_HAS_HFCLKAUDIO
829 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
830 return (p_reg->HFCLKAUDIOSTAT & CLOCK_HFCLKAUDIOSTAT_STATE_Msk) ==
831 CLOCK_HFCLKAUDIOSTAT_STATE_Msk;
832 #endif
833 default:
834 NRFX_ASSERT(0);
835 return false;
836 }
837 return false;
838 }
839
nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg,nrf_clock_lfclk_t source)840 NRF_STATIC_INLINE void nrf_clock_lf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_lfclk_t source)
841 {
842 p_reg->LFCLKSRC = (uint32_t)(source);
843 }
844
nrf_clock_lf_src_get(NRF_CLOCK_Type const * p_reg)845 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(NRF_CLOCK_Type const * p_reg)
846 {
847 return (nrf_clock_lfclk_t)(p_reg->LFCLKSRC);
848 }
849
nrf_clock_lf_actv_src_get(NRF_CLOCK_Type const * p_reg)850 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(NRF_CLOCK_Type const * p_reg)
851 {
852 nrf_clock_lfclk_t clk_src;
853 (void)nrf_clock_is_running(p_reg, NRF_CLOCK_DOMAIN_LFCLK, &clk_src);
854 return clk_src;
855 }
856
nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)857 NRF_STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(NRF_CLOCK_Type const * p_reg)
858 {
859 return (nrf_clock_lfclk_t)((p_reg->LFCLKSRCCOPY & CLOCK_LFCLKSRCCOPY_SRC_Msk)
860 >> CLOCK_LFCLKSRCCOPY_SRC_Pos);
861 }
862
nrf_clock_lf_is_running(NRF_CLOCK_Type const * p_reg)863 NRF_STATIC_INLINE bool nrf_clock_lf_is_running(NRF_CLOCK_Type const * p_reg)
864 {
865 return nrf_clock_is_running(p_reg, NRF_CLOCK_DOMAIN_LFCLK, NULL);
866 }
867
868 NRF_STATIC_INLINE
nrf_clock_lf_start_task_status_get(NRF_CLOCK_Type const * p_reg)869 nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(NRF_CLOCK_Type const * p_reg)
870 {
871 return (nrf_clock_start_task_status_t)nrf_clock_start_task_check(p_reg,
872 NRF_CLOCK_DOMAIN_LFCLK);
873 }
874
875 #if NRF_CLOCK_HAS_HFCLKSRC
nrf_clock_hf_src_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_t source)876 NRF_STATIC_INLINE void nrf_clock_hf_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_t source)
877 {
878 p_reg->HFCLKSRC = (uint32_t)(source);
879 }
880 #endif
881
nrf_clock_hf_src_get(NRF_CLOCK_Type const * p_reg)882 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(NRF_CLOCK_Type const * p_reg)
883 {
884 #if NRF_CLOCK_HAS_HFCLKSRC
885 return (nrf_clock_hfclk_t)(p_reg->HFCLKSRC);
886 #else
887 return (nrf_clock_hfclk_t)((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_SRC_Msk)
888 >> CLOCK_HFCLKSTAT_SRC_Pos);
889 #endif
890 }
891
nrf_clock_hf_is_running(NRF_CLOCK_Type const * p_reg,nrf_clock_hfclk_t clk_src)892 NRF_STATIC_INLINE bool nrf_clock_hf_is_running(NRF_CLOCK_Type const * p_reg,
893 nrf_clock_hfclk_t clk_src)
894 {
895 nrf_clock_hfclk_t active_clk_src;
896 bool ret = nrf_clock_is_running(p_reg, NRF_CLOCK_DOMAIN_HFCLK, &active_clk_src);
897 return (ret && (active_clk_src == clk_src));
898 }
899
900 NRF_STATIC_INLINE
nrf_clock_hf_start_task_status_get(NRF_CLOCK_Type const * p_reg)901 nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(NRF_CLOCK_Type const * p_reg)
902 {
903 return (nrf_clock_start_task_status_t)nrf_clock_start_task_check(p_reg,
904 NRF_CLOCK_DOMAIN_HFCLK);
905 }
906
907 #if NRF_CLOCK_HAS_HFCLKAUDIO
908 NRF_STATIC_INLINE
nrf_clock_hfclkaudio_config_set(NRF_CLOCK_Type * p_reg,uint16_t freq_value)909 void nrf_clock_hfclkaudio_config_set(NRF_CLOCK_Type * p_reg, uint16_t freq_value)
910 {
911 p_reg->HFCLKAUDIO.FREQUENCY = freq_value;
912 }
913
914 NRF_STATIC_INLINE
nrf_clock_hfclkaudio_config_get(NRF_CLOCK_Type const * p_reg)915 uint16_t nrf_clock_hfclkaudio_config_get(NRF_CLOCK_Type const * p_reg)
916 {
917 return (uint16_t)(p_reg->HFCLKAUDIO.FREQUENCY);
918 }
919 #endif
920
921 #if NRF_CLOCK_HAS_HFCLK_DIV
922 NRF_STATIC_INLINE
nrf_clock_hfclk_div_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_div_t divider)923 void nrf_clock_hfclk_div_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_div_t divider)
924 {
925 p_reg->HFCLKCTRL = (((uint8_t)(divider) << CLOCK_HFCLKCTRL_HCLK_Pos) &
926 CLOCK_HFCLKCTRL_HCLK_Msk);
927 }
928
nrf_clock_hfclk_div_get(NRF_CLOCK_Type const * p_reg)929 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk_div_get(NRF_CLOCK_Type const * p_reg)
930 {
931 return (nrf_clock_hfclk_div_t)((p_reg->HFCLKCTRL & CLOCK_HFCLKCTRL_HCLK_Msk)
932 >> CLOCK_HFCLKCTRL_HCLK_Pos);
933 }
934 #endif
935
936 #if NRF_CLOCK_HAS_HFCLK192M
937 NRF_STATIC_INLINE
nrf_clock_hfclk192m_div_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_div_t divider)938 void nrf_clock_hfclk192m_div_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_div_t divider)
939 {
940 p_reg->HFCLK192MCTRL = (((uint8_t)(divider) << CLOCK_HFCLK192MCTRL_HCLK192M_Pos) &
941 CLOCK_HFCLK192MCTRL_HCLK192M_Msk);
942 }
943
nrf_clock_hfclk192m_div_get(NRF_CLOCK_Type const * p_reg)944 NRF_STATIC_INLINE nrf_clock_hfclk_div_t nrf_clock_hfclk192m_div_get(NRF_CLOCK_Type const * p_reg)
945 {
946 return (nrf_clock_hfclk_div_t)((p_reg->HFCLK192MCTRL & CLOCK_HFCLK192MCTRL_HCLK192M_Msk)
947 >> CLOCK_HFCLK192MCTRL_HCLK192M_Pos);
948 }
949
nrf_clock_hfclk192m_src_set(NRF_CLOCK_Type * p_reg,nrf_clock_hfclk_t source)950 NRF_STATIC_INLINE void nrf_clock_hfclk192m_src_set(NRF_CLOCK_Type * p_reg, nrf_clock_hfclk_t source)
951 {
952 p_reg->HFCLK192MSRC = (uint32_t)(source);
953 }
954
nrf_clock_hfclk192m_src_get(NRF_CLOCK_Type const * p_reg)955 NRF_STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hfclk192m_src_get(NRF_CLOCK_Type const * p_reg)
956 {
957 return (nrf_clock_hfclk_t)(p_reg->HFCLK192MSRC);
958 }
959 #endif
960
961 #if NRF_CLOCK_HAS_CALIBRATION_TIMER
nrf_clock_cal_timer_timeout_set(NRF_CLOCK_Type * p_reg,uint32_t interval)962 NRF_STATIC_INLINE void nrf_clock_cal_timer_timeout_set(NRF_CLOCK_Type * p_reg, uint32_t interval)
963 {
964 p_reg->CTIV = ((interval << CLOCK_CTIV_CTIV_Pos) & CLOCK_CTIV_CTIV_Msk);
965 }
966 #endif
967
968 #if NRF_CLOCK_HAS_ALWAYSRUN
nrf_clock_alwaysrun_set(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain,bool alwaysrun)969 NRF_STATIC_INLINE void nrf_clock_alwaysrun_set(NRF_CLOCK_Type const * p_reg,
970 nrf_clock_domain_t domain,
971 bool alwaysrun)
972 {
973 /* ALWAYSRUN registers should be R/W, but are marked as read-only.
974 * Redefine them as R/W as a workaround. */
975 switch (domain)
976 {
977 case NRF_CLOCK_DOMAIN_LFCLK:
978 *(volatile uint32_t *)(&p_reg->LFCLKALWAYSRUN) =
979 ((alwaysrun << CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos)
980 & CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk);
981 break;
982 case NRF_CLOCK_DOMAIN_HFCLK:
983 *(volatile uint32_t *)(&p_reg->HFCLKALWAYSRUN) =
984 ((alwaysrun << CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Pos)
985 & CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Msk);
986 break;
987 #if NRF_CLOCK_HAS_HFCLK192M
988 case NRF_CLOCK_DOMAIN_HFCLK192M:
989 *(volatile uint32_t *)(&p_reg->HFCLK192MALWAYSRUN) =
990 ((alwaysrun << CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Pos)
991 & CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Msk);
992 break;
993 #endif
994 #if NRF_CLOCK_HAS_HFCLKAUDIO
995 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
996 *(volatile uint32_t *)(&p_reg->HFCLKAUDIOALWAYSRUN) =
997 ((alwaysrun << CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Pos)
998 & CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Msk);
999 break;
1000 #endif
1001 default:
1002 NRFX_ASSERT(0);
1003 break;
1004 }
1005 }
1006
nrf_clock_alwaysrun_get(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain)1007 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_get(NRF_CLOCK_Type const * p_reg,
1008 nrf_clock_domain_t domain)
1009 {
1010 switch (domain)
1011 {
1012 case NRF_CLOCK_DOMAIN_LFCLK:
1013 return ((p_reg->LFCLKALWAYSRUN & CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Msk)
1014 >> CLOCK_LFCLKALWAYSRUN_ALWAYSRUN_Pos);
1015 case NRF_CLOCK_DOMAIN_HFCLK:
1016 return ((p_reg->HFCLKALWAYSRUN & CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Msk)
1017 >> CLOCK_HFCLKALWAYSRUN_ALWAYSRUN_Pos);
1018 #if NRF_CLOCK_HAS_HFCLK192M
1019 case NRF_CLOCK_DOMAIN_HFCLK192M:
1020 return ((p_reg->HFCLK192MALWAYSRUN & CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Msk)
1021 >> CLOCK_HFCLK192MALWAYSRUN_ALWAYSRUN_Pos);
1022 #endif
1023 #if NRF_CLOCK_HAS_HFCLKAUDIO
1024 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
1025 return ((p_reg->HFCLKAUDIOALWAYSRUN & CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Msk)
1026 >> CLOCK_HFCLKAUDIOALWAYSRUN_ALWAYSRUN_Pos);
1027 #endif
1028 default:
1029 NRFX_ASSERT(0);
1030 return false;
1031 }
1032 }
1033
nrf_clock_alwaysrun_active_get(NRF_CLOCK_Type const * p_reg,nrf_clock_domain_t domain)1034 NRF_STATIC_INLINE bool nrf_clock_alwaysrun_active_get(NRF_CLOCK_Type const * p_reg,
1035 nrf_clock_domain_t domain)
1036 {
1037 switch (domain)
1038 {
1039 case NRF_CLOCK_DOMAIN_LFCLK:
1040 return ((p_reg->LFCLKSTAT & CLOCK_LFCLKSTAT_ALWAYSRUNNING_Msk)
1041 >> CLOCK_LFCLKSTAT_ALWAYSRUNNING_Pos);
1042 case NRF_CLOCK_DOMAIN_HFCLK:
1043 return ((p_reg->HFCLKSTAT & CLOCK_HFCLKSTAT_ALWAYSRUNNING_Msk)
1044 >> CLOCK_HFCLKSTAT_ALWAYSRUNNING_Pos);
1045 #if NRF_CLOCK_HAS_HFCLK192M
1046 case NRF_CLOCK_DOMAIN_HFCLK192M:
1047 return ((p_reg->HFCLK192MSTAT & CLOCK_HFCLK192MSTAT_ALWAYSRUNNING_Msk)
1048 >> CLOCK_HFCLK192MSTAT_ALWAYSRUNNING_Pos);
1049 #endif
1050 #if NRF_CLOCK_HAS_HFCLKAUDIO
1051 case NRF_CLOCK_DOMAIN_HFCLKAUDIO:
1052 return ((p_reg->HFCLKAUDIOSTAT & CLOCK_HFCLKAUDIOSTAT_ALWAYSRUNNING_Msk)
1053 >> CLOCK_HFCLKAUDIOSTAT_ALWAYSRUNNING_Pos);
1054 #endif
1055 default:
1056 NRFX_ASSERT(0);
1057 return false;
1058 }
1059 }
1060 #endif // NRF_CLOCK_HAS_ALWAYSRUN
1061
1062 #if defined(DPPI_PRESENT)
nrf_clock_subscribe_set(NRF_CLOCK_Type * p_reg,nrf_clock_task_t task,uint8_t channel)1063 NRF_STATIC_INLINE void nrf_clock_subscribe_set(NRF_CLOCK_Type * p_reg,
1064 nrf_clock_task_t task,
1065 uint8_t channel)
1066 {
1067 *((volatile uint32_t *) ((uint8_t *)p_reg+ (uint32_t)task + 0x80uL)) =
1068 ((uint32_t)channel | CLOCK_SUBSCRIBE_HFCLKSTART_EN_Msk);
1069 }
1070
nrf_clock_subscribe_clear(NRF_CLOCK_Type * p_reg,nrf_clock_task_t task)1071 NRF_STATIC_INLINE void nrf_clock_subscribe_clear(NRF_CLOCK_Type * p_reg, nrf_clock_task_t task)
1072 {
1073 *((volatile uint32_t *) ((uint8_t *)p_reg + (uint32_t)task + 0x80uL)) = 0;
1074 }
1075
nrf_clock_publish_set(NRF_CLOCK_Type * p_reg,nrf_clock_event_t event,uint8_t channel)1076 NRF_STATIC_INLINE void nrf_clock_publish_set(NRF_CLOCK_Type * p_reg,
1077 nrf_clock_event_t event,
1078 uint8_t channel)
1079 {
1080 *((volatile uint32_t *) ((uint8_t *)p_reg + (uint32_t)event + 0x80uL)) =
1081 ((uint32_t)channel | CLOCK_PUBLISH_HFCLKSTARTED_EN_Msk);
1082 }
1083
nrf_clock_publish_clear(NRF_CLOCK_Type * p_reg,nrf_clock_event_t event)1084 NRF_STATIC_INLINE void nrf_clock_publish_clear(NRF_CLOCK_Type * p_reg, nrf_clock_event_t event)
1085 {
1086 *((volatile uint32_t *) ((uint8_t *)p_reg + (uint32_t)event + 0x80uL)) = 0;
1087 }
1088 #endif // defined(DPPI_PRESENT)
1089
1090 #endif // NRF_DECLARE_ONLY
1091
1092 /** @} */
1093
1094 #ifdef __cplusplus
1095 }
1096 #endif
1097
1098 #endif // NRF_CLOCK_H__
1099