1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * rt712-sdca.h -- RT712 SDCA ALSA SoC audio driver header 4 * 5 * Copyright(c) 2023 Realtek Semiconductor Corp. 6 */ 7 8 #ifndef __RT712_H__ 9 #define __RT712_H__ 10 11 #include <linux/pm.h> 12 #include <linux/regmap.h> 13 #include <linux/soundwire/sdw.h> 14 #include <linux/soundwire/sdw_type.h> 15 #include <sound/soc.h> 16 #include <linux/workqueue.h> 17 18 struct rt712_sdca_priv { 19 struct regmap *regmap; 20 struct regmap *mbq_regmap; 21 struct snd_soc_component *component; 22 struct sdw_slave *slave; 23 enum sdw_slave_status status; 24 struct sdw_bus_params params; 25 bool hw_init; 26 bool first_hw_init; 27 struct snd_soc_jack *hs_jack; 28 struct delayed_work jack_detect_work; 29 struct delayed_work jack_btn_check_work; 30 struct mutex calibrate_mutex; /* for headset calibration */ 31 struct mutex disable_irq_lock; /* SDCA irq lock protection */ 32 bool disable_irq; 33 int jack_type; 34 int jd_src; 35 unsigned int scp_sdca_stat1; 36 unsigned int scp_sdca_stat2; 37 unsigned int hw_id; 38 bool fu0f_dapm_mute; 39 bool fu0f_mixer_l_mute; 40 bool fu0f_mixer_r_mute; 41 }; 42 43 struct sdw_stream_data { 44 struct sdw_stream_runtime *sdw_stream; 45 }; 46 47 /* NID */ 48 #define RT712_VENDOR_REG 0x20 49 #define RT712_VENDOR_CALI 0x58 50 #define RT712_ULTRA_SOUND_DET 0x59 51 #define RT712_VENDOR_IMS_DRE 0x5b 52 #define RT712_VENDOR_ANALOG_CTL 0x5f 53 #define RT712_VENDOR_HDA_CTL 0x61 54 55 /* Index (NID:20h) */ 56 #define RT712_JD_PRODUCT_NUM 0x00 57 #define RT712_ANALOG_BIAS_CTL3 0x04 58 #define RT712_LDO2_3_CTL1 0x0e 59 #define RT712_PARA_VERB_CTL 0x1a 60 #define RT712_CC_DET1 0x24 61 #define RT712_COMBO_JACK_AUTO_CTL1 0x45 62 #define RT712_COMBO_JACK_AUTO_CTL2 0x46 63 #define RT712_COMBO_JACK_AUTO_CTL3 0x47 64 #define RT712_DIGITAL_MISC_CTRL4 0x4a 65 #define RT712_FSM_CTL 0x67 66 #define RT712_SW_CONFIG1 0x8a 67 #define RT712_SW_CONFIG2 0x8b 68 69 /* Index (NID:58h) */ 70 #define RT712_DAC_DC_CALI_CTL1 0x00 71 #define RT712_DAC_DC_CALI_CTL2 0x01 72 73 /* Index (NID:59h) */ 74 #define RT712_ULTRA_SOUND_DETECTOR6 0x1e 75 76 /* Index (NID:5bh) */ 77 #define RT712_IMS_DIGITAL_CTL1 0x00 78 #define RT712_IMS_DIGITAL_CTL5 0x05 79 #define RT712_HP_DETECT_RLDET_CTL1 0x29 80 #define RT712_HP_DETECT_RLDET_CTL2 0x2a 81 82 /* Index (NID:5fh) */ 83 #define RT712_MISC_POWER_CTL0 0x00 84 #define RT712_MISC_POWER_CTL7 0x08 85 86 /* Index (NID:61h) */ 87 #define RT712_HDA_LEGACY_MUX_CTL0 0x00 88 #define RT712_HDA_LEGACY_CONFIG_CTL0 0x06 89 #define RT712_HDA_LEGACY_RESET_CTL 0x08 90 #define RT712_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e 91 #define RT712_DMIC_ENT_FLOAT_CTL 0x10 92 #define RT712_DMIC_GAIN_ENT_FLOAT_CTL0 0x11 93 #define RT712_DMIC_GAIN_ENT_FLOAT_CTL2 0x13 94 #define RT712_ADC_ENT_FLOAT_CTL 0x15 95 #define RT712_ADC_VOL_CH_FLOAT_CTL2 0x18 96 #define RT712_DAC03_HP_PDE_FLOAT_CTL 0x22 97 #define RT712_MIC2_LINE2_PDE_FLOAT_CTL 0x23 98 #define RT712_ADC0A_08_PDE_FLOAT_CTL 0x26 99 #define RT712_ADC0B_11_PDE_FLOAT_CTL 0x27 100 #define RT712_DMIC1_2_PDE_FLOAT_CTL 0x2b 101 #define RT712_AMP_PDE_FLOAT_CTL 0x2c 102 #define RT712_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f 103 #define RT712_GE_RELATED_CTL1 0x45 104 #define RT712_GE_RELATED_CTL2 0x46 105 #define RT712_MIXER_CTL0 0x52 106 #define RT712_MIXER_CTL1 0x53 107 #define RT712_EAPD_CTL 0x55 108 #define RT712_UMP_HID_CTL0 0x60 109 #define RT712_UMP_HID_CTL1 0x61 110 #define RT712_UMP_HID_CTL2 0x62 111 #define RT712_UMP_HID_CTL3 0x63 112 #define RT712_UMP_HID_CTL4 0x64 113 #define RT712_UMP_HID_CTL5 0x65 114 #define RT712_UMP_HID_CTL6 0x66 115 #define RT712_UMP_HID_CTL7 0x67 116 #define RT712_UMP_HID_CTL8 0x68 117 118 /* Parameter & Verb control 01 (0x1a)(NID:20h) */ 119 #define RT712_HIDDEN_REG_SW_RESET (0x1 << 14) 120 121 /* combo jack auto switch control 2 (0x46)(NID:20h) */ 122 #define RT712_COMBOJACK_AUTO_DET_STATUS (0x1 << 11) 123 #define RT712_COMBOJACK_AUTO_DET_TRS (0x1 << 10) 124 #define RT712_COMBOJACK_AUTO_DET_CTIA (0x1 << 9) 125 #define RT712_COMBOJACK_AUTO_DET_OMTP (0x1 << 8) 126 127 /* DAC DC offset calibration control-1 (0x00)(NID:58h) */ 128 #define RT712_DAC_DC_CALI_TRIGGER (0x1 << 15) 129 130 #define RT712_EAPD_HIGH 0x2 131 #define RT712_EAPD_LOW 0x0 132 133 /* RC Calibration register */ 134 #define RT712_RC_CAL 0x3201 135 136 /* Buffer address for HID */ 137 #define RT712_BUF_ADDR_HID1 0x44030000 138 #define RT712_BUF_ADDR_HID2 0x44030020 139 140 /* RT712 SDCA Control - function number */ 141 #define FUNC_NUM_JACK_CODEC 0x01 142 #define FUNC_NUM_MIC_ARRAY 0x02 143 #define FUNC_NUM_HID 0x03 144 #define FUNC_NUM_AMP 0x04 145 146 /* RT712 SDCA entity */ 147 #define RT712_SDCA_ENT_HID01 0x01 148 #define RT712_SDCA_ENT_GE49 0x49 149 #define RT712_SDCA_ENT_USER_FU05 0x05 150 #define RT712_SDCA_ENT_USER_FU06 0x06 151 #define RT712_SDCA_ENT_USER_FU0F 0x0f 152 #define RT712_SDCA_ENT_USER_FU10 0x19 153 #define RT712_SDCA_ENT_USER_FU1E 0x1e 154 #define RT712_SDCA_ENT_FU15 0x15 155 #define RT712_SDCA_ENT_PDE23 0x23 156 #define RT712_SDCA_ENT_PDE40 0x40 157 #define RT712_SDCA_ENT_PDE11 0x11 158 #define RT712_SDCA_ENT_PDE12 0x12 159 #define RT712_SDCA_ENT_CS01 0x01 160 #define RT712_SDCA_ENT_CS11 0x11 161 #define RT712_SDCA_ENT_CS1F 0x1f 162 #define RT712_SDCA_ENT_CS1C 0x1c 163 #define RT712_SDCA_ENT_CS31 0x31 164 #define RT712_SDCA_ENT_OT23 0x42 165 #define RT712_SDCA_ENT_IT26 0x26 166 #define RT712_SDCA_ENT_IT09 0x09 167 #define RT712_SDCA_ENT_PLATFORM_FU15 0x15 168 #define RT712_SDCA_ENT_PLATFORM_FU44 0x44 169 170 /* RT712 SDCA control */ 171 #define RT712_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10 172 #define RT712_SDCA_CTL_FU_MUTE 0x01 173 #define RT712_SDCA_CTL_FU_VOLUME 0x02 174 #define RT712_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10 175 #define RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11 176 #define RT712_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12 177 #define RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13 178 #define RT712_SDCA_CTL_SELECTED_MODE 0x01 179 #define RT712_SDCA_CTL_DETECTED_MODE 0x02 180 #define RT712_SDCA_CTL_REQ_POWER_STATE 0x01 181 #define RT712_SDCA_CTL_VENDOR_DEF 0x30 182 #define RT712_SDCA_CTL_FU_CH_GAIN 0x0b 183 184 /* RT712 SDCA channel */ 185 #define CH_L 0x01 186 #define CH_R 0x02 187 188 /* sample frequency index */ 189 #define RT712_SDCA_RATE_16000HZ 0x04 190 #define RT712_SDCA_RATE_32000HZ 0x07 191 #define RT712_SDCA_RATE_44100HZ 0x08 192 #define RT712_SDCA_RATE_48000HZ 0x09 193 #define RT712_SDCA_RATE_96000HZ 0x0b 194 #define RT712_SDCA_RATE_192000HZ 0x0d 195 196 enum { 197 RT712_AIF1, 198 RT712_AIF2, 199 }; 200 201 enum rt712_sdca_jd_src { 202 RT712_JD_NULL, 203 RT712_JD1, 204 }; 205 206 enum rt712_sdca_hw_id { 207 RT712_DEV_ID_712 = 0x7, 208 RT712_DEV_ID_713 = 0x6, 209 RT712_DEV_ID_716 = 0x5, 210 RT712_DEV_ID_717 = 0x4, 211 }; 212 213 #define RT712_PART_ID_713 0x713 214 215 int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave); 216 int rt712_sdca_init(struct device *dev, struct regmap *regmap, 217 struct regmap *mbq_regmap, struct sdw_slave *slave); 218 219 int rt712_sdca_jack_detect(struct rt712_sdca_priv *rt712, bool *hp, bool *mic); 220 #endif /* __RT712_H__ */ 221