1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright (c) 2022, Linaro Limited
4  *
5  * The defines in this file are based on
6  * TCG PC Client Platform TPM Profile (PTP) Specification for
7  * TPM 2.0 v1.0.5 Rev 14
8  */
9 
10 #ifndef __DRIVERS_TPM2_PTP_FIFO_H
11 #define __DRIVERS_TPM2_PTP_FIFO_H
12 
13 #include <drivers/tpm2_chip.h>
14 #include <stdint.h>
15 #include <types_ext.h>
16 #include <util.h>
17 
18 #define TPM2_REG_SIZE 0x5000
19 
20 /* Register Space for FIFO TPM access where v represents locality */
21 #define TPM2_ACCESS(v)		(0x0000 | SHIFT_U32((v), 12))
22 #define TPM2_INT_ENABLE(v)	(0x0008 | SHIFT_U32((v), 12))
23 #define TPM2_INT_VECTOR(v)	(0x000c | SHIFT_U32((v), 12))
24 #define TPM2_INT_STATUS(v)	(0x0010 | SHIFT_U32((v), 12))
25 #define TPM2_INT_CAPABILITY(v)	(0x0014 | SHIFT_U32((v), 12))
26 #define TPM2_STS(v)		(0x0018 | SHIFT_U32((v), 12))
27 #define TPM2_DATA_FIFO(v)	(0x0024 | SHIFT_U32((v), 12))
28 #define TPM2_INTERFACE_ID(v)	(0x0030 | SHIFT_U32((v), 12))
29 #define TPM2_XDATA_FIFO(v)	(0x0080 | SHIFT_U32((v), 12))
30 #define TPM2_DID_VID(v)		(0x0F00 | SHIFT_U32((v), 12))
31 #define TPM2_RID(v)		(0x0F04 | SHIFT_U32((v), 12))
32 
33 /* Access Register */
34 #define	TPM2_ACCESS_ESTABLISHMENT	BIT(0)
35 #define	TPM2_ACCESS_REQUEST_USE		BIT(1)
36 #define	TPM2_ACCESS_REQUEST_PENDING	BIT(2)
37 #define	TPM2_ACCESS_ACTIVE_LOCALITY	BIT(5)
38 #define	TPM2_ACCESS_VALID		BIT(7)
39 
40 /* STS Register */
41 #define	TPM2_STS_RESPONSE_RETRY		BIT(1)
42 #define	TPM2_STS_SELF_TEST_DONE		BIT(2)
43 #define	TPM2_STS_DATA_EXPECT		BIT(3)
44 #define	TPM2_STS_DATA_AVAIL		BIT(4)
45 #define	TPM2_STS_GO			BIT(5)
46 #define	TPM2_STS_COMMAND_READY		BIT(6)
47 #define	TPM2_STS_VALID			BIT(7)
48 #define	TPM2_STS_COMMAND_CANCEL		BIT(24)
49 #define	TPM2_STS_RESET_ESTABLISMENT_BIT	BIT(25)
50 #define	TPM2_STS_FAMILY_TPM2		BIT(26)
51 #define	TPM2_STS_FAMILY_MASK		SHIFT_U32(3, 26)
52 #define	TPM2_STS_BURST_COUNT_MASK	SHIFT_U32(0xFFFF, 8)
53 #define	TPM2_STS_BURST_COUNT_SHIFT	8
54 #define	TPM2_STS_READ_ZERO		0x23
55 
56 /* INT_ENABLE Register */
57 #define	TPM2_INT_DATA_AVAIL_INT		BIT(0)
58 #define	TPM2_INT_STS_VALID_INT		BIT(1)
59 #define	TPM2_INT_LOCALITY_CHANGE_INT	BIT(2)
60 #define	TPM2_INT_CMD_READY_INT		BIT(7)
61 #define	TPM2_GLOBAL_INT_ENABLE		BIT(31)
62 
63 enum tpm2_result tpm2_fifo_init(struct tpm2_chip *chip);
64 enum tpm2_result tpm2_fifo_end(struct tpm2_chip *chip);
65 enum tpm2_result tpm2_fifo_send(struct tpm2_chip *chip, uint8_t *buf,
66 				uint32_t len);
67 enum tpm2_result tpm2_fifo_recv(struct tpm2_chip *chip, uint8_t *buf,
68 				uint32_t *len, uint32_t cmd_duration);
69 
70 #endif	/* __DRIVERS_TPM2_PTP_FIFO_H */
71 
72