1 /**
2 ******************************************************************************
3 * @file rtl8721d_uart.c
4 * @author
5 * @version V1.0.0
6 * @date 2016-05-17
7 * @brief This file contains all the functions prototypes for the UART firmware
8 * library, including the following functionalities of the Universal Asynchronous
9 * Receiver/Transmitter (UART) peripheral:
10 * - Uart DMA mode Initialization
11 * - Uart DMA mode config
12 * - Uart DMA mode control(enable or disable)
13 * - Uart Low Power Rx Initialization
14 * - Uart Low Power Rx Monitor Function config
15 * - Low Power Rx Baud Rate Setting
16 * - Uart IrDA Function Initialization
17 * - Uart IrDA Function control(enable or disable)
18 *
19 * @verbatim
20 *
21 * ===================================================================
22 * How to use this driver
23 * ===================================================================
24 * 1. Enable peripheral clock using the following functions
25 * RCC_PeriphClockCmd(APBPeriph_UARTx, APBPeriph_UARTx_CLOCK, ENABLE);
26 *
27 * 2. configure the UART pinmux.
28 * Pinmux_Config(Pin_Num, PINMUX_FUNCTION_UART)
29 *
30 * 3. disable uart rx path
31 *
32 * 4. select rx path clock source(XTAL 40M Hz/XTAL 2M Hz/OSC 2M Hz)
33 *
34 * 5. clear rx fifo.
35 *
36 * 6. Program Word Length , Stop Bit, Parity, Hardware flow control and DMA Mode(ENABLE/DISABLE)
37 * using the UART_Init() function.
38 *
39 * 7. Program the Baud Rate, using function UART_SetBaud().
40 *
41 * 8. Enable the NVIC and the corresponding interrupt using the function
42 * UART_INTConfig() and register the uart irq handler if you need to use interrupt mode.
43 *
44 * 9. When using the DMA mode
45 * - GDMA related configurations(source address/destination address/block size etc.)
46 * - Configure the uart DMA burst size using UART_TXDMAConfig()/UART_RXDMAConfig() function
47 * - Active the UART TX/RX DMA Request using UART_TXDMACmd()/UART_RXDMACmd() function
48 *
49 * 10. enable uart rx path
50 *
51 * Refer to related specifications for more details about IrDA function and Low Power Rx Path(monitoring and clock
52 * swicth).
53 *
54 * In order to reach higher communication baudrates, high rate rx path can be used.
55 * Low power rx can be used for saving power.
56 *
57 * @endverbatim
58 *
59 ******************************************************************************
60 * @attention
61 *
62 * This module is a confidential and proprietary property of RealTek and
63 * possession or use of this module requires written permission of RealTek.
64 *
65 * Copyright(c) 2016, Realtek Semiconductor Corporation. All rights reserved.
66 ******************************************************************************
67 */
68
69 #include "ameba_soc.h"
70
71 const UART_DevTable UART_DEV_TABLE[4] = {
72 {UART0_DEV, GDMA_HANDSHAKE_INTERFACE_UART0_TX, GDMA_HANDSHAKE_INTERFACE_UART0_RX, UART0_IRQ}, /*uart0 */
73 {UART1_DEV, GDMA_HANDSHAKE_INTERFACE_UART1_TX, GDMA_HANDSHAKE_INTERFACE_UART1_RX, UART1_IRQ}, /*uart1_bt */
74 {UART2_DEV, 0xFF, 0xFF, UART_LOG_IRQ}, /*log uart */
75 {UART3_DEV, GDMA_HANDSHAKE_INTERFACE_UART3_TX, GDMA_HANDSHAKE_INTERFACE_UART3_RX, UARTLP_IRQ}, /*luart */
76 };
77
78 u32 UART_StateTx[4];
79 u32 UART_StateRx[4];
80
81 /**
82 * @brief configure UART TX DMA burst size .
83 * @param UARTx: where x can be 0/1/3.
84 * @param TxDmaBurstSize: UART TX DMA burst size.
85 * @note Because UART tx fifo depth is 16 in hardware.
86 * Therefore this value must be no more than 16.
87 * @retval None
88 */
89 void
UART_TXDMAConfig(UART_TypeDef * UARTx,u32 TxDmaBurstSize)90 UART_TXDMAConfig(UART_TypeDef* UARTx, u32 TxDmaBurstSize)
91 {
92 u32 TempMiscr;
93
94 /* Set UART TX DMA burst size.*/
95 TempMiscr = UARTx->MISCR;
96 TempMiscr &= ~(RUART_TXDMA_BURSTSIZE_MASK);
97 TempMiscr |= ((TxDmaBurstSize << 3) & RUART_TXDMA_BURSTSIZE_MASK);
98
99 UARTx->MISCR = TempMiscr;
100 }
101
102 /**
103 * @brief configure UART RX DMA burst size .
104 * @param UARTx: where x can be 0/1/3.
105 * @param RxDmaBurstSize: UART RX DMA burst size.
106 * @note Because UART rx fifo depth is 16 in hardare.
107 * Therefore this value must be no more than 16.
108 * @retval None
109 */
110 void
UART_RXDMAConfig(UART_TypeDef * UARTx,u32 RxDmaBurstSize)111 UART_RXDMAConfig(UART_TypeDef* UARTx, u32 RxDmaBurstSize)
112 {
113 u32 TempMiscr;
114
115 /* Set UART Rx DMA burst size */
116 TempMiscr = UARTx->MISCR;
117 TempMiscr &= ~(RUART_RXDMA_BURSTSIZE_MASK);
118 TempMiscr |= ((RxDmaBurstSize << 8) & RUART_RXDMA_BURSTSIZE_MASK);
119
120 UARTx->MISCR = TempMiscr;
121 }
122
123 /**
124 * @brief enable or disable UART TX DMA .
125 * @param UARTx: where x can be 0/1/3.
126 * @param NewState: the new state of UART TX DMA.
127 * This parameter can be: ENABLE or DISABLE.
128 * @retval None
129 */
130 void
UART_TXDMACmd(UART_TypeDef * UARTx,u32 NewState)131 UART_TXDMACmd(UART_TypeDef* UARTx, u32 NewState)
132 {
133 if(NewState != DISABLE ){
134 /* enable the UART TX DMA */
135 UARTx->MISCR |= RUART_TXDMA_ENABLE;
136 } else {
137 /* disable the UART TX DMA */
138 UARTx->MISCR &= (~ RUART_TXDMA_ENABLE);
139 }
140 }
141
142 /**
143 * @brief enable or disable UART RX DMA .
144 * @param UARTx: where x can be 0/1/3.
145 * @param NewState: the new state of UART RX DMA.
146 * This parameter can be: ENABLE or DISABLE.
147 * @retval None
148 */
149 void
UART_RXDMACmd(UART_TypeDef * UARTx,u32 NewState)150 UART_RXDMACmd(UART_TypeDef* UARTx, u32 NewState)
151 {
152 if(NewState != DISABLE ){
153 /* enable the UART RX DMA */
154 UARTx->MISCR |= RUART_RXDMA_ENABLE;
155 } else {
156 /* disable the UART RX DMA */
157 UARTx->MISCR &= (~ RUART_RXDMA_ENABLE);
158 }
159 }
160
161 /**
162 * @brief Init and Enable UART TX GDMA.
163 * @param UartIndex: 0/1/3.
164 * @param GDMA_InitStruct: pointer to a GDMA_InitTypeDef structure that contains
165 * the configuration information for the GDMA peripheral.
166 * @param CallbackData: GDMA callback data.
167 * @param CallbackFunc: GDMA callback function.
168 * @param pTxBuf: Tx Buffer.
169 * @param TxCount: Tx Count.
170 * @retval TRUE/FLASE
171 */
UART_TXGDMA_Init(u8 UartIndex,GDMA_InitTypeDef * GDMA_InitStruct,void * CallbackData,IRQ_FUN CallbackFunc,u8 * pTxBuf,int TxCount)172 BOOL UART_TXGDMA_Init(
173 u8 UartIndex,
174 GDMA_InitTypeDef *GDMA_InitStruct,
175 void *CallbackData,
176 IRQ_FUN CallbackFunc,
177 u8 *pTxBuf,
178 int TxCount
179 )
180 {
181 u8 GdmaChnl;
182
183 assert_param(GDMA_InitStruct != NULL);
184
185 GdmaChnl = GDMA_ChnlAlloc(0, (IRQ_FUN)CallbackFunc, (u32)CallbackData, 12);//ACUT is 0x10, BCUT is 12
186 if (GdmaChnl == 0xFF) {
187 /* No Available DMA channel */
188 return _FALSE;
189 }
190
191 _memset((void *)GDMA_InitStruct, 0, sizeof(GDMA_InitTypeDef));
192
193 GDMA_InitStruct->MuliBlockCunt = 0;
194 GDMA_InitStruct->MaxMuliBlock = 1;
195
196 GDMA_InitStruct->GDMA_DIR = TTFCMemToPeri;
197 GDMA_InitStruct->GDMA_DstHandshakeInterface = UART_DEV_TABLE[UartIndex].Tx_HandshakeInterface;
198 GDMA_InitStruct->GDMA_DstAddr = (u32)&UART_DEV_TABLE[UartIndex].UARTx->RB_THR;
199 GDMA_InitStruct->GDMA_Index = 0;
200 GDMA_InitStruct->GDMA_ChNum = GdmaChnl;
201 GDMA_InitStruct->GDMA_IsrType = (BlockType|TransferType|ErrType);
202
203 GDMA_InitStruct->GDMA_DstMsize = MsizeFour;
204 GDMA_InitStruct->GDMA_DstDataWidth = TrWidthOneByte;
205 GDMA_InitStruct->GDMA_DstInc = NoChange;
206 GDMA_InitStruct->GDMA_SrcInc = IncType;
207
208 if (((TxCount & 0x03)==0) && (((u32)(pTxBuf) & 0x03)==0)) {
209 /* 4-bytes aligned, move 4 bytes each transfer */
210 GDMA_InitStruct->GDMA_SrcMsize = MsizeOne;
211 GDMA_InitStruct->GDMA_SrcDataWidth = TrWidthFourBytes;
212 GDMA_InitStruct->GDMA_BlockSize = TxCount >> 2;
213 } else {
214 /* move 1 byte each transfer */
215 GDMA_InitStruct->GDMA_SrcMsize = MsizeFour;
216 GDMA_InitStruct->GDMA_SrcDataWidth = TrWidthOneByte;
217 GDMA_InitStruct->GDMA_BlockSize = TxCount;
218 }
219
220 assert_param(GDMA_InitStruct->GDMA_BlockSize <= 4096);
221
222 GDMA_InitStruct->GDMA_SrcAddr = (u32)(pTxBuf);
223
224 GDMA_Init(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, GDMA_InitStruct);
225 GDMA_Cmd(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, ENABLE);
226
227 return _TRUE;
228 }
229
230 /**
231 * @brief Init and Enable UART RX GDMA.
232 * @param UartIndex:0/1/3.
233 * @param GDMA_InitStruct: pointer to a GDMA_InitTypeDef structure that contains
234 * the configuration information for the GDMA peripheral.
235 * @param CallbackData: GDMA callback data.
236 * @param CallbackFunc: GDMA callback function.
237 * @param pRxBuf: Rx Buffer.
238 * @param RxCount: Rx Count, 0 will use UART as DMA controller.
239 * @retval TRUE/FLASE
240 */
UART_RXGDMA_Init(u8 UartIndex,GDMA_InitTypeDef * GDMA_InitStruct,void * CallbackData,IRQ_FUN CallbackFunc,u8 * pRxBuf,int RxCount)241 BOOL UART_RXGDMA_Init(
242 u8 UartIndex,
243 GDMA_InitTypeDef *GDMA_InitStruct,
244 void *CallbackData,
245 IRQ_FUN CallbackFunc,
246 u8 *pRxBuf,
247 int RxCount
248 )
249 {
250 u8 GdmaChnl;
251 UART_TypeDef* UARTx;
252
253 assert_param(GDMA_InitStruct != NULL);
254
255 GdmaChnl = GDMA_ChnlAlloc(0, (IRQ_FUN)CallbackFunc, (u32)CallbackData, 12);
256 if (GdmaChnl == 0xFF) {
257 /* No Available DMA channel */
258 return _FALSE;
259 }
260
261 _memset((void *)GDMA_InitStruct, 0, sizeof(GDMA_InitTypeDef));
262
263 UARTx = UART_DEV_TABLE[UartIndex].UARTx;
264 if(RxCount == 0) {
265 /*if length is 0, configure uart as the flow controller*/
266 GDMA_InitStruct->GDMA_DIR = TTFCPeriToMem_PerCtrl;
267 UARTx->MISCR |= RUART_RXDMA_OWNER;
268 } else {
269 /*if length is 0, configure GDMA as the flow controller*/
270 GDMA_InitStruct->GDMA_DIR = TTFCPeriToMem;
271 UARTx->MISCR &= (~RUART_RXDMA_OWNER);
272 }
273
274 GDMA_InitStruct->GDMA_ReloadSrc = 0;
275 GDMA_InitStruct->GDMA_SrcHandshakeInterface = UART_DEV_TABLE[UartIndex].Rx_HandshakeInterface;
276 GDMA_InitStruct->GDMA_SrcAddr = (u32)&UART_DEV_TABLE[UartIndex].UARTx->RB_THR;
277 GDMA_InitStruct->GDMA_Index = 0;
278 GDMA_InitStruct->GDMA_ChNum = GdmaChnl;
279 GDMA_InitStruct->GDMA_IsrType = (BlockType|TransferType|ErrType);
280 GDMA_InitStruct->GDMA_SrcMsize = MsizeFour;
281 GDMA_InitStruct->GDMA_SrcDataWidth = TrWidthOneByte;
282 GDMA_InitStruct->GDMA_DstInc = IncType;
283 GDMA_InitStruct->GDMA_SrcInc = NoChange;
284
285 if (((u32)(pRxBuf) & 0x03)==0) {
286 /* 4-bytes aligned, move 4 bytes each DMA transaction */
287 GDMA_InitStruct->GDMA_DstMsize = MsizeOne;
288 GDMA_InitStruct->GDMA_DstDataWidth = TrWidthFourBytes;
289 } else {
290 /* move 1 byte each DMA transaction */
291 GDMA_InitStruct->GDMA_DstMsize = MsizeFour;
292 GDMA_InitStruct->GDMA_DstDataWidth = TrWidthOneByte;
293 }
294 GDMA_InitStruct->GDMA_BlockSize = RxCount;
295 GDMA_InitStruct->GDMA_DstAddr = (u32)(pRxBuf);
296
297 assert_param(GDMA_InitStruct->GDMA_BlockSize <= 4096);
298
299 /* multi block close */
300 GDMA_InitStruct->MuliBlockCunt = 0;
301 GDMA_InitStruct->GDMA_ReloadSrc = 0;
302 GDMA_InitStruct->MaxMuliBlock = 1;
303
304 GDMA_Init(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, GDMA_InitStruct);
305 GDMA_Cmd(GDMA_InitStruct->GDMA_Index, GDMA_InitStruct->GDMA_ChNum, ENABLE);
306
307 return _TRUE;
308 }
309
310 /**
311 * @brief configure uart monitor parameters.
312 * @param BitNumThres: Configure bit number threshold of one monitor period.
313 * @param OscPerbitUpdCtrl: the OSC cycnum_perbit update bit(can be ENABLE or DISABLE).
314 * @retval None
315 */
UART_MonitorParaConfig(UART_TypeDef * UARTx,u32 BitNumThres,u32 OscPerbitUpdCtrl)316 void UART_MonitorParaConfig(UART_TypeDef* UARTx, u32 BitNumThres, u32 OscPerbitUpdCtrl)
317 {
318 u32 RegValue = 0;
319
320 /*check the parameters*/
321 assert_param((BitNumThres>0) && (BitNumThres<128));
322
323 /* Step 1: Reset Low Power Rx Path */
324 UARTx->RX_PATH &= ~RUART_REG_LP_RX_PATH_RESET;
325
326 RegValue = UARTx->MON_BAUD_CTRL;
327
328 /*step 2: Configure bit number threshold of one monitor period.*/
329 RegValue &= (~ RUART_LP_RX_BIT_NUM_THRES);
330 RegValue |= ((BitNumThres << 1) & RUART_LP_RX_BIT_NUM_THRES);
331
332 /*step 3: Configure the OSC cycnum_perbit update bit (REG_MON_BAUD_CTRL[29])*/
333 if(OscPerbitUpdCtrl != DISABLE){
334 /*enable OSC cycnum_perbit update*/
335 RegValue |= RUART_LP_RX_OSC_UPD_IN_XTAL;
336 } else {
337 /*disable OSC cycnum_perbit update*/
338 RegValue &= ~ RUART_LP_RX_OSC_UPD_IN_XTAL;
339 }
340 UARTx->MON_BAUD_CTRL = RegValue;
341 }
342
343 /**
344 * @brief set uart baud rate of low power rx path
345 * @param UARTx: where x can be 0/1/3.
346 * @param BaudRate: the desired baud rate
347 * @param RxIPClockHz: the uart rx clock. unit: [Hz]
348 * @note according to the baud rate calculation formlula in low power rx path, method
349 * implemented is as follows:
350 * - CycPerbit = round( fpclock/BaudRate)
351 * @retval None
352 */
353 void
UART_LPRxBaudSet(UART_TypeDef * UARTx,u32 BaudRate,u32 RxIPClockHz)354 UART_LPRxBaudSet(UART_TypeDef* UARTx, u32 BaudRate, u32 RxIPClockHz)
355 {
356 u32 CycPerbit = 0;
357 u32 RegValue = 0;
358 u32 RegOscBaud = 0;
359
360 /*check the parameters*/
361 assert_param((BaudRate > 0 && BaudRate <= 500000));
362
363 /*Calculate the r_cycnum_perbit field of REG_ MON_BAUD_STS,
364 according to clock and the desired baud rate*/
365 if((RxIPClockHz % BaudRate) >= (BaudRate + 1) / 2){
366 CycPerbit = RxIPClockHz / BaudRate + 1;
367 } else {
368 CycPerbit = RxIPClockHz / BaudRate;
369 }
370
371 /* Average clock cycle number of one bit. MON_BAUD_STS[19:0] */
372 RegValue = UARTx->MON_BAUD_STS;
373 RegValue &= (~ RUART_LP_RX_XTAL_CYCNUM_PERBIT);
374 RegValue |= (CycPerbit & RUART_LP_RX_XTAL_CYCNUM_PERBIT);
375
376 /* set CycPerbit */
377 UARTx->MON_BAUD_STS = RegValue;
378
379 /* Average clock cycle number of one bit OSC. REG_MON_BAUD_CTRL[28:9] */
380 RegOscBaud = UARTx->MON_BAUD_CTRL;
381 RegOscBaud &= (~ RUART_LP_RX_OSC_CYCNUM_PERBIT);
382 RegOscBaud |= ((CycPerbit << 9) & RUART_LP_RX_OSC_CYCNUM_PERBIT);
383
384 /*set the OSC CycPerbit*/
385 UARTx->MON_BAUD_CTRL = RegOscBaud;
386
387 UARTx->RX_PATH &= (~RUART_REG_RX_XFACTOR_ADJ);
388 }
389
390 /**
391 * @brief enable or disable the monitor function in Low Power Rx Path( REG_MON_BAUD_CTRL[0] ).
392 * @param UARTx: where x can be 0/1/3.
393 * @param NewState: the new state of monitoring.
394 * This parameter can be: ENABLE or DISABLE.
395 * @retval None
396 */
397 void
UART_RxMonitorCmd(UART_TypeDef * UARTx,u32 NewState)398 UART_RxMonitorCmd(UART_TypeDef* UARTx, u32 NewState)
399 {
400 /* configure Low Power rx monitoring function*/
401 if(NewState != DISABLE ){
402 /* Function enable of monitoring rx baud */
403 UARTx->MON_BAUD_CTRL |= RUART_LP_RX_MON_ENABLE;
404 } else {
405 /* Function disable of monitoring rx baud */
406 UARTx->MON_BAUD_CTRL &= (~ RUART_LP_RX_MON_ENABLE);
407 }
408 }
409
410 /**
411 * @brief Get the Monitor Baud Rate control register value of the Low Power Rx Path.
412 * @param UARTx: where x can be 0/1/3.
413 * @note MON_BAUD_CTRL[28:9] field value is the monitor result under OSC 2M Hz Clock.
414 * @retval the value of the MON_BAUD_CTRL register
415 */
416 u32
UART_RxMonBaudCtrlRegGet(UART_TypeDef * UARTx)417 UART_RxMonBaudCtrlRegGet(UART_TypeDef* UARTx)
418 {
419 /*return the monitor baud rate control register value(MON_BAUD_CTRL)*/
420 return UARTx->MON_BAUD_CTRL;
421 }
422
423 /**
424 * @brief Get the status of the Low Power Rx Monitoring.
425 * @param UARTx: where x can be 0/1/3.
426 * @note Read this register can clear the monitor interrupt status.
427 * Besides,REG_MON_BAUD_STS[19:0] field value is the monitor
428 * result under XTAL 2M Hz Clock.
429 * @retval the value of the REG_MON_BAUD_STS register
430 */
431 u32
UART_RxMonitorSatusGet(UART_TypeDef * UARTx)432 UART_RxMonitorSatusGet(UART_TypeDef* UARTx)
433 {
434 /*return the monitor status register value*/
435 return UARTx->MON_BAUD_STS;
436 }
437
438 /**
439 * @brief Fills each IrDA_InitStruct member with its default value.
440 * @param IrDA_InitStruct : pointer to a IrDA_InitTypeDef
441 * structure which will be initialized.
442 * @retval None
443 */
444 void
UART_IrDAStructInit(IrDA_InitTypeDef * IrDA_InitStruct)445 UART_IrDAStructInit(IrDA_InitTypeDef * IrDA_InitStruct)
446 {
447 /* Set the default value */
448 IrDA_InitStruct->UART_IrDARxInv = DISABLE;
449 IrDA_InitStruct->UART_IrDATxInv = DISABLE;
450 IrDA_InitStruct->UART_LowShift = UART_IRDA_PULSE_LEFT_SHIFT;
451 IrDA_InitStruct->UART_LowShiftVal = 0;
452 IrDA_InitStruct->UART_UpperShift = UART_IRDA_PULSE_LEFT_SHIFT;
453 IrDA_InitStruct->UART_UpperShiftVal = 0;
454 IrDA_InitStruct->UART_RxFilterCmd = ENABLE;
455 IrDA_InitStruct->UART_RxFilterThres = 7;
456 }
457
458 /**
459 * @brief Configures the UART's IrDA interface .
460 * @param UARTx: where x can be 0/1/3.
461 * @param IrDA_InitStruct: pointer to a IrDA_InitTypeDef structure that contains
462 * the configuration information for the IrDA module.
463 * @note the details of IrDA_InitStruct members are:
464 * @verbatim
465 * IrDA_InitStruct-> UART_IrDARxInv:
466 * IrDA Rx invert bit--------------------MISCR[14]
467 * ENABLE: invert irda rx
468 * DISABLE: not invert irda rx
469 *
470 * IrDA_InitStruct->UART_IrDATxInv:
471 * IrDA Tx invert bit---------------------MISCR[13]
472 * ENABLE: invert irda tx
473 * DISABLE: not invert irda tx
474 *
475 * IrDA_InitStruct->UART_UpperShift:
476 * Upperbound(right edge) Shift direction---TXPLSR[31]
477 * UART_IRDA_PULSE_LEFT_SHIFT: shift left
478 * UART_IRDA_PULSE_RIGHT_SHIFT: shift right
479 * IrDA_InitStruct->UpperShiftVal:
480 * Upperbound Shift value---------------TXPLSR[30:16]
481 *
482 * IrDA_InitStruct->UART_LowShift:
483 * Lowbound(left edge) Shift direction-----TXPLSR[15]
484 * UART_IRDA_PULSE_LEFT_SHIFT: shift left
485 * UART_IRDA_PULSE_RIGHT_SHIFT: shift right
486 * IrDA_InitStruct->UART_LowShiftVal:
487 * Lowbound Shift value----------------TXPLSR[14:0]
488 *
489 * IrDA_InitStruct->UART_RxFilterThres:
490 * IrDA RX filter threshold---------------RXPLSR[15:1]
491 *
492 * IrDA_InitStruct->UART_RxFilterCmd:
493 * IrDA RX filter enable or disable---------RXPLSR[0]
494 * ENABLE: enable IrDA rx filter
495 * DISABLE: disable IrDA rx filter
496 * @endverbatim
497 * @retval None
498 */
499 void
UART_IrDAInit(UART_TypeDef * UARTx,IrDA_InitTypeDef * IrDA_InitStruct)500 UART_IrDAInit(UART_TypeDef* UARTx, IrDA_InitTypeDef * IrDA_InitStruct)
501 {
502 u32 TempMiscr;
503 u32 TempTxpulse;
504 u32 TempRxPulse;
505
506 /* Check the parameters */
507 assert_param(IrDA_InitStruct->UART_UpperShiftVal <= 0x7fff );
508 assert_param(IrDA_InitStruct->UART_LowShiftVal <= 0x7fff);
509 assert_param(IS_IRDA_PUL_SHIFT(IrDA_InitStruct->UART_LowShift));
510 assert_param(IS_IRDA_PUL_SHIFT(IrDA_InitStruct->UART_UpperShift));
511 assert_param((IrDA_InitStruct->UART_RxFilterThres <= 0x7fff));
512
513 /*Get the MISCR register value*/
514 TempMiscr = UARTx->MISCR;
515
516 /*configure the IrDA RX invert bit*/
517 if(IrDA_InitStruct->UART_IrDARxInv != DISABLE){
518 /*invert the irda_rx_i*/
519 TempMiscr |= RUART_IRDA_RX_INVERT;
520 } else {
521 /*not invert the irda_rx_i*/
522 TempMiscr &= (~ RUART_IRDA_RX_INVERT);
523 }
524
525 /*configure the IrDA TX invert bit*/
526 if(IrDA_InitStruct->UART_IrDATxInv != DISABLE){
527 /*invert the irda_tx_o*/
528 TempMiscr |= RUART_IRDA_TX_INVERT;
529 } else {
530 /*not invert the irda_tx_o*/
531 TempMiscr &= (~ RUART_IRDA_TX_INVERT);
532 }
533 UARTx->MISCR = TempMiscr;
534
535 /*Get the TXPLSR register value*/
536 TempTxpulse = UARTx->TXPLSR;
537
538 /*configure IrDA SIR TX Pulse Width*/
539 /*configure Upperbound(right edge) shift direction*/
540 TempTxpulse &= (~ RUART_IRDA_TX_PUL_UP_BUND_SHIFT);
541 TempTxpulse |= (IrDA_InitStruct->UART_UpperShift << 31);
542
543 /*configure the Upperbound shift value*/
544 TempTxpulse &= (~ RUART_IRDA_TX_PUL_UP_BUND_VAL);
545 TempTxpulse |= (IrDA_InitStruct->UART_UpperShiftVal << 16);
546
547 /*configure Lowbound(left edge) shift direction*/
548 TempTxpulse &= (~ RUART_IRDA_TX_PUL_LOW_BUND_SHIFT);
549 TempTxpulse |= (IrDA_InitStruct->UART_LowShift << 15);
550
551 /*configure the Lowbound shift value*/
552 TempTxpulse &= (~ RUART_IRDA_TX_PUL_LOW_BUND_VAL);
553 TempTxpulse |= (IrDA_InitStruct->UART_LowShiftVal);
554
555 UARTx->TXPLSR = TempTxpulse;
556
557 /*Get the RXPLSR register value*/
558 TempRxPulse = UARTx->RXPLSR;
559
560 /*configure IrDA RX filter threshold*/
561 TempRxPulse &= (~ RUART_IRDA_RX_FILTER_THRES);
562 TempRxPulse |= (IrDA_InitStruct->UART_RxFilterThres << 1);
563
564 if(IrDA_InitStruct->UART_RxFilterCmd != DISABLE){
565 /*enable IrDA rx filter*/
566 TempRxPulse |= RUART_IRDA_RX_FILTER_ENABLE;
567 } else {
568 /*disable IrDA rx filter*/
569 TempRxPulse &= (~ RUART_IRDA_RX_FILTER_ENABLE);
570 }
571
572 UARTx->RXPLSR = TempRxPulse;
573 }
574
575 /**
576 * @brief enable or disable the IrDA function.
577 * @param UARTx: where x can be 0/1/3.
578 * @param NewState: the new state of the IrDA.
579 * This parameter can be: ENABLE or DISABLE.
580 * @retval None
581 */
582 void
UART_IrDACmd(UART_TypeDef * UARTx,u32 NewState)583 UART_IrDACmd(UART_TypeDef* UARTx, u32 NewState)
584 {
585 if(NewState != DISABLE ){
586 /* enable the IrDA */
587 UARTx->MISCR |= RUART_IRDA_ENABLE;
588 } else {
589 /* disable the IrDA */
590 UARTx->MISCR &= (~ RUART_IRDA_ENABLE);
591 }
592 }
593 /******************* (C) COPYRIGHT 2016 Realtek Semiconductor *****END OF FILE****/
594