1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries. 3 * Microchip VCAP API 4 */ 5 6 /* This file is autogenerated by cml-utils 2023-02-10 11:15:56 +0100. 7 * Commit ID: c30fb4bf0281cd4a7133bdab6682f9e43c872ada 8 */ 9 10 #ifndef __VCAP_AG_API__ 11 #define __VCAP_AG_API__ 12 13 enum vcap_type { 14 VCAP_TYPE_ES0, 15 VCAP_TYPE_ES2, 16 VCAP_TYPE_IS0, 17 VCAP_TYPE_IS2, 18 VCAP_TYPE_MAX 19 }; 20 21 /* Keyfieldset names with origin information */ 22 enum vcap_keyfield_set { 23 VCAP_KFS_NO_VALUE, /* initial value */ 24 VCAP_KFS_ARP, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 25 VCAP_KFS_ETAG, /* sparx5 is0 X2 */ 26 VCAP_KFS_IP4_OTHER, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 27 VCAP_KFS_IP4_TCP_UDP, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 28 VCAP_KFS_IP4_VID, /* sparx5 es2 X3 */ 29 VCAP_KFS_IP6_OTHER, /* lan966x is2 X4 */ 30 VCAP_KFS_IP6_STD, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 31 VCAP_KFS_IP6_TCP_UDP, /* lan966x is2 X4 */ 32 VCAP_KFS_IP6_VID, /* sparx5 es2 X6 */ 33 VCAP_KFS_IP_7TUPLE, /* sparx5 is2 X12, sparx5 es2 X12 */ 34 VCAP_KFS_ISDX, /* sparx5 es0 X1 */ 35 VCAP_KFS_LL_FULL, /* sparx5 is0 X6 */ 36 VCAP_KFS_MAC_ETYPE, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 37 VCAP_KFS_MAC_LLC, /* lan966x is2 X2 */ 38 VCAP_KFS_MAC_SNAP, /* lan966x is2 X2 */ 39 VCAP_KFS_NORMAL_5TUPLE_IP4, /* sparx5 is0 X6 */ 40 VCAP_KFS_NORMAL_7TUPLE, /* sparx5 is0 X12 */ 41 VCAP_KFS_OAM, /* lan966x is2 X2 */ 42 VCAP_KFS_PURE_5TUPLE_IP4, /* sparx5 is0 X3 */ 43 VCAP_KFS_SMAC_SIP4, /* lan966x is2 X1 */ 44 VCAP_KFS_SMAC_SIP6, /* lan966x is2 X2 */ 45 }; 46 47 /* List of keyfields with description 48 * 49 * Keys ending in _IS are booleans derived from frame data 50 * Keys ending in _CLS are classified frame data 51 * 52 * VCAP_KF_8021BR_ECID_BASE: W12, sparx5: is0 53 * Used by 802.1BR Bridge Port Extension in an E-Tag 54 * VCAP_KF_8021BR_ECID_EXT: W8, sparx5: is0 55 * Used by 802.1BR Bridge Port Extension in an E-Tag 56 * VCAP_KF_8021BR_E_TAGGED: W1, sparx5: is0 57 * Set for frames containing an E-TAG (802.1BR Ethertype 893f) 58 * VCAP_KF_8021BR_GRP: W2, sparx5: is0 59 * E-Tag group bits in 802.1BR Bridge Port Extension 60 * VCAP_KF_8021BR_IGR_ECID_BASE: W12, sparx5: is0 61 * Used by 802.1BR Bridge Port Extension in an E-Tag 62 * VCAP_KF_8021BR_IGR_ECID_EXT: W8, sparx5: is0 63 * Used by 802.1BR Bridge Port Extension in an E-Tag 64 * VCAP_KF_8021Q_DEI0: W1, sparx5: is0 65 * First DEI in multiple vlan tags (outer tag or default port tag) 66 * VCAP_KF_8021Q_DEI1: W1, sparx5: is0 67 * Second DEI in multiple vlan tags (inner tag) 68 * VCAP_KF_8021Q_DEI2: W1, sparx5: is0 69 * Third DEI in multiple vlan tags (not always available) 70 * VCAP_KF_8021Q_DEI_CLS: W1, sparx5: is2/es2, lan966x: is2 71 * Classified DEI 72 * VCAP_KF_8021Q_PCP0: W3, sparx5: is0 73 * First PCP in multiple vlan tags (outer tag or default port tag) 74 * VCAP_KF_8021Q_PCP1: W3, sparx5: is0 75 * Second PCP in multiple vlan tags (inner tag) 76 * VCAP_KF_8021Q_PCP2: W3, sparx5: is0 77 * Third PCP in multiple vlan tags (not always available) 78 * VCAP_KF_8021Q_PCP_CLS: W3, sparx5: is2/es2, lan966x: is2 79 * Classified PCP 80 * VCAP_KF_8021Q_TPID: W3, sparx5: es0 81 * TPID for outer tag: 0: Customer TPID 1: Service TPID (88A8 or programmable) 82 * VCAP_KF_8021Q_TPID0: W3, sparx5: is0 83 * First TPIC in multiple vlan tags (outer tag or default port tag) 84 * VCAP_KF_8021Q_TPID1: W3, sparx5: is0 85 * Second TPID in multiple vlan tags (inner tag) 86 * VCAP_KF_8021Q_TPID2: W3, sparx5: is0 87 * Third TPID in multiple vlan tags (not always available) 88 * VCAP_KF_8021Q_VID0: W12, sparx5: is0 89 * First VID in multiple vlan tags (outer tag or default port tag) 90 * VCAP_KF_8021Q_VID1: W12, sparx5: is0 91 * Second VID in multiple vlan tags (inner tag) 92 * VCAP_KF_8021Q_VID2: W12, sparx5: is0 93 * Third VID in multiple vlan tags (not always available) 94 * VCAP_KF_8021Q_VID_CLS: sparx5 is2 W13, sparx5 es0 W13, sparx5 es2 W13, 95 * lan966x is2 W12 96 * Classified VID 97 * VCAP_KF_8021Q_VLAN_TAGGED_IS: W1, sparx5: is2/es2, lan966x: is2 98 * Sparx5: Set if frame was received with a VLAN tag, LAN966x: Set if frame has 99 * one or more Q-tags. Independent of port VLAN awareness 100 * VCAP_KF_8021Q_VLAN_TAGS: W3, sparx5: is0 101 * Number of VLAN tags in frame: 0: Untagged, 1: Single tagged, 3: Double 102 * tagged, 7: Triple tagged 103 * VCAP_KF_ACL_GRP_ID: W8, sparx5: es2 104 * Used in interface map table 105 * VCAP_KF_ARP_ADDR_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2 106 * Set if hardware address is Ethernet 107 * VCAP_KF_ARP_LEN_OK_IS: W1, sparx5: is2/es2, lan966x: is2 108 * Set if hardware address length = 6 (Ethernet) and IP address length = 4 (IP). 109 * VCAP_KF_ARP_OPCODE: W2, sparx5: is2/es2, lan966x: is2 110 * ARP opcode 111 * VCAP_KF_ARP_OPCODE_UNKNOWN_IS: W1, sparx5: is2/es2, lan966x: is2 112 * Set if not one of the codes defined in VCAP_KF_ARP_OPCODE 113 * VCAP_KF_ARP_PROTO_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2 114 * Set if protocol address space is 0x0800 115 * VCAP_KF_ARP_SENDER_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2 116 * Sender Hardware Address = SMAC (ARP) 117 * VCAP_KF_ARP_TGT_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2 118 * Target Hardware Address = SMAC (RARP) 119 * VCAP_KF_COSID_CLS: W3, sparx5: es0/es2 120 * Class of service 121 * VCAP_KF_ES0_ISDX_KEY_ENA: W1, sparx5: es2 122 * The value taken from the IFH .FWD.ES0_ISDX_KEY_ENA 123 * VCAP_KF_ETYPE: W16, sparx5: is0/is2/es2, lan966x: is2 124 * Ethernet type 125 * VCAP_KF_ETYPE_LEN_IS: W1, sparx5: is0/is2/es2 126 * Set if frame has EtherType >= 0x600 127 * VCAP_KF_HOST_MATCH: W1, lan966x: is2 128 * The action from the SMAC_SIP4 or SMAC_SIP6 lookups. Used for IP source 129 * guarding. 130 * VCAP_KF_IF_EGR_PORT_MASK: W32, sparx5: es2 131 * Egress port mask, one bit per port 132 * VCAP_KF_IF_EGR_PORT_MASK_RNG: W3, sparx5: es2 133 * Select which 32 port group is available in IF_EGR_PORT (or virtual ports or 134 * CPU queue) 135 * VCAP_KF_IF_EGR_PORT_NO: W7, sparx5: es0 136 * Egress port number 137 * VCAP_KF_IF_IGR_PORT: sparx5 is0 W7, sparx5 es2 W9, lan966x is2 W4 138 * Sparx5: Logical ingress port number retrieved from 139 * ANA_CL::PORT_ID_CFG.LPORT_NUM or ERLEG, LAN966x: ingress port nunmber 140 * VCAP_KF_IF_IGR_PORT_MASK: sparx5 is0 W65, sparx5 is2 W32, sparx5 is2 W65, 141 * lan966x is2 W9 142 * Ingress port mask, one bit per port/erleg 143 * VCAP_KF_IF_IGR_PORT_MASK_L3: W1, sparx5: is2 144 * If set, IF_IGR_PORT_MASK, IF_IGR_PORT_MASK_RNG, and IF_IGR_PORT_MASK_SEL are 145 * used to specify L3 interfaces 146 * VCAP_KF_IF_IGR_PORT_MASK_RNG: W4, sparx5: is2 147 * Range selector for IF_IGR_PORT_MASK. Specifies which group of 32 ports are 148 * available in IF_IGR_PORT_MASK 149 * VCAP_KF_IF_IGR_PORT_MASK_SEL: W2, sparx5: is0/is2 150 * Mode selector for IF_IGR_PORT_MASK, applicable when IF_IGR_PORT_MASK_L3 == 0. 151 * Mapping: 0: DEFAULT 1: LOOPBACK 2: MASQUERADE 3: CPU_VD 152 * VCAP_KF_IF_IGR_PORT_SEL: W1, sparx5: es2 153 * Selector for IF_IGR_PORT: physical port number or ERLEG 154 * VCAP_KF_IP4_IS: W1, sparx5: is0/is2/es2, lan966x: is2 155 * Set if frame has EtherType = 0x800 and IP version = 4 156 * VCAP_KF_IP_MC_IS: W1, sparx5: is0 157 * Set if frame is IPv4 frame and frame's destination MAC address is an IPv4 158 * multicast address (0x01005E0 /25). Set if frame is IPv6 frame and frame's 159 * destination MAC address is an IPv6 multicast address (0x3333/16). 160 * VCAP_KF_IP_PAYLOAD_5TUPLE: W32, sparx5: is0 161 * Payload bytes after IP header 162 * VCAP_KF_IP_SNAP_IS: W1, sparx5: is0 163 * Set if frame is IPv4, IPv6, or SNAP frame 164 * VCAP_KF_ISDX_CLS: W12, sparx5: is2/es0/es2 165 * Classified ISDX 166 * VCAP_KF_ISDX_GT0_IS: W1, sparx5: is2/es0/es2, lan966x: is2 167 * Set if classified ISDX > 0 168 * VCAP_KF_L2_BC_IS: W1, sparx5: is0/is2/es2, lan966x: is2 169 * Set if frame's destination MAC address is the broadcast address 170 * (FF-FF-FF-FF-FF-FF). 171 * VCAP_KF_L2_DMAC: W48, sparx5: is0/is2/es2, lan966x: is2 172 * Destination MAC address 173 * VCAP_KF_L2_FRM_TYPE: W4, lan966x: is2 174 * Frame subtype for specific EtherTypes (MRP, DLR) 175 * VCAP_KF_L2_FWD_IS: W1, sparx5: is2 176 * Set if the frame is allowed to be forwarded to front ports 177 * VCAP_KF_L2_LLC: W40, lan966x: is2 178 * LLC header and data after up to two VLAN tags and the type/length field 179 * VCAP_KF_L2_MC_IS: W1, sparx5: is0/is2/es2, lan966x: is2 180 * Set if frame's destination MAC address is a multicast address (bit 40 = 1). 181 * VCAP_KF_L2_PAYLOAD0: W16, lan966x: is2 182 * Payload bytes 0-1 after the frame's EtherType 183 * VCAP_KF_L2_PAYLOAD1: W8, lan966x: is2 184 * Payload byte 4 after the frame's EtherType. This is specifically for PTP 185 * frames. 186 * VCAP_KF_L2_PAYLOAD2: W3, lan966x: is2 187 * Bits 7, 2, and 1 from payload byte 6 after the frame's EtherType. This is 188 * specifically for PTP frames. 189 * VCAP_KF_L2_PAYLOAD_ETYPE: W64, sparx5: is2/es2 190 * Byte 0-7 of L2 payload after Type/Len field and overloading for OAM 191 * VCAP_KF_L2_SMAC: W48, sparx5: is0/is2/es2, lan966x: is2 192 * Source MAC address 193 * VCAP_KF_L2_SNAP: W40, lan966x: is2 194 * SNAP header after LLC header (AA-AA-03) 195 * VCAP_KF_L3_DIP_EQ_SIP_IS: W1, sparx5: is2/es2, lan966x: is2 196 * Set if Src IP matches Dst IP address 197 * VCAP_KF_L3_DPL_CLS: W1, sparx5: es0/es2 198 * The frames drop precedence level 199 * VCAP_KF_L3_DSCP: W6, sparx5: is0 200 * Frame's DSCP value 201 * VCAP_KF_L3_DST_IS: W1, sparx5: is2 202 * Set if lookup is done for egress router leg 203 * VCAP_KF_L3_FRAGMENT: W1, lan966x: is2 204 * Set if IPv4 frame is fragmented 205 * VCAP_KF_L3_FRAGMENT_TYPE: W2, sparx5: is0/is2/es2 206 * L3 Fragmentation type (none, initial, suspicious, valid follow up) 207 * VCAP_KF_L3_FRAG_INVLD_L4_LEN: W1, sparx5: is0/is2 208 * Set if frame's L4 length is less than ANA_CL:COMMON:CLM_FRAGMENT_CFG.L4_MIN_L 209 * EN 210 * VCAP_KF_L3_FRAG_OFS_GT0: W1, lan966x: is2 211 * Set if IPv4 frame is fragmented and it is not the first fragment 212 * VCAP_KF_L3_IP4_DIP: W32, sparx5: is0/is2/es2, lan966x: is2 213 * Destination IPv4 Address 214 * VCAP_KF_L3_IP4_SIP: W32, sparx5: is0/is2/es2, lan966x: is2 215 * Source IPv4 Address 216 * VCAP_KF_L3_IP6_DIP: W128, sparx5: is0/is2/es2, lan966x: is2 217 * Sparx5: Full IPv6 DIP, LAN966x: Either Full IPv6 DIP or a subset depending on 218 * frame type 219 * VCAP_KF_L3_IP6_SIP: W128, sparx5: is0/is2/es2, lan966x: is2 220 * Sparx5: Full IPv6 SIP, LAN966x: Either Full IPv6 SIP or a subset depending on 221 * frame type 222 * VCAP_KF_L3_IP_PROTO: W8, sparx5: is0/is2/es2, lan966x: is2 223 * IPv4 frames: IP protocol. IPv6 frames: Next header, same as for IPV4 224 * VCAP_KF_L3_OPTIONS_IS: W1, sparx5: is0/is2/es2, lan966x: is2 225 * Set if IPv4 frame contains options (IP len > 5) 226 * VCAP_KF_L3_PAYLOAD: sparx5 is2 W96, sparx5 is2 W40, sparx5 es2 W96, sparx5 227 * es2 W40, lan966x is2 W56 228 * Sparx5: Payload bytes after IP header. IPv4: IPv4 options are not parsed so 229 * payload is always taken 20 bytes after the start of the IPv4 header, LAN966x: 230 * Bytes 0-6 after IP header 231 * VCAP_KF_L3_RT_IS: W1, sparx5: is2/es2 232 * Set if frame has hit a router leg 233 * VCAP_KF_L3_TOS: W8, sparx5: is2/es2, lan966x: is2 234 * Sparx5: Frame's IPv4/IPv6 DSCP and ECN fields, LAN966x: IP TOS field 235 * VCAP_KF_L3_TTL_GT0: W1, sparx5: is2/es2, lan966x: is2 236 * Set if IPv4 TTL / IPv6 hop limit is greater than 0 237 * VCAP_KF_L4_1588_DOM: W8, lan966x: is2 238 * PTP over UDP: domainNumber 239 * VCAP_KF_L4_1588_VER: W4, lan966x: is2 240 * PTP over UDP: version 241 * VCAP_KF_L4_ACK: W1, sparx5: is2/es2, lan966x: is2 242 * Sparx5 and LAN966x: TCP flag ACK, LAN966x only: PTP over UDP: flagField bit 2 243 * (unicastFlag) 244 * VCAP_KF_L4_DPORT: W16, sparx5: is2/es2, lan966x: is2 245 * Sparx5: TCP/UDP destination port. Overloading for IP_7TUPLE: Non-TCP/UDP IP 246 * frames: L4_DPORT = L3_IP_PROTO, LAN966x: TCP/UDP destination port 247 * VCAP_KF_L4_FIN: W1, sparx5: is2/es2, lan966x: is2 248 * TCP flag FIN, LAN966x: TCP flag FIN, and for PTP over UDP: messageType bit 1 249 * VCAP_KF_L4_PAYLOAD: W64, sparx5: is2/es2 250 * Payload bytes after TCP/UDP header Overloading for IP_7TUPLE: Non TCP/UDP 251 * frames: Payload bytes 0-7 after IP header. IPv4 options are not parsed so 252 * payload is always taken 20 bytes after the start of the IPv4 header for non 253 * TCP/UDP IPv4 frames 254 * VCAP_KF_L4_PSH: W1, sparx5: is2/es2, lan966x: is2 255 * Sparx5: TCP flag PSH, LAN966x: TCP: TCP flag PSH. PTP over UDP: flagField bit 256 * 1 (twoStepFlag) 257 * VCAP_KF_L4_RNG: sparx5 is0 W8, sparx5 is2 W16, sparx5 es2 W16, lan966x is2 W8 258 * Range checker bitmask (one for each range checker). Input into range checkers 259 * is taken from classified results (VID, DSCP) and frame (SPORT, DPORT, ETYPE, 260 * outer VID, inner VID) 261 * VCAP_KF_L4_RST: W1, sparx5: is2/es2, lan966x: is2 262 * Sparx5: TCP flag RST , LAN966x: TCP: TCP flag RST. PTP over UDP: messageType 263 * bit 3 264 * VCAP_KF_L4_SEQUENCE_EQ0_IS: W1, sparx5: is2/es2, lan966x: is2 265 * Set if TCP sequence number is 0, LAN966x: Overlayed with PTP over UDP: 266 * messageType bit 0 267 * VCAP_KF_L4_SPORT: W16, sparx5: is0/is2/es2, lan966x: is2 268 * TCP/UDP source port 269 * VCAP_KF_L4_SPORT_EQ_DPORT_IS: W1, sparx5: is2/es2, lan966x: is2 270 * Set if UDP or TCP source port equals UDP or TCP destination port 271 * VCAP_KF_L4_SYN: W1, sparx5: is2/es2, lan966x: is2 272 * Sparx5: TCP flag SYN, LAN966x: TCP: TCP flag SYN. PTP over UDP: messageType 273 * bit 2 274 * VCAP_KF_L4_URG: W1, sparx5: is2/es2, lan966x: is2 275 * Sparx5: TCP flag URG, LAN966x: TCP: TCP flag URG. PTP over UDP: flagField bit 276 * 7 (reserved) 277 * VCAP_KF_LOOKUP_FIRST_IS: W1, sparx5: is0/is2/es2, lan966x: is2 278 * Selects between entries relevant for first and second lookup. Set for first 279 * lookup, cleared for second lookup. 280 * VCAP_KF_LOOKUP_GEN_IDX: W12, sparx5: is0 281 * Generic index - for chaining CLM instances 282 * VCAP_KF_LOOKUP_GEN_IDX_SEL: W2, sparx5: is0 283 * Select the mode of the Generic Index 284 * VCAP_KF_LOOKUP_PAG: W8, sparx5: is2, lan966x: is2 285 * Classified Policy Association Group: chains rules from IS1/CLM to IS2 286 * VCAP_KF_MIRROR_PROBE: W2, sparx5: es2 287 * Identifies frame copies generated as a result of mirroring 288 * VCAP_KF_OAM_CCM_CNTS_EQ0: W1, sparx5: is2/es2, lan966x: is2 289 * Dual-ended loss measurement counters in CCM frames are all zero 290 * VCAP_KF_OAM_DETECTED: W1, lan966x: is2 291 * This is missing in the datasheet, but present in the OAM keyset in XML 292 * VCAP_KF_OAM_FLAGS: W8, lan966x: is2 293 * Frame's OAM flags 294 * VCAP_KF_OAM_MEL_FLAGS: W7, lan966x: is2 295 * Encoding of MD level/MEG level (MEL) 296 * VCAP_KF_OAM_MEPID: W16, lan966x: is2 297 * CCM frame's OAM MEP ID 298 * VCAP_KF_OAM_OPCODE: W8, lan966x: is2 299 * Frame's OAM opcode 300 * VCAP_KF_OAM_VER: W5, lan966x: is2 301 * Frame's OAM version 302 * VCAP_KF_OAM_Y1731_IS: W1, sparx5: is2/es2, lan966x: is2 303 * Set if frame's EtherType = 0x8902 304 * VCAP_KF_PROT_ACTIVE: W1, sparx5: es0/es2 305 * Protection is active 306 * VCAP_KF_TCP_IS: W1, sparx5: is0/is2/es2, lan966x: is2 307 * Set if frame is IPv4 TCP frame (IP protocol = 6) or IPv6 TCP frames (Next 308 * header = 6) 309 * VCAP_KF_TCP_UDP_IS: W1, sparx5: is0/is2/es2 310 * Set if frame is IPv4/IPv6 TCP or UDP frame (IP protocol/next header equals 6 311 * or 17) 312 * VCAP_KF_TYPE: sparx5 is0 W2, sparx5 is0 W1, sparx5 is2 W4, sparx5 is2 W2, 313 * sparx5 es0 W1, sparx5 es2 W3, lan966x is2 W4, lan966x is2 W2 314 * Keyset type id - set by the API 315 */ 316 317 /* Keyfield names */ 318 enum vcap_key_field { 319 VCAP_KF_NO_VALUE, /* initial value */ 320 VCAP_KF_8021BR_ECID_BASE, 321 VCAP_KF_8021BR_ECID_EXT, 322 VCAP_KF_8021BR_E_TAGGED, 323 VCAP_KF_8021BR_GRP, 324 VCAP_KF_8021BR_IGR_ECID_BASE, 325 VCAP_KF_8021BR_IGR_ECID_EXT, 326 VCAP_KF_8021Q_DEI0, 327 VCAP_KF_8021Q_DEI1, 328 VCAP_KF_8021Q_DEI2, 329 VCAP_KF_8021Q_DEI_CLS, 330 VCAP_KF_8021Q_PCP0, 331 VCAP_KF_8021Q_PCP1, 332 VCAP_KF_8021Q_PCP2, 333 VCAP_KF_8021Q_PCP_CLS, 334 VCAP_KF_8021Q_TPID, 335 VCAP_KF_8021Q_TPID0, 336 VCAP_KF_8021Q_TPID1, 337 VCAP_KF_8021Q_TPID2, 338 VCAP_KF_8021Q_VID0, 339 VCAP_KF_8021Q_VID1, 340 VCAP_KF_8021Q_VID2, 341 VCAP_KF_8021Q_VID_CLS, 342 VCAP_KF_8021Q_VLAN_TAGGED_IS, 343 VCAP_KF_8021Q_VLAN_TAGS, 344 VCAP_KF_ACL_GRP_ID, 345 VCAP_KF_ARP_ADDR_SPACE_OK_IS, 346 VCAP_KF_ARP_LEN_OK_IS, 347 VCAP_KF_ARP_OPCODE, 348 VCAP_KF_ARP_OPCODE_UNKNOWN_IS, 349 VCAP_KF_ARP_PROTO_SPACE_OK_IS, 350 VCAP_KF_ARP_SENDER_MATCH_IS, 351 VCAP_KF_ARP_TGT_MATCH_IS, 352 VCAP_KF_COSID_CLS, 353 VCAP_KF_ES0_ISDX_KEY_ENA, 354 VCAP_KF_ETYPE, 355 VCAP_KF_ETYPE_LEN_IS, 356 VCAP_KF_HOST_MATCH, 357 VCAP_KF_IF_EGR_PORT_MASK, 358 VCAP_KF_IF_EGR_PORT_MASK_RNG, 359 VCAP_KF_IF_EGR_PORT_NO, 360 VCAP_KF_IF_IGR_PORT, 361 VCAP_KF_IF_IGR_PORT_MASK, 362 VCAP_KF_IF_IGR_PORT_MASK_L3, 363 VCAP_KF_IF_IGR_PORT_MASK_RNG, 364 VCAP_KF_IF_IGR_PORT_MASK_SEL, 365 VCAP_KF_IF_IGR_PORT_SEL, 366 VCAP_KF_IP4_IS, 367 VCAP_KF_IP_MC_IS, 368 VCAP_KF_IP_PAYLOAD_5TUPLE, 369 VCAP_KF_IP_SNAP_IS, 370 VCAP_KF_ISDX_CLS, 371 VCAP_KF_ISDX_GT0_IS, 372 VCAP_KF_L2_BC_IS, 373 VCAP_KF_L2_DMAC, 374 VCAP_KF_L2_FRM_TYPE, 375 VCAP_KF_L2_FWD_IS, 376 VCAP_KF_L2_LLC, 377 VCAP_KF_L2_MC_IS, 378 VCAP_KF_L2_PAYLOAD0, 379 VCAP_KF_L2_PAYLOAD1, 380 VCAP_KF_L2_PAYLOAD2, 381 VCAP_KF_L2_PAYLOAD_ETYPE, 382 VCAP_KF_L2_SMAC, 383 VCAP_KF_L2_SNAP, 384 VCAP_KF_L3_DIP_EQ_SIP_IS, 385 VCAP_KF_L3_DPL_CLS, 386 VCAP_KF_L3_DSCP, 387 VCAP_KF_L3_DST_IS, 388 VCAP_KF_L3_FRAGMENT, 389 VCAP_KF_L3_FRAGMENT_TYPE, 390 VCAP_KF_L3_FRAG_INVLD_L4_LEN, 391 VCAP_KF_L3_FRAG_OFS_GT0, 392 VCAP_KF_L3_IP4_DIP, 393 VCAP_KF_L3_IP4_SIP, 394 VCAP_KF_L3_IP6_DIP, 395 VCAP_KF_L3_IP6_SIP, 396 VCAP_KF_L3_IP_PROTO, 397 VCAP_KF_L3_OPTIONS_IS, 398 VCAP_KF_L3_PAYLOAD, 399 VCAP_KF_L3_RT_IS, 400 VCAP_KF_L3_TOS, 401 VCAP_KF_L3_TTL_GT0, 402 VCAP_KF_L4_1588_DOM, 403 VCAP_KF_L4_1588_VER, 404 VCAP_KF_L4_ACK, 405 VCAP_KF_L4_DPORT, 406 VCAP_KF_L4_FIN, 407 VCAP_KF_L4_PAYLOAD, 408 VCAP_KF_L4_PSH, 409 VCAP_KF_L4_RNG, 410 VCAP_KF_L4_RST, 411 VCAP_KF_L4_SEQUENCE_EQ0_IS, 412 VCAP_KF_L4_SPORT, 413 VCAP_KF_L4_SPORT_EQ_DPORT_IS, 414 VCAP_KF_L4_SYN, 415 VCAP_KF_L4_URG, 416 VCAP_KF_LOOKUP_FIRST_IS, 417 VCAP_KF_LOOKUP_GEN_IDX, 418 VCAP_KF_LOOKUP_GEN_IDX_SEL, 419 VCAP_KF_LOOKUP_PAG, 420 VCAP_KF_MIRROR_PROBE, 421 VCAP_KF_OAM_CCM_CNTS_EQ0, 422 VCAP_KF_OAM_DETECTED, 423 VCAP_KF_OAM_FLAGS, 424 VCAP_KF_OAM_MEL_FLAGS, 425 VCAP_KF_OAM_MEPID, 426 VCAP_KF_OAM_OPCODE, 427 VCAP_KF_OAM_VER, 428 VCAP_KF_OAM_Y1731_IS, 429 VCAP_KF_PROT_ACTIVE, 430 VCAP_KF_TCP_IS, 431 VCAP_KF_TCP_UDP_IS, 432 VCAP_KF_TYPE, 433 }; 434 435 /* Actionset names with origin information */ 436 enum vcap_actionfield_set { 437 VCAP_AFS_NO_VALUE, /* initial value */ 438 VCAP_AFS_BASE_TYPE, /* sparx5 is2 X3, sparx5 es2 X3, lan966x is2 X2 */ 439 VCAP_AFS_CLASSIFICATION, /* sparx5 is0 X2 */ 440 VCAP_AFS_CLASS_REDUCED, /* sparx5 is0 X1 */ 441 VCAP_AFS_ES0, /* sparx5 es0 X1 */ 442 VCAP_AFS_FULL, /* sparx5 is0 X3 */ 443 VCAP_AFS_SMAC_SIP, /* lan966x is2 X1 */ 444 }; 445 446 /* List of actionfields with description 447 * 448 * VCAP_AF_ACL_ID: W6, lan966x: is2 449 * Logical ID for the entry. This ID is extracted together with the frame in the 450 * CPU extraction header. Only applicable to actions with CPU_COPY_ENA or 451 * HIT_ME_ONCE set. 452 * VCAP_AF_CLS_VID_SEL: W3, sparx5: is0 453 * Controls the classified VID: 0: VID_NONE: No action. 1: VID_ADD: New VID = 454 * old VID + VID_VAL. 2: VID_REPLACE: New VID = VID_VAL. 3: VID_FIRST_TAG: New 455 * VID = VID from frame's first tag (outer tag) if available, otherwise VID_VAL. 456 * 4: VID_SECOND_TAG: New VID = VID from frame's second tag (middle tag) if 457 * available, otherwise VID_VAL. 5: VID_THIRD_TAG: New VID = VID from frame's 458 * third tag (inner tag) if available, otherwise VID_VAL. 459 * VCAP_AF_CNT_ID: sparx5 is2 W12, sparx5 es2 W11 460 * Counter ID, used per lookup to index the 4K frame counters (ANA_ACL:CNT_TBL). 461 * Multiple VCAP IS2 entries can use the same counter. 462 * VCAP_AF_COPY_PORT_NUM: W7, sparx5: es2 463 * QSYS port number when FWD_MODE is redirect or copy 464 * VCAP_AF_COPY_QUEUE_NUM: W16, sparx5: es2 465 * QSYS queue number when FWD_MODE is redirect or copy 466 * VCAP_AF_CPU_COPY_ENA: W1, sparx5: is2/es2, lan966x: is2 467 * Setting this bit to 1 causes all frames that hit this action to be copied to 468 * the CPU extraction queue specified in CPU_QUEUE_NUM. 469 * VCAP_AF_CPU_QU: W3, sparx5: es0 470 * CPU extraction queue. Used when FWD_SEL >0 and PIPELINE_ACT = XTR. 471 * VCAP_AF_CPU_QUEUE_NUM: W3, sparx5: is2/es2, lan966x: is2 472 * CPU queue number. Used when CPU_COPY_ENA is set. 473 * VCAP_AF_DEI_A_VAL: W1, sparx5: es0 474 * DEI used in ES0 tag A. See TAG_A_DEI_SEL. 475 * VCAP_AF_DEI_B_VAL: W1, sparx5: es0 476 * DEI used in ES0 tag B. See TAG_B_DEI_SEL. 477 * VCAP_AF_DEI_C_VAL: W1, sparx5: es0 478 * DEI used in ES0 tag C. See TAG_C_DEI_SEL. 479 * VCAP_AF_DEI_ENA: W1, sparx5: is0 480 * If set, use DEI_VAL as classified DEI value. Otherwise, DEI from basic 481 * classification is used 482 * VCAP_AF_DEI_VAL: W1, sparx5: is0 483 * See DEI_ENA 484 * VCAP_AF_DP_ENA: W1, sparx5: is0 485 * If set, use DP_VAL as classified drop precedence level. Otherwise, drop 486 * precedence level from basic classification is used. 487 * VCAP_AF_DP_VAL: W2, sparx5: is0 488 * See DP_ENA. 489 * VCAP_AF_DSCP_ENA: W1, sparx5: is0 490 * If set, use DSCP_VAL as classified DSCP value. Otherwise, DSCP value from 491 * basic classification is used. 492 * VCAP_AF_DSCP_SEL: W3, sparx5: es0 493 * Selects source for DSCP. 0: Controlled by port configuration and IFH. 1: 494 * Classified DSCP via IFH. 2: DSCP_VAL. 3: Reserved. 4: Mapped using mapping 495 * table 0, otherwise use DSCP_VAL. 5: Mapped using mapping table 1, otherwise 496 * use mapping table 0. 6: Mapped using mapping table 2, otherwise use DSCP_VAL. 497 * 7: Mapped using mapping table 3, otherwise use mapping table 2 498 * VCAP_AF_DSCP_VAL: W6, sparx5: is0/es0 499 * See DSCP_ENA. 500 * VCAP_AF_ES2_REW_CMD: W3, sparx5: es2 501 * Command forwarded to REW: 0: No action. 1: SWAP MAC addresses. 2: Do L2CP 502 * DMAC translation when entering or leaving a tunnel. 503 * VCAP_AF_ESDX: W13, sparx5: es0 504 * Egress counter index. Used to index egress counter set as defined in 505 * REW::STAT_CFG. 506 * VCAP_AF_FWD_KILL_ENA: W1, lan966x: is2 507 * Setting this bit to 1 denies forwarding of the frame forwarding to any front 508 * port. The frame can still be copied to the CPU by other actions. 509 * VCAP_AF_FWD_MODE: W2, sparx5: es2 510 * Forward selector: 0: Forward. 1: Discard. 2: Redirect. 3: Copy. 511 * VCAP_AF_FWD_SEL: W2, sparx5: es0 512 * ES0 Forward selector. 0: No action. 1: Copy to loopback interface. 2: 513 * Redirect to loopback interface. 3: Discard 514 * VCAP_AF_HIT_ME_ONCE: W1, sparx5: is2/es2, lan966x: is2 515 * Setting this bit to 1 causes the first frame that hits this action where the 516 * HIT_CNT counter is zero to be copied to the CPU extraction queue specified in 517 * CPU_QUEUE_NUM. The HIT_CNT counter is then incremented and any frames that 518 * hit this action later are not copied to the CPU. To re-enable the HIT_ME_ONCE 519 * functionality, the HIT_CNT counter must be cleared. 520 * VCAP_AF_HOST_MATCH: W1, lan966x: is2 521 * Used for IP source guarding. If set, it signals that the host is a valid (for 522 * instance a valid combination of source MAC address and source IP address). 523 * HOST_MATCH is input to the IS2 keys. 524 * VCAP_AF_IGNORE_PIPELINE_CTRL: W1, sparx5: is2/es2 525 * Ignore ingress pipeline control. This enforces the use of the VCAP IS2 action 526 * even when the pipeline control has terminated the frame before VCAP IS2. 527 * VCAP_AF_INTR_ENA: W1, sparx5: is2/es2 528 * If set, an interrupt is triggered when this rule is hit 529 * VCAP_AF_ISDX_ADD_REPLACE_SEL: W1, sparx5: is0 530 * Controls the classified ISDX. 0: New ISDX = old ISDX + ISDX_VAL. 1: New ISDX 531 * = ISDX_VAL. 532 * VCAP_AF_ISDX_ENA: W1, lan966x: is2 533 * Setting this bit to 1 causes the classified ISDX to be set to the value of 534 * POLICE_IDX[8:0]. 535 * VCAP_AF_ISDX_VAL: W12, sparx5: is0 536 * See isdx_add_replace_sel 537 * VCAP_AF_LOOP_ENA: W1, sparx5: es0 538 * 0: Forward based on PIPELINE_PT and FWD_SEL 539 * VCAP_AF_LRN_DIS: W1, sparx5: is2, lan966x: is2 540 * Setting this bit to 1 disables learning of frames hitting this action. 541 * VCAP_AF_MAP_IDX: W9, sparx5: is0 542 * Index for QoS mapping table lookup 543 * VCAP_AF_MAP_KEY: W3, sparx5: is0 544 * Key type for QoS mapping table lookup. 0: DEI0, PCP0 (outer tag). 1: DEI1, 545 * PCP1 (middle tag). 2: DEI2, PCP2 (inner tag). 3: MPLS TC. 4: PCP0 (outer 546 * tag). 5: E-DEI, E-PCP (E-TAG). 6: DSCP if available, otherwise none. 7: DSCP 547 * if available, otherwise DEI0, PCP0 (outer tag) if available using MAP_IDX+8, 548 * otherwise none 549 * VCAP_AF_MAP_LOOKUP_SEL: W2, sparx5: is0 550 * Selects which of the two QoS Mapping Table lookups that MAP_KEY and MAP_IDX 551 * are applied to. 0: No changes to the QoS Mapping Table lookup. 1: Update key 552 * type and index for QoS Mapping Table lookup #0. 2: Update key type and index 553 * for QoS Mapping Table lookup #1. 3: Reserved. 554 * VCAP_AF_MASK_MODE: sparx5 is0 W3, sparx5 is2 W3, lan966x is2 W2 555 * Controls the PORT_MASK use. Sparx5: 0: OR_DSTMASK, 1: AND_VLANMASK, 2: 556 * REPLACE_PGID, 3: REPLACE_ALL, 4: REDIR_PGID, 5: OR_PGID_MASK, 6: VSTAX, 7: 557 * Not applicable. LAN966X: 0: No action, 1: Permit/deny (AND), 2: Policy 558 * forwarding (DMAC lookup), 3: Redirect. The CPU port is untouched by 559 * MASK_MODE. 560 * VCAP_AF_MATCH_ID: W16, sparx5: is2 561 * Logical ID for the entry. The MATCH_ID is extracted together with the frame 562 * if the frame is forwarded to the CPU (CPU_COPY_ENA). The result is placed in 563 * IFH.CL_RSLT. 564 * VCAP_AF_MATCH_ID_MASK: W16, sparx5: is2 565 * Mask used by MATCH_ID. 566 * VCAP_AF_MIRROR_ENA: W1, lan966x: is2 567 * Setting this bit to 1 causes frames to be mirrored to the mirror target port 568 * (ANA::MIRRPORPORTS). 569 * VCAP_AF_MIRROR_PROBE: W2, sparx5: is2 570 * Mirroring performed according to configuration of a mirror probe. 0: No 571 * mirroring. 1: Mirror probe 0. 2: Mirror probe 1. 3: Mirror probe 2 572 * VCAP_AF_MIRROR_PROBE_ID: W2, sparx5: es2 573 * Signals a mirror probe to be placed in the IFH. Only possible when FWD_MODE 574 * is copy. 0: No mirroring. 1-3: Use mirror probe 0-2. 575 * VCAP_AF_NXT_IDX: W12, sparx5: is0 576 * Index used as part of key (field G_IDX) in the next lookup. 577 * VCAP_AF_NXT_IDX_CTRL: W3, sparx5: is0 578 * Controls the generation of the G_IDX used in the VCAP CLM next lookup 579 * VCAP_AF_PAG_OVERRIDE_MASK: W8, sparx5: is0 580 * Bits set in this mask will override PAG_VAL from port profile. New PAG = (PAG 581 * (input) AND ~PAG_OVERRIDE_MASK) OR (PAG_VAL AND PAG_OVERRIDE_MASK) 582 * VCAP_AF_PAG_VAL: W8, sparx5: is0 583 * See PAG_OVERRIDE_MASK. 584 * VCAP_AF_PCP_A_VAL: W3, sparx5: es0 585 * PCP used in ES0 tag A. See TAG_A_PCP_SEL. 586 * VCAP_AF_PCP_B_VAL: W3, sparx5: es0 587 * PCP used in ES0 tag B. See TAG_B_PCP_SEL. 588 * VCAP_AF_PCP_C_VAL: W3, sparx5: es0 589 * PCP used in ES0 tag C. See TAG_C_PCP_SEL. 590 * VCAP_AF_PCP_ENA: W1, sparx5: is0 591 * If set, use PCP_VAL as classified PCP value. Otherwise, PCP from basic 592 * classification is used. 593 * VCAP_AF_PCP_VAL: W3, sparx5: is0 594 * See PCP_ENA. 595 * VCAP_AF_PIPELINE_ACT: W1, sparx5: es0 596 * Pipeline action when FWD_SEL > 0. 0: XTR. CPU_QU selects CPU extraction queue 597 * 1: LBK_ASM. 598 * VCAP_AF_PIPELINE_FORCE_ENA: W1, sparx5: is2 599 * If set, use PIPELINE_PT unconditionally and set PIPELINE_ACT = NONE if 600 * PIPELINE_PT == NONE. Overrules previous settings of pipeline point. 601 * VCAP_AF_PIPELINE_PT: sparx5 is2 W5, sparx5 es0 W2 602 * Pipeline point used if PIPELINE_FORCE_ENA is set 603 * VCAP_AF_POLICE_ENA: W1, sparx5: is2/es2, lan966x: is2 604 * Setting this bit to 1 causes frames that hit this action to be policed by the 605 * ACL policer specified in POLICE_IDX. Only applies to the first lookup. 606 * VCAP_AF_POLICE_IDX: sparx5 is2 W6, sparx5 es2 W6, lan966x is2 W9 607 * Selects VCAP policer used when policing frames (POLICE_ENA) 608 * VCAP_AF_POLICE_REMARK: W1, sparx5: es2 609 * If set, frames exceeding policer rates are marked as yellow but not 610 * discarded. 611 * VCAP_AF_POLICE_VCAP_ONLY: W1, lan966x: is2 612 * Disable policing from QoS, and port policers. Only the VCAP policer selected 613 * by POLICE_IDX is active. Only applies to the second lookup. 614 * VCAP_AF_POP_VAL: W2, sparx5: es0 615 * Controls popping of Q-tags. The final number of Q-tags popped is calculated 616 * as shown in section 4.28.7.2 VLAN Pop Decision. 617 * VCAP_AF_PORT_MASK: sparx5 is0 W65, sparx5 is2 W68, lan966x is2 W8 618 * Port mask applied to the forwarding decision based on MASK_MODE. 619 * VCAP_AF_PUSH_CUSTOMER_TAG: W2, sparx5: es0 620 * Selects tag C mode: 0: Do not push tag C. 1: Push tag C if 621 * IFH.VSTAX.TAG.WAS_TAGGED = 1. 2: Push tag C if IFH.VSTAX.TAG.WAS_TAGGED = 0. 622 * 3: Push tag C if UNTAG_VID_ENA = 0 or (C-TAG.VID ! = VID_C_VAL). 623 * VCAP_AF_PUSH_INNER_TAG: W1, sparx5: es0 624 * Controls inner tagging. 0: Do not push ES0 tag B as inner tag. 1: Push ES0 625 * tag B as inner tag. 626 * VCAP_AF_PUSH_OUTER_TAG: W2, sparx5: es0 627 * Controls outer tagging. 0: No ES0 tag A: Port tag is allowed if enabled on 628 * port. 1: ES0 tag A: Push ES0 tag A. No port tag. 2: Force port tag: Always 629 * push port tag. No ES0 tag A. 3: Force untag: Never push port tag or ES0 tag 630 * A. 631 * VCAP_AF_QOS_ENA: W1, sparx5: is0 632 * If set, use QOS_VAL as classified QoS class. Otherwise, QoS class from basic 633 * classification is used. 634 * VCAP_AF_QOS_VAL: W3, sparx5: is0 635 * See QOS_ENA. 636 * VCAP_AF_REW_OP: W16, lan966x: is2 637 * Rewriter operation command. 638 * VCAP_AF_RT_DIS: W1, sparx5: is2 639 * If set, routing is disallowed. Only applies when IS_INNER_ACL is 0. See also 640 * IGR_ACL_ENA, EGR_ACL_ENA, and RLEG_STAT_IDX. 641 * VCAP_AF_SWAP_MACS_ENA: W1, sparx5: es0 642 * This setting is only active when FWD_SEL = 1 or FWD_SEL = 2 and PIPELINE_ACT 643 * = LBK_ASM. 0: No action. 1: Swap MACs and clear bit 40 in new SMAC. 644 * VCAP_AF_TAG_A_DEI_SEL: W3, sparx5: es0 645 * Selects PCP for ES0 tag A. 0: Classified DEI. 1: DEI_A_VAL. 2: DP and QoS 646 * mapped to PCP (per port table). 3: DP. 647 * VCAP_AF_TAG_A_PCP_SEL: W3, sparx5: es0 648 * Selects PCP for ES0 tag A. 0: Classified PCP. 1: PCP_A_VAL. 2: DP and QoS 649 * mapped to PCP (per port table). 3: QoS class. 650 * VCAP_AF_TAG_A_TPID_SEL: W3, sparx5: es0 651 * Selects TPID for ES0 tag A: 0: 0x8100. 1: 0x88A8. 2: Custom 652 * (REW:PORT:PORT_VLAN_CFG.PORT_TPID). 3: If IFH.TAG_TYPE = 0 then 0x8100 else 653 * custom. 654 * VCAP_AF_TAG_A_VID_SEL: W2, sparx5: es0 655 * Selects VID for ES0 tag A. 0: Classified VID + VID_A_VAL. 1: VID_A_VAL. 656 * VCAP_AF_TAG_B_DEI_SEL: W3, sparx5: es0 657 * Selects PCP for ES0 tag B. 0: Classified DEI. 1: DEI_B_VAL. 2: DP and QoS 658 * mapped to PCP (per port table). 3: DP. 659 * VCAP_AF_TAG_B_PCP_SEL: W3, sparx5: es0 660 * Selects PCP for ES0 tag B. 0: Classified PCP. 1: PCP_B_VAL. 2: DP and QoS 661 * mapped to PCP (per port table). 3: QoS class. 662 * VCAP_AF_TAG_B_TPID_SEL: W3, sparx5: es0 663 * Selects TPID for ES0 tag B. 0: 0x8100. 1: 0x88A8. 2: Custom 664 * (REW:PORT:PORT_VLAN_CFG.PORT_TPID). 3: If IFH.TAG_TYPE = 0 then 0x8100 else 665 * custom. 666 * VCAP_AF_TAG_B_VID_SEL: W2, sparx5: es0 667 * Selects VID for ES0 tag B. 0: Classified VID + VID_B_VAL. 1: VID_B_VAL. 668 * VCAP_AF_TAG_C_DEI_SEL: W3, sparx5: es0 669 * Selects DEI source for ES0 tag C. 0: Classified DEI. 1: DEI_C_VAL. 2: 670 * REW::DP_MAP.DP [IFH.VSTAX.QOS.DP]. 3: DEI of popped VLAN tag if available 671 * (IFH.VSTAX.TAG.WAS_TAGGED = 1 and tot_pop_cnt>0) else DEI_C_VAL. 4: Mapped 672 * using mapping table 0, otherwise use DEI_C_VAL. 5: Mapped using mapping table 673 * 1, otherwise use mapping table 0. 6: Mapped using mapping table 2, otherwise 674 * use DEI_C_VAL. 7: Mapped using mapping table 3, otherwise use mapping table 675 * 2. 676 * VCAP_AF_TAG_C_PCP_SEL: W3, sparx5: es0 677 * Selects PCP source for ES0 tag C. 0: Classified PCP. 1: PCP_C_VAL. 2: 678 * Reserved. 3: PCP of popped VLAN tag if available (IFH.VSTAX.TAG.WAS_TAGGED=1 679 * and tot_pop_cnt>0) else PCP_C_VAL. 4: Mapped using mapping table 0, otherwise 680 * use PCP_C_VAL. 5: Mapped using mapping table 1, otherwise use mapping table 681 * 0. 6: Mapped using mapping table 2, otherwise use PCP_C_VAL. 7: Mapped using 682 * mapping table 3, otherwise use mapping table 2. 683 * VCAP_AF_TAG_C_TPID_SEL: W3, sparx5: es0 684 * Selects TPID for ES0 tag C. 0: 0x8100. 1: 0x88A8. 2: Custom 1. 3: Custom 2. 685 * 4: Custom 3. 5: See TAG_A_TPID_SEL. 686 * VCAP_AF_TAG_C_VID_SEL: W2, sparx5: es0 687 * Selects VID for ES0 tag C. The resulting VID is termed C-TAG.VID. 0: 688 * Classified VID. 1: VID_C_VAL. 2: IFH.ENCAP.GVID. 3: Reserved. 689 * VCAP_AF_TYPE: W1, sparx5: is0 690 * Actionset type id - Set by the API 691 * VCAP_AF_UNTAG_VID_ENA: W1, sparx5: es0 692 * Controls insertion of tag C. Untag or insert mode can be selected. See 693 * PUSH_CUSTOMER_TAG. 694 * VCAP_AF_VID_A_VAL: W12, sparx5: es0 695 * VID used in ES0 tag A. See TAG_A_VID_SEL. 696 * VCAP_AF_VID_B_VAL: W12, sparx5: es0 697 * VID used in ES0 tag B. See TAG_B_VID_SEL. 698 * VCAP_AF_VID_C_VAL: W12, sparx5: es0 699 * VID used in ES0 tag C. See TAG_C_VID_SEL. 700 * VCAP_AF_VID_VAL: W13, sparx5: is0 701 * New VID Value 702 */ 703 704 /* Actionfield names */ 705 enum vcap_action_field { 706 VCAP_AF_NO_VALUE, /* initial value */ 707 VCAP_AF_ACL_ID, 708 VCAP_AF_CLS_VID_SEL, 709 VCAP_AF_CNT_ID, 710 VCAP_AF_COPY_PORT_NUM, 711 VCAP_AF_COPY_QUEUE_NUM, 712 VCAP_AF_CPU_COPY_ENA, 713 VCAP_AF_CPU_QU, 714 VCAP_AF_CPU_QUEUE_NUM, 715 VCAP_AF_DEI_A_VAL, 716 VCAP_AF_DEI_B_VAL, 717 VCAP_AF_DEI_C_VAL, 718 VCAP_AF_DEI_ENA, 719 VCAP_AF_DEI_VAL, 720 VCAP_AF_DP_ENA, 721 VCAP_AF_DP_VAL, 722 VCAP_AF_DSCP_ENA, 723 VCAP_AF_DSCP_SEL, 724 VCAP_AF_DSCP_VAL, 725 VCAP_AF_ES2_REW_CMD, 726 VCAP_AF_ESDX, 727 VCAP_AF_FWD_KILL_ENA, 728 VCAP_AF_FWD_MODE, 729 VCAP_AF_FWD_SEL, 730 VCAP_AF_HIT_ME_ONCE, 731 VCAP_AF_HOST_MATCH, 732 VCAP_AF_IGNORE_PIPELINE_CTRL, 733 VCAP_AF_INTR_ENA, 734 VCAP_AF_ISDX_ADD_REPLACE_SEL, 735 VCAP_AF_ISDX_ENA, 736 VCAP_AF_ISDX_VAL, 737 VCAP_AF_LOOP_ENA, 738 VCAP_AF_LRN_DIS, 739 VCAP_AF_MAP_IDX, 740 VCAP_AF_MAP_KEY, 741 VCAP_AF_MAP_LOOKUP_SEL, 742 VCAP_AF_MASK_MODE, 743 VCAP_AF_MATCH_ID, 744 VCAP_AF_MATCH_ID_MASK, 745 VCAP_AF_MIRROR_ENA, 746 VCAP_AF_MIRROR_PROBE, 747 VCAP_AF_MIRROR_PROBE_ID, 748 VCAP_AF_NXT_IDX, 749 VCAP_AF_NXT_IDX_CTRL, 750 VCAP_AF_PAG_OVERRIDE_MASK, 751 VCAP_AF_PAG_VAL, 752 VCAP_AF_PCP_A_VAL, 753 VCAP_AF_PCP_B_VAL, 754 VCAP_AF_PCP_C_VAL, 755 VCAP_AF_PCP_ENA, 756 VCAP_AF_PCP_VAL, 757 VCAP_AF_PIPELINE_ACT, 758 VCAP_AF_PIPELINE_FORCE_ENA, 759 VCAP_AF_PIPELINE_PT, 760 VCAP_AF_POLICE_ENA, 761 VCAP_AF_POLICE_IDX, 762 VCAP_AF_POLICE_REMARK, 763 VCAP_AF_POLICE_VCAP_ONLY, 764 VCAP_AF_POP_VAL, 765 VCAP_AF_PORT_MASK, 766 VCAP_AF_PUSH_CUSTOMER_TAG, 767 VCAP_AF_PUSH_INNER_TAG, 768 VCAP_AF_PUSH_OUTER_TAG, 769 VCAP_AF_QOS_ENA, 770 VCAP_AF_QOS_VAL, 771 VCAP_AF_REW_OP, 772 VCAP_AF_RT_DIS, 773 VCAP_AF_SWAP_MACS_ENA, 774 VCAP_AF_TAG_A_DEI_SEL, 775 VCAP_AF_TAG_A_PCP_SEL, 776 VCAP_AF_TAG_A_TPID_SEL, 777 VCAP_AF_TAG_A_VID_SEL, 778 VCAP_AF_TAG_B_DEI_SEL, 779 VCAP_AF_TAG_B_PCP_SEL, 780 VCAP_AF_TAG_B_TPID_SEL, 781 VCAP_AF_TAG_B_VID_SEL, 782 VCAP_AF_TAG_C_DEI_SEL, 783 VCAP_AF_TAG_C_PCP_SEL, 784 VCAP_AF_TAG_C_TPID_SEL, 785 VCAP_AF_TAG_C_VID_SEL, 786 VCAP_AF_TYPE, 787 VCAP_AF_UNTAG_VID_ENA, 788 VCAP_AF_VID_A_VAL, 789 VCAP_AF_VID_B_VAL, 790 VCAP_AF_VID_C_VAL, 791 VCAP_AF_VID_VAL, 792 }; 793 794 #endif /* __VCAP_AG_API__ */ 795