1 /* 2 * Copyright (C) 2015-2020 Alibaba Group Holding Limited 3 */ 4 #ifndef __LINK_SYM_ARMCLANG_H__ 5 #define __LINK_SYM_ARMCLANG_H__ 6 7 #ifdef __ARMCC_VERSION 8 9 #ifdef __cplusplus 10 extern "C" { 11 #endif 12 13 #include "plat_addr_map.h" 14 15 #ifdef ROM_BUILD 16 17 #define __rom_got_info_start Image$$rom_got_info$$Base 18 #define __audio_const_rom_start Image$$rom_audio_const$$Base 19 #define __audio_const_rom_end Image$$rom_audio_const$$Limit 20 #define __audio_const_rom_size Image$$rom_audio_const$$Length 21 #define __rom_text0_end Load$$rom_ramx$$Base 22 #define __rom_ramx_start Image$$rom_ramx$$Base 23 #define __rom_ramx_end Image$$rom_ramx$$Limit 24 #define __rom_etext Load$$rom_data$$Base 25 #define __rom_data_start__ Image$$rom_data$$Base 26 #define __rom_data_end__ Image$$rom_data$$Limit 27 #define __rom_bss_start__ Image$$rom_bss$$Base 28 #define __rom_bss_end__ Image$$rom_bss$$ZI$$Limit 29 #define __rom_HeapBase Image$$ARM_LIB_HEAP$$Base 30 #define __rom_HeapLimit Image$$ARM_LIB_HEAP$$ZI$$Limit 31 #define __rom_StackTop Image$$ARM_LIB_STACK$$ZI$$Limit 32 #define __rom_stack __rom_StackTop 33 #define __rom_StackLimit Image$$ARM_LIB_STACK$$Base 34 #define __cp_ramx_last_dummy_start Image$$cp_ramx_last_dummy$$Base 35 #define __cp_ram_last_dummy_start Image$$cp_ram_last_dummy$$Base 36 #define __cp_stack_limit Image$$cp_stack$$Base 37 #define __cp_stack_top Image$$cp_stack$$ZI$$Limit 38 #define __export_fn_rom Image$$rom_export_fn$$Base 39 40 #define __boot_sram_start_flash__ __rom_HeapLimit 41 #define __boot_sram_start__ __rom_HeapLimit 42 #define __boot_sram_end_flash__ __rom_HeapLimit 43 #define __boot_bss_sram_start__ __rom_HeapLimit 44 #define __boot_bss_sram_end__ __rom_HeapLimit 45 #define __fast_sram_text_data_start_flash__ __rom_HeapLimit 46 #define __fast_sram_text_data_start__ __rom_HeapLimit 47 #define __fast_sram_text_data_end__ __rom_HeapLimit 48 #define __fast_sram_text_data_end_flash__ __rom_HeapLimit 49 #define __sram_text_data_start_flash__ __rom_HeapLimit 50 #define __sram_text_data_start__ __rom_HeapLimit 51 #define __sram_text_data_end_flash__ __rom_HeapLimit 52 #define __sram_bss_start__ __rom_HeapLimit 53 #define __sram_bss_end__ __rom_HeapLimit 54 55 #ifndef NOSTD 56 #define __bss_start__ __rom_bss_start__ 57 #define __bss_end__ __rom_bss_end__ 58 #define __end__ __rom_HeapBase 59 /* 60 #define end __rom_HeapBase 61 */ 62 #define __StackTop __rom_StackTop 63 #define __stack __rom_StackTop 64 #endif 65 66 #elif defined(PROGRAMMER) 67 68 #define __exec_struct_start Image$$exec_struct$$Base 69 #define __got_info_start Image$$got_info$$Base 70 #define __cust_cmd_init_tbl_start Image$$cust_cmd_init_tbl$$Base 71 #define __cust_cmd_init_tbl_end Image$$cust_cmd_init_tbl$$Limit 72 #define __cust_cmd_hldr_tbl_start Image$$cust_cmd_hdlr_tbl$$Base 73 #define __cust_cmd_hldr_tbl_end Image$$cust_cmd_hdlr_tbl$$Limit 74 #define __etext Load$$data$$Base 75 #define __data_start__ Image$$data$$Base 76 #define __data_end__ Image$$data$$Limit 77 #define __bss_start__ Image$$bss$$Base 78 #define __bss_end__ Image$$bss$$ZI$$Limit 79 #define __HeapBase Image$$ARM_LIB_HEAP$$Base 80 #define __end__ __HeapBase 81 /* 82 #define end __HeapBase 83 */ 84 #define __HeapLimit Image$$ARM_LIB_HEAP$$ZI$$Limit 85 #define __StackTop Image$$ARM_LIB_STACK$$ZI$$Limit 86 #define __stack __StackTop 87 #define __StackLimit Image$$ARM_LIB_STACK$$Base 88 89 #define __boot_sram_start_flash__ __HeapLimit 90 #define __boot_sram_start__ __HeapLimit 91 #define __boot_sram_end_flash__ __HeapLimit 92 #define __boot_bss_sram_start__ __HeapLimit 93 #define __boot_bss_sram_end__ __HeapLimit 94 #define __fast_sram_text_data_start_flash__ __HeapLimit 95 #define __fast_sram_text_data_start__ __HeapLimit 96 #define __fast_sram_text_data_end__ __HeapLimit 97 #define __fast_sram_text_data_end_flash__ __HeapLimit 98 #define __sram_text_data_start_flash__ __HeapLimit 99 #define __sram_text_data_start__ __HeapLimit 100 #define __sram_text_data_end_flash__ __HeapLimit 101 #define __sram_bss_start__ __HeapLimit 102 #define __sram_bss_end__ __HeapLimit 103 #define __cp_stack_limit __HeapLimit 104 #define __cp_stack_top __HeapLimit 105 106 #else 107 108 #define Boot_Loader __main 109 #define __flash_start Image$$boot_struct$$Base 110 #define __userdata_pool_end__ Image$$userdata_pool$$Base 111 #define __boot_sram_start_flash__ Load$$boot_text_sram$$Base 112 #define __boot_sram_start__ Image$$boot_text_sram$$Base 113 #define __boot_sram_end_flash__ Load$$boot_data_sram$$Limit 114 /* 115 * CAUTION: 116 * If the section name of BSS variables has no ".bss." prefix, they will be considered as DATA, not BSS (ZI) ! 117 */ 118 #define __boot_bss_sram_start__ Image$$boot_bss_sram$$Base 119 #define __boot_bss_sram_end__ Image$$boot_bss_sram$$ZI$$Limit 120 #define __fast_sram_text_data_start_flash__ Load$$fast_text_sram$$Base 121 #define __fast_sram_text_data_start__ Image$$fast_text_sram$$Base 122 #define __fast_sram_text_data_end__ Image$$fast_text_sram$$Limit 123 #define __fast_sram_text_data_end_flash__ Load$$fast_text_sram$$Limit 124 125 #define __cp_text_sram_start_flash__ Load$$cp_text_sram$$Base 126 #define __cp_text_sram_exec_start__ Image$$cp_text_sram$$Base 127 #define __cp_text_sram_exec_end__ Image$$cp_text_sram$$Limit 128 #define __cp_text_sram_start Image$$cp_text_sram_start$$Base 129 #define __cp_text_sram_end Image$$cp_text_sram_start$$Limit 130 #define __cp_data_sram_start_flash__ Load$$cp_data_sram$$Base 131 #define __cp_data_sram_start Image$$cp_data_sram$$Base 132 #define __cp_data_sram_end Image$$cp_data_sram$$Limit 133 #define __cp_sram_end_flash__ Load$$cp_data_sram$$Limit 134 #define __cp_bss_sram_start Image$$cp_bss_sram$$Base 135 #define __cp_bss_sram_end Image$$cp_bss_sram$$ZI$$Limit 136 #define __cp_stack_limit Image$$cp_stack$$Base 137 #define __cp_stack_top Image$$cp_stack$$ZI$$Limit 138 139 #define __overlay_text_start__ Image$$overlay_start$$Base 140 #define __overlay_text_exec_start__ Image$$overlay_text0$$Base 141 142 #define __load_start_overlay_text0 Load$$overlay_text0$$Base 143 #define __load_stop_overlay_text0 Load$$overlay_text0$$Limit 144 #define __load_start_overlay_text1 Load$$overlay_text1$$Base 145 #define __load_stop_overlay_text1 Load$$overlay_text1$$Limit 146 #define __load_start_overlay_text2 Load$$overlay_text2$$Base 147 #define __load_stop_overlay_text2 Load$$overlay_text2$$Limit 148 #define __load_start_overlay_text3 Load$$overlay_text3$$Base 149 #define __load_stop_overlay_text3 Load$$overlay_text3$$Limit 150 #define __load_start_overlay_text4 Load$$overlay_text4$$Base 151 #define __load_stop_overlay_text4 Load$$overlay_text4$$Limit 152 #define __load_start_overlay_text5 Load$$overlay_text5$$Base 153 #define __load_stop_overlay_text5 Load$$overlay_text5$$Limit 154 #define __load_start_overlay_text6 Load$$overlay_text6$$Base 155 #define __load_stop_overlay_text6 Load$$overlay_text6$$Limit 156 #define __load_start_overlay_text7 Load$$overlay_text7$$Base 157 #define __load_stop_overlay_text7 Load$$overlay_text7$$Limit 158 159 #define __overlay_text_exec_end__ Image$$overlay_text_end$$Base 160 #define __overlay_data_start__ Image$$overlay_data0$$Base 161 162 #define __load_start_overlay_data0 Load$$overlay_data0$$Base 163 #define __load_stop_overlay_data0 Load$$overlay_data0$$Limit 164 #define __load_start_overlay_data1 Load$$overlay_data1$$Base 165 #define __load_stop_overlay_data1 Load$$overlay_data1$$Limit 166 #define __load_start_overlay_data2 Load$$overlay_data2$$Base 167 #define __load_stop_overlay_data2 Load$$overlay_data2$$Limit 168 #define __load_start_overlay_data3 Load$$overlay_data3$$Base 169 #define __load_stop_overlay_data3 Load$$overlay_data3$$Limit 170 #define __load_start_overlay_data4 Load$$overlay_data4$$Base 171 #define __load_stop_overlay_data4 Load$$overlay_data4$$Limit 172 #define __load_start_overlay_data5 Load$$overlay_data5$$Base 173 #define __load_stop_overlay_data5 Load$$overlay_data5$$Limit 174 #define __load_start_overlay_data6 Load$$overlay_data6$$Base 175 #define __load_stop_overlay_data6 Load$$overlay_data6$$Limit 176 #define __load_start_overlay_data7 Load$$overlay_data7$$Base 177 #define __load_stop_overlay_data7 Load$$overlay_data7$$Limit 178 179 #define __sram_text_data_start_flash__ Load$$sram_text$$Base 180 #define __sram_text_data_start__ Image$$sram_text$$Base 181 #define __sram_text_data_end_flash__ Load$$sram_data$$Limit 182 #define __sram_bss_start__ Image$$sram_bss$$Base 183 #define __sram_bss_end__ Image$$sram_bss$$ZI$$Limit 184 #define __etext Load$$data$$Base 185 #define __data_start__ Image$$data$$Base 186 #define __data_end__ Image$$data$$Limit 187 #define __bss_start__ Image$$bss$$Base 188 #define __bss_end__ Image$$bss$$ZI$$Limit 189 #define __HeapBase Image$$ARM_LIB_HEAP$$Base 190 #define __end__ __HeapBase 191 /* 192 #define end __HeapBase 193 */ 194 #define __HeapLimit Image$$ARM_LIB_HEAP$$ZI$$Limit 195 #define __StackTop Image$$ARM_LIB_STACK$$ZI$$Limit 196 #define __stack __StackTop 197 #define __StackLimit Image$$ARM_LIB_STACK$$Base 198 #define __flash_end Image$$code_start_addr$$Limit 199 #define __custom_parameter_start Image$$custom_parameter$$Base 200 #define __custom_parameter_end Image$$custom_parameter$$ZI$$Limit 201 #define __userdata_start Image$$userdata$$Base 202 #define __userdata_end Image$$userdata$$ZI$$Limit 203 #define __aud_start Image$$audio$$Base 204 #define __aud_end Image$$audio$$ZI$$Limit 205 #define __factory_start Image$$factory$$Base 206 #define __factory_end Image$$factory$$ZI$$Limit 207 208 #endif 209 210 #ifdef __cplusplus 211 } 212 #endif 213 214 #endif 215 216 #endif 217 218