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/optee_os-3.20.0/core/drivers/clk/
A Dclk-stm32-core.h210 #define STM32_MUX(_name, _nb_parents, _parents, _flags, _mux_id)\ argument
234 #define STM32_COMPOSITE(_name, _nb_parents, _parents, _flags,\ argument
A Dclk-stm32mp13.c1928 #define STM32_KCLK(_name, _nb_parents, _parents, _flags, _gate_id, _mux_id)\ argument
1942 #define STM32_PLL_VCO(_name, _nb_parents, _parents, _flags, _reg,\ argument
1957 #define STM32_PLL_OUPUT(_name, _nb_parents, _parents, _flags,\ argument

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