1 /*
2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #ifndef __MLX5_ESWITCH_H__
34 #define __MLX5_ESWITCH_H__
35
36 #include <linux/if_ether.h>
37 #include <linux/if_link.h>
38 #include <linux/atomic.h>
39 #include <linux/xarray.h>
40 #include <net/devlink.h>
41 #include <linux/mlx5/device.h>
42 #include <linux/mlx5/eswitch.h>
43 #include <linux/mlx5/vport.h>
44 #include <linux/mlx5/fs.h>
45 #include "lib/mpfs.h"
46 #include "lib/fs_chains.h"
47 #include "sf/sf.h"
48 #include "en/tc_ct.h"
49 #include "en/tc/sample.h"
50
51 enum mlx5_mapped_obj_type {
52 MLX5_MAPPED_OBJ_CHAIN,
53 MLX5_MAPPED_OBJ_SAMPLE,
54 MLX5_MAPPED_OBJ_INT_PORT_METADATA,
55 MLX5_MAPPED_OBJ_ACT_MISS,
56 };
57
58 struct mlx5_mapped_obj {
59 enum mlx5_mapped_obj_type type;
60 union {
61 u32 chain;
62 u64 act_miss_cookie;
63 struct {
64 u32 group_id;
65 u32 rate;
66 u32 trunc_size;
67 u32 tunnel_id;
68 } sample;
69 u32 int_port_metadata;
70 };
71 };
72
73 #ifdef CONFIG_MLX5_ESWITCH
74
75 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15
76
77 #define MLX5_MAX_UC_PER_VPORT(dev) \
78 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
79
80 #define MLX5_MAX_MC_PER_VPORT(dev) \
81 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
82
83 #define mlx5_esw_has_fwd_fdb(dev) \
84 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table)
85
86 #define esw_chains(esw) \
87 ((esw)->fdb_table.offloads.esw_chains_priv)
88
89 enum {
90 MAPPING_TYPE_CHAIN,
91 MAPPING_TYPE_TUNNEL,
92 MAPPING_TYPE_TUNNEL_ENC_OPTS,
93 MAPPING_TYPE_LABELS,
94 MAPPING_TYPE_ZONE,
95 MAPPING_TYPE_INT_PORT,
96 };
97
98 struct vport_ingress {
99 struct mlx5_flow_table *acl;
100 struct mlx5_flow_handle *allow_rule;
101 struct {
102 struct mlx5_flow_group *allow_spoofchk_only_grp;
103 struct mlx5_flow_group *allow_untagged_spoofchk_grp;
104 struct mlx5_flow_group *allow_untagged_only_grp;
105 struct mlx5_flow_group *drop_grp;
106 struct mlx5_flow_handle *drop_rule;
107 struct mlx5_fc *drop_counter;
108 } legacy;
109 struct {
110 /* Optional group to add an FTE to do internal priority
111 * tagging on ingress packets.
112 */
113 struct mlx5_flow_group *metadata_prio_tag_grp;
114 /* Group to add default match-all FTE entry to tag ingress
115 * packet with metadata.
116 */
117 struct mlx5_flow_group *metadata_allmatch_grp;
118 /* Optional group to add a drop all rule */
119 struct mlx5_flow_group *drop_grp;
120 struct mlx5_modify_hdr *modify_metadata;
121 struct mlx5_flow_handle *modify_metadata_rule;
122 struct mlx5_flow_handle *drop_rule;
123 } offloads;
124 };
125
126 struct vport_egress {
127 struct mlx5_flow_table *acl;
128 struct mlx5_flow_handle *allowed_vlan;
129 struct mlx5_flow_group *vlan_grp;
130 union {
131 struct {
132 struct mlx5_flow_group *drop_grp;
133 struct mlx5_flow_handle *drop_rule;
134 struct mlx5_fc *drop_counter;
135 } legacy;
136 struct {
137 struct mlx5_flow_group *fwd_grp;
138 struct mlx5_flow_handle *fwd_rule;
139 struct mlx5_flow_handle *bounce_rule;
140 struct mlx5_flow_group *bounce_grp;
141 } offloads;
142 };
143 };
144
145 struct mlx5_vport_drop_stats {
146 u64 rx_dropped;
147 u64 tx_dropped;
148 };
149
150 struct mlx5_vport_info {
151 u8 mac[ETH_ALEN];
152 u16 vlan;
153 u64 node_guid;
154 int link_state;
155 u8 qos;
156 u8 spoofchk: 1;
157 u8 trusted: 1;
158 u8 roce_enabled: 1;
159 u8 mig_enabled: 1;
160 };
161
162 /* Vport context events */
163 enum mlx5_eswitch_vport_event {
164 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0),
165 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1),
166 MLX5_VPORT_PROMISC_CHANGE = BIT(3),
167 };
168
169 struct mlx5_vport {
170 struct mlx5_core_dev *dev;
171 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
172 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
173 struct mlx5_flow_handle *promisc_rule;
174 struct mlx5_flow_handle *allmulti_rule;
175 struct work_struct vport_change_handler;
176
177 struct vport_ingress ingress;
178 struct vport_egress egress;
179 u32 default_metadata;
180 u32 metadata;
181
182 struct mlx5_vport_info info;
183
184 struct {
185 bool enabled;
186 u32 esw_tsar_ix;
187 u32 bw_share;
188 u32 min_rate;
189 u32 max_rate;
190 struct mlx5_esw_rate_group *group;
191 } qos;
192
193 u16 vport;
194 bool enabled;
195 enum mlx5_eswitch_vport_event enabled_events;
196 int index;
197 struct devlink_port *dl_port;
198 struct dentry *dbgfs;
199 };
200
201 struct mlx5_esw_indir_table;
202
203 struct mlx5_eswitch_fdb {
204 union {
205 struct legacy_fdb {
206 struct mlx5_flow_table *fdb;
207 struct mlx5_flow_group *addr_grp;
208 struct mlx5_flow_group *allmulti_grp;
209 struct mlx5_flow_group *promisc_grp;
210 struct mlx5_flow_table *vepa_fdb;
211 struct mlx5_flow_handle *vepa_uplink_rule;
212 struct mlx5_flow_handle *vepa_star_rule;
213 } legacy;
214
215 struct offloads_fdb {
216 struct mlx5_flow_namespace *ns;
217 struct mlx5_flow_table *tc_miss_table;
218 struct mlx5_flow_table *slow_fdb;
219 struct mlx5_flow_group *send_to_vport_grp;
220 struct mlx5_flow_group *send_to_vport_meta_grp;
221 struct mlx5_flow_group *peer_miss_grp;
222 struct mlx5_flow_handle **peer_miss_rules;
223 struct mlx5_flow_group *miss_grp;
224 struct mlx5_flow_handle **send_to_vport_meta_rules;
225 struct mlx5_flow_handle *miss_rule_uni;
226 struct mlx5_flow_handle *miss_rule_multi;
227
228 struct mlx5_fs_chains *esw_chains_priv;
229 struct {
230 DECLARE_HASHTABLE(table, 8);
231 /* Protects vports.table */
232 struct mutex lock;
233 } vports;
234
235 struct mlx5_esw_indir_table *indir;
236
237 } offloads;
238 };
239 u32 flags;
240 };
241
242 struct mlx5_esw_offload {
243 struct mlx5_flow_table *ft_offloads_restore;
244 struct mlx5_flow_group *restore_group;
245 struct mlx5_modify_hdr *restore_copy_hdr_id;
246 struct mapping_ctx *reg_c0_obj_pool;
247
248 struct mlx5_flow_table *ft_offloads;
249 struct mlx5_flow_group *vport_rx_group;
250 struct mlx5_flow_group *vport_rx_drop_group;
251 struct mlx5_flow_handle *vport_rx_drop_rule;
252 struct xarray vport_reps;
253 struct list_head peer_flows;
254 struct mutex peer_mutex;
255 struct mutex encap_tbl_lock; /* protects encap_tbl */
256 DECLARE_HASHTABLE(encap_tbl, 8);
257 struct mutex decap_tbl_lock; /* protects decap_tbl */
258 DECLARE_HASHTABLE(decap_tbl, 8);
259 struct mod_hdr_tbl mod_hdr;
260 DECLARE_HASHTABLE(termtbl_tbl, 8);
261 struct mutex termtbl_mutex; /* protects termtbl hash */
262 struct xarray vhca_map;
263 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES];
264 u8 inline_mode;
265 atomic64_t num_flows;
266 enum devlink_eswitch_encap_mode encap;
267 struct ida vport_metadata_ida;
268 unsigned int host_number; /* ECPF supports one external host */
269 };
270
271 /* E-Switch MC FDB table hash node */
272 struct esw_mc_addr { /* SRIOV only */
273 struct l2addr_node node;
274 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
275 u32 refcnt;
276 };
277
278 struct mlx5_host_work {
279 struct work_struct work;
280 struct mlx5_eswitch *esw;
281 };
282
283 struct mlx5_esw_functions {
284 struct mlx5_nb nb;
285 u16 num_vfs;
286 };
287
288 enum {
289 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0),
290 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1),
291 MLX5_ESWITCH_VPORT_ACL_NS_CREATED = BIT(2),
292 };
293
294 struct mlx5_esw_bridge_offloads;
295
296 enum {
297 MLX5_ESW_FDB_CREATED = BIT(0),
298 };
299
300 struct mlx5_eswitch {
301 struct mlx5_core_dev *dev;
302 struct mlx5_nb nb;
303 struct mlx5_eswitch_fdb fdb_table;
304 /* legacy data structures */
305 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
306 struct esw_mc_addr mc_promisc;
307 /* end of legacy */
308 struct workqueue_struct *work_queue;
309 struct xarray vports;
310 u32 flags;
311 int total_vports;
312 int enabled_vports;
313 /* Synchronize between vport change events
314 * and async SRIOV admin state changes
315 */
316 struct mutex state_lock;
317
318 /* Protects eswitch mode change that occurs via one or more
319 * user commands, i.e. sriov state change, devlink commands.
320 */
321 struct rw_semaphore mode_lock;
322 atomic64_t user_count;
323
324 struct {
325 u32 root_tsar_ix;
326 struct mlx5_esw_rate_group *group0;
327 struct list_head groups; /* Protected by esw->state_lock */
328
329 /* Protected by esw->state_lock.
330 * Initially 0, meaning no QoS users and QoS is disabled.
331 */
332 refcount_t refcnt;
333 } qos;
334
335 struct mlx5_esw_bridge_offloads *br_offloads;
336 struct mlx5_esw_offload offloads;
337 int mode;
338 u16 manager_vport;
339 u16 first_host_vport;
340 struct mlx5_esw_functions esw_funcs;
341 struct {
342 u32 large_group_num;
343 } params;
344 struct blocking_notifier_head n_head;
345 struct dentry *dbgfs;
346 };
347
348 void esw_offloads_disable(struct mlx5_eswitch *esw);
349 int esw_offloads_enable(struct mlx5_eswitch *esw);
350 void esw_offloads_cleanup(struct mlx5_eswitch *esw);
351 int esw_offloads_init(struct mlx5_eswitch *esw);
352
353 struct mlx5_flow_handle *
354 mlx5_eswitch_add_send_to_vport_meta_rule(struct mlx5_eswitch *esw, u16 vport_num);
355 void mlx5_eswitch_del_send_to_vport_meta_rule(struct mlx5_flow_handle *rule);
356
357 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw);
358 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable);
359 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw);
360 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata);
361
362 int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps);
363
364 /* E-Switch API */
365 int mlx5_eswitch_init(struct mlx5_core_dev *dev);
366 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
367
368 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1)
369 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs);
370 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs);
371 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf);
372 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw);
373 void mlx5_eswitch_disable(struct mlx5_eswitch *esw);
374 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
375 u16 vport, const u8 *mac);
376 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
377 u16 vport, int link_state);
378 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
379 u16 vport, u16 vlan, u8 qos);
380 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
381 u16 vport, bool spoofchk);
382 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
383 u16 vport_num, bool setting);
384 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport,
385 u32 max_rate, u32 min_rate);
386 int mlx5_esw_qos_vport_update_group(struct mlx5_eswitch *esw,
387 struct mlx5_vport *vport,
388 struct mlx5_esw_rate_group *group,
389 struct netlink_ext_ack *extack);
390 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting);
391 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting);
392 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
393 u16 vport, struct ifla_vf_info *ivi);
394 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
395 u16 vport,
396 struct ifla_vf_stats *vf_stats);
397 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
398
399 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
400 bool other_vport, void *in);
401
402 struct mlx5_flow_spec;
403 struct mlx5_esw_flow_attr;
404 struct mlx5_termtbl_handle;
405
406 bool
407 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw,
408 struct mlx5_flow_attr *attr,
409 struct mlx5_flow_act *flow_act,
410 struct mlx5_flow_spec *spec);
411
412 struct mlx5_flow_handle *
413 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw,
414 struct mlx5_flow_table *ft,
415 struct mlx5_flow_spec *spec,
416 struct mlx5_esw_flow_attr *attr,
417 struct mlx5_flow_act *flow_act,
418 struct mlx5_flow_destination *dest,
419 int num_dest);
420
421 void
422 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw,
423 struct mlx5_termtbl_handle *tt);
424
425 void
426 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec);
427
428 struct mlx5_flow_handle *
429 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
430 struct mlx5_flow_spec *spec,
431 struct mlx5_flow_attr *attr);
432 struct mlx5_flow_handle *
433 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw,
434 struct mlx5_flow_spec *spec,
435 struct mlx5_flow_attr *attr);
436 void
437 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
438 struct mlx5_flow_handle *rule,
439 struct mlx5_flow_attr *attr);
440 void
441 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw,
442 struct mlx5_flow_handle *rule,
443 struct mlx5_flow_attr *attr);
444
445 struct mlx5_flow_handle *
446 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport,
447 struct mlx5_flow_destination *dest);
448
449 enum {
450 SET_VLAN_STRIP = BIT(0),
451 SET_VLAN_INSERT = BIT(1)
452 };
453
454 enum mlx5_flow_match_level {
455 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE,
456 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2,
457 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP,
458 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP,
459 };
460
461 /* current maximum for flow based vport multicasting */
462 #define MLX5_MAX_FLOW_FWD_VPORTS 32
463
464 enum {
465 MLX5_ESW_DEST_ENCAP = BIT(0),
466 MLX5_ESW_DEST_ENCAP_VALID = BIT(1),
467 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2),
468 };
469
470 struct mlx5_esw_flow_attr {
471 struct mlx5_eswitch_rep *in_rep;
472 struct mlx5_core_dev *in_mdev;
473 struct mlx5_core_dev *counter_dev;
474 struct mlx5e_tc_int_port *dest_int_port;
475 struct mlx5e_tc_int_port *int_port;
476
477 int split_count;
478 int out_count;
479
480 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH];
481 u16 vlan_vid[MLX5_FS_VLAN_DEPTH];
482 u8 vlan_prio[MLX5_FS_VLAN_DEPTH];
483 u8 total_vlan;
484 struct {
485 u32 flags;
486 struct mlx5_eswitch_rep *rep;
487 struct mlx5_pkt_reformat *pkt_reformat;
488 struct mlx5_core_dev *mdev;
489 struct mlx5_termtbl_handle *termtbl;
490 int src_port_rewrite_act_id;
491 } dests[MLX5_MAX_FLOW_FWD_VPORTS];
492 struct mlx5_rx_tun_attr *rx_tun_attr;
493 struct ethhdr eth;
494 struct mlx5_pkt_reformat *decap_pkt_reformat;
495 };
496
497 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode,
498 struct netlink_ext_ack *extack);
499 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
500 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode,
501 struct netlink_ext_ack *extack);
502 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
503 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink,
504 enum devlink_eswitch_encap_mode encap,
505 struct netlink_ext_ack *extack);
506 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink,
507 enum devlink_eswitch_encap_mode *encap);
508 int mlx5_devlink_port_function_hw_addr_get(struct devlink_port *port,
509 u8 *hw_addr, int *hw_addr_len,
510 struct netlink_ext_ack *extack);
511 int mlx5_devlink_port_function_hw_addr_set(struct devlink_port *port,
512 const u8 *hw_addr, int hw_addr_len,
513 struct netlink_ext_ack *extack);
514 int mlx5_devlink_port_fn_roce_get(struct devlink_port *port, bool *is_enabled,
515 struct netlink_ext_ack *extack);
516 int mlx5_devlink_port_fn_roce_set(struct devlink_port *port, bool enable,
517 struct netlink_ext_ack *extack);
518 int mlx5_devlink_port_fn_migratable_get(struct devlink_port *port, bool *is_enabled,
519 struct netlink_ext_ack *extack);
520 int mlx5_devlink_port_fn_migratable_set(struct devlink_port *port, bool enable,
521 struct netlink_ext_ack *extack);
522 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);
523
524 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
525 u16 vport, u16 vlan, u8 qos, u8 set_flags);
526
esw_vst_mode_is_steering(struct mlx5_eswitch * esw)527 static inline bool esw_vst_mode_is_steering(struct mlx5_eswitch *esw)
528 {
529 return (MLX5_CAP_ESW_EGRESS_ACL(esw->dev, pop_vlan) &&
530 MLX5_CAP_ESW_INGRESS_ACL(esw->dev, push_vlan));
531 }
532
mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev * dev,u8 vlan_depth)533 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev,
534 u8 vlan_depth)
535 {
536 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) &&
537 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan);
538
539 if (vlan_depth == 1)
540 return ret;
541
542 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) &&
543 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2);
544 }
545
546 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
547 struct mlx5_core_dev *dev1);
548
549 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev);
550
551 #define MLX5_DEBUG_ESWITCH_MASK BIT(3)
552
553 #define esw_info(__dev, format, ...) \
554 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
555
556 #define esw_warn(__dev, format, ...) \
557 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__)
558
559 #define esw_debug(dev, format, ...) \
560 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
561
mlx5_esw_allowed(const struct mlx5_eswitch * esw)562 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw)
563 {
564 return esw && MLX5_ESWITCH_MANAGER(esw->dev);
565 }
566
567 /* The returned number is valid only when the dev is eswitch manager. */
mlx5_eswitch_manager_vport(struct mlx5_core_dev * dev)568 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev)
569 {
570 return mlx5_core_is_ecpf_esw_manager(dev) ?
571 MLX5_VPORT_ECPF : MLX5_VPORT_PF;
572 }
573
574 static inline bool
mlx5_esw_is_manager_vport(const struct mlx5_eswitch * esw,u16 vport_num)575 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num)
576 {
577 return esw->manager_vport == vport_num;
578 }
579
mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev * dev)580 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev)
581 {
582 return mlx5_core_is_ecpf_esw_manager(dev) ?
583 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF;
584 }
585
mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev * dev)586 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev)
587 {
588 return mlx5_core_is_ecpf_esw_manager(dev);
589 }
590
591 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)592 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
593 u16 vport_num)
594 {
595 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num;
596 }
597
598 static inline u16
mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)599 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index)
600 {
601 return dl_port_index & 0xffff;
602 }
603
mlx5_esw_is_fdb_created(struct mlx5_eswitch * esw)604 static inline bool mlx5_esw_is_fdb_created(struct mlx5_eswitch *esw)
605 {
606 return esw->fdb_table.flags & MLX5_ESW_FDB_CREATED;
607 }
608
609 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */
610 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw);
611
612 /* Each mark identifies eswitch vport type.
613 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using
614 * a single mark.
615 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport.
616 * MLX5_ESW_VPT_SF identifies SF vport.
617 */
618 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0
619 #define MLX5_ESW_VPT_VF XA_MARK_1
620 #define MLX5_ESW_VPT_SF XA_MARK_2
621
622 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init.
623 * Borrowed the idea from xa_for_each_marked() but with support for desired last element.
624 */
625
626 #define mlx5_esw_for_each_vport(esw, index, vport) \
627 xa_for_each(&((esw)->vports), index, vport)
628
629 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \
630 for (index = 0, entry = xa_find(xa, &index, last, filter); \
631 entry; entry = xa_find_after(xa, &index, last, filter))
632
633 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \
634 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter)
635
636 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \
637 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF)
638
639 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \
640 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN)
641
642 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink);
643 struct mlx5_vport *__must_check
644 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num);
645
646 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num);
647 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num);
648
649 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data);
650
651 int
652 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
653 enum mlx5_eswitch_vport_event enabled_events);
654 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw);
655
656 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num,
657 enum mlx5_eswitch_vport_event enabled_events);
658 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
659
660 int
661 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw,
662 struct mlx5_vport *vport);
663 void
664 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw,
665 struct mlx5_vport *vport);
666
667 struct esw_vport_tbl_namespace {
668 int max_fte;
669 int max_num_groups;
670 u32 flags;
671 };
672
673 struct mlx5_vport_tbl_attr {
674 u32 chain;
675 u16 prio;
676 u16 vport;
677 const struct esw_vport_tbl_namespace *vport_ns;
678 };
679
680 struct mlx5_flow_table *
681 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
682 void
683 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr);
684
685 struct mlx5_flow_handle *
686 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag);
687
688 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num);
689 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num);
690
691 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num);
692 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num);
693
694 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num,
695 enum mlx5_eswitch_vport_event enabled_events);
696 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num);
697
698 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
699 enum mlx5_eswitch_vport_event enabled_events);
700 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs);
701
702 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num);
703 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
704 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num);
705
706 void mlx5_esw_vport_debugfs_create(struct mlx5_eswitch *esw, u16 vport_num, bool is_sf, u16 sf_num);
707 void mlx5_esw_vport_debugfs_destroy(struct mlx5_eswitch *esw, u16 vport_num);
708
709 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
710 u16 vport_num, u32 controller, u32 sfnum);
711 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num);
712
713 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port,
714 u16 vport_num, u32 controller, u32 sfnum);
715 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num);
716 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id);
717
718 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num);
719 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num);
720 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num);
721
722 /**
723 * mlx5_esw_event_info - Indicates eswitch mode changed/changing.
724 *
725 * @new_mode: New mode of eswitch.
726 */
727 struct mlx5_esw_event_info {
728 u16 new_mode;
729 };
730
731 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n);
732 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n);
733
734 bool mlx5_esw_hold(struct mlx5_core_dev *dev);
735 void mlx5_esw_release(struct mlx5_core_dev *dev);
736 void mlx5_esw_get(struct mlx5_core_dev *dev);
737 void mlx5_esw_put(struct mlx5_core_dev *dev);
738 int mlx5_esw_try_lock(struct mlx5_eswitch *esw);
739 void mlx5_esw_unlock(struct mlx5_eswitch *esw);
740
741 void esw_vport_change_handle_locked(struct mlx5_vport *vport);
742
743 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller);
744
745 int mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
746 struct mlx5_eswitch *slave_esw);
747 void mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
748 struct mlx5_eswitch *slave_esw);
749 int mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw);
750
mlx5_eswitch_num_vfs(struct mlx5_eswitch * esw)751 static inline int mlx5_eswitch_num_vfs(struct mlx5_eswitch *esw)
752 {
753 if (mlx5_esw_allowed(esw))
754 return esw->esw_funcs.num_vfs;
755
756 return 0;
757 }
758
759 static inline struct mlx5_flow_table *
mlx5_eswitch_get_slow_fdb(struct mlx5_eswitch * esw)760 mlx5_eswitch_get_slow_fdb(struct mlx5_eswitch *esw)
761 {
762 return esw->fdb_table.offloads.slow_fdb;
763 }
764 #else /* CONFIG_MLX5_ESWITCH */
765 /* eswitch API stubs */
mlx5_eswitch_init(struct mlx5_core_dev * dev)766 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
mlx5_eswitch_cleanup(struct mlx5_eswitch * esw)767 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
mlx5_eswitch_enable(struct mlx5_eswitch * esw,int num_vfs)768 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; }
mlx5_eswitch_disable_sriov(struct mlx5_eswitch * esw,bool clear_vf)769 static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {}
mlx5_eswitch_disable(struct mlx5_eswitch * esw)770 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {}
mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev * dev)771 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; }
772 static inline
mlx5_eswitch_set_vport_state(struct mlx5_eswitch * esw,u16 vport,int link_state)773 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; }
mlx5_esw_query_functions(struct mlx5_core_dev * dev)774 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
775 {
776 return ERR_PTR(-EOPNOTSUPP);
777 }
778
779 static inline struct mlx5_flow_handle *
esw_add_restore_rule(struct mlx5_eswitch * esw,u32 tag)780 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag)
781 {
782 return ERR_PTR(-EOPNOTSUPP);
783 }
784
785 static inline unsigned int
mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev * dev,u16 vport_num)786 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev,
787 u16 vport_num)
788 {
789 return vport_num;
790 }
791
792 static inline int
mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch * master_esw,struct mlx5_eswitch * slave_esw)793 mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw,
794 struct mlx5_eswitch *slave_esw)
795 {
796 return 0;
797 }
798
799 static inline void
mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch * master_esw,struct mlx5_eswitch * slave_esw)800 mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw,
801 struct mlx5_eswitch *slave_esw) {}
802
803 static inline int
mlx5_eswitch_reload_reps(struct mlx5_eswitch * esw)804 mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw)
805 {
806 return 0;
807 }
808 #endif /* CONFIG_MLX5_ESWITCH */
809
810 #endif /* __MLX5_ESWITCH_H__ */
811