1 /*
2  * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <string.h>
9 
10 #include <arch.h>
11 #include <arch_features.h>
12 #include <arch_helpers.h>
13 #include <bl31/bl31.h>
14 #include <bl31/ehf.h>
15 #include <common/bl_common.h>
16 #include <common/debug.h>
17 #include <common/feat_detect.h>
18 #include <common/runtime_svc.h>
19 #include <drivers/console.h>
20 #include <lib/el3_runtime/context_mgmt.h>
21 #include <lib/pmf/pmf.h>
22 #include <lib/runtime_instr.h>
23 #include <plat/common/platform.h>
24 #include <services/std_svc.h>
25 
26 #if ENABLE_RUNTIME_INSTRUMENTATION
27 PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID,
28 	RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE)
29 #endif
30 
31 /*******************************************************************************
32  * This function pointer is used to initialise the BL32 image. It's initialized
33  * by SPD calling bl31_register_bl32_init after setting up all things necessary
34  * for SP execution. In cases where both SPD and SP are absent, or when SPD
35  * finds it impossible to execute SP, this pointer is left as NULL
36  ******************************************************************************/
37 static int32_t (*bl32_init)(void);
38 
39 /*****************************************************************************
40  * Function used to initialise RMM if RME is enabled
41  *****************************************************************************/
42 #if ENABLE_RME
43 static int32_t (*rmm_init)(void);
44 #endif
45 
46 /*******************************************************************************
47  * Variable to indicate whether next image to execute after BL31 is BL33
48  * (non-secure & default) or BL32 (secure).
49  ******************************************************************************/
50 static uint32_t next_image_type = NON_SECURE;
51 
52 #ifdef SUPPORT_UNKNOWN_MPID
53 /*
54  * Flag to know whether an unsupported MPID has been detected. To avoid having it
55  * landing on the .bss section, it is initialized to a non-zero value, this way
56  * we avoid potential WAW hazards during system bring up.
57  * */
58 volatile uint32_t unsupported_mpid_flag = 1;
59 #endif
60 
61 /*
62  * Implement the ARM Standard Service function to get arguments for a
63  * particular service.
64  */
get_arm_std_svc_args(unsigned int svc_mask)65 uintptr_t get_arm_std_svc_args(unsigned int svc_mask)
66 {
67 	/* Setup the arguments for PSCI Library */
68 	DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint);
69 
70 	/* PSCI is the only ARM Standard Service implemented */
71 	assert(svc_mask == PSCI_FID_MASK);
72 
73 	return (uintptr_t)&psci_args;
74 }
75 
76 /*******************************************************************************
77  * Simple function to initialise all BL31 helper libraries.
78  ******************************************************************************/
bl31_lib_init(void)79 void __init bl31_lib_init(void)
80 {
81 	cm_init();
82 }
83 
84 /*******************************************************************************
85  * Setup function for BL31.
86  ******************************************************************************/
bl31_setup(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)87 void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2,
88 		u_register_t arg3)
89 {
90 	/* Perform early platform-specific setup */
91 	bl31_early_platform_setup2(arg0, arg1, arg2, arg3);
92 
93 	/* Perform late platform-specific setup */
94 	bl31_plat_arch_setup();
95 
96 #if ENABLE_FEAT_HCX
97 	/*
98 	 * Assert that FEAT_HCX is supported on this system, without this check
99 	 * an exception would occur during context save/restore if enabled but
100 	 * not supported.
101 	 */
102 	assert(is_feat_hcx_present());
103 #endif /* ENABLE_FEAT_HCX */
104 
105 #if CTX_INCLUDE_PAUTH_REGS
106 	/*
107 	 * Assert that the ARMv8.3-PAuth registers are present or an access
108 	 * fault will be triggered when they are being saved or restored.
109 	 */
110 	assert(is_armv8_3_pauth_present());
111 #endif /* CTX_INCLUDE_PAUTH_REGS */
112 }
113 
114 /*******************************************************************************
115  * BL31 is responsible for setting up the runtime services for the primary cpu
116  * before passing control to the bootloader or an Operating System. This
117  * function calls runtime_svc_init() which initializes all registered runtime
118  * services. The run time services would setup enough context for the core to
119  * switch to the next exception level. When this function returns, the core will
120  * switch to the programmed exception level via an ERET.
121  ******************************************************************************/
bl31_main(void)122 void bl31_main(void)
123 {
124 	NOTICE("BL31: %s\n", version_string);
125 	NOTICE("BL31: %s\n", build_message);
126 
127 #if FEATURE_DETECTION
128 	/* Detect if features enabled during compilation are supported by PE. */
129 	detect_arch_features();
130 #endif /* FEATURE_DETECTION */
131 
132 #ifdef SUPPORT_UNKNOWN_MPID
133 	if (unsupported_mpid_flag == 0) {
134 		NOTICE("Unsupported MPID detected!\n");
135 	}
136 #endif
137 
138 	/* Perform platform setup in BL31 */
139 	bl31_platform_setup();
140 
141 	/* Initialise helper libraries */
142 	bl31_lib_init();
143 
144 #if EL3_EXCEPTION_HANDLING
145 	INFO("BL31: Initialising Exception Handling Framework\n");
146 	ehf_init();
147 #endif
148 
149 	/* Initialize the runtime services e.g. psci. */
150 	INFO("BL31: Initializing runtime services\n");
151 	runtime_svc_init();
152 
153 	/*
154 	 * All the cold boot actions on the primary cpu are done. We now need to
155 	 * decide which is the next image and how to execute it.
156 	 * If the SPD runtime service is present, it would want to pass control
157 	 * to BL32 first in S-EL1. In that case, SPD would have registered a
158 	 * function to initialize bl32 where it takes responsibility of entering
159 	 * S-EL1 and returning control back to bl31_main. Similarly, if RME is
160 	 * enabled and a function is registered to initialize RMM, control is
161 	 * transferred to RMM in R-EL2. After RMM initialization, control is
162 	 * returned back to bl31_main. Once this is done we can prepare entry
163 	 * into BL33 as normal.
164 	 */
165 
166 	/*
167 	 * If SPD had registered an init hook, invoke it.
168 	 */
169 	if (bl32_init != NULL) {
170 		INFO("BL31: Initializing BL32\n");
171 
172 		int32_t rc = (*bl32_init)();
173 
174 		if (rc == 0) {
175 			WARN("BL31: BL32 initialization failed\n");
176 		}
177 	}
178 
179 	/*
180 	 * If RME is enabled and init hook is registered, initialize RMM
181 	 * in R-EL2.
182 	 */
183 #if ENABLE_RME
184 	if (rmm_init != NULL) {
185 		INFO("BL31: Initializing RMM\n");
186 
187 		int32_t rc = (*rmm_init)();
188 
189 		if (rc == 0) {
190 			WARN("BL31: RMM initialization failed\n");
191 		}
192 	}
193 #endif
194 
195 	/*
196 	 * We are ready to enter the next EL. Prepare entry into the image
197 	 * corresponding to the desired security state after the next ERET.
198 	 */
199 	bl31_prepare_next_image_entry();
200 
201 	console_flush();
202 
203 	/*
204 	 * Perform any platform specific runtime setup prior to cold boot exit
205 	 * from BL31
206 	 */
207 	bl31_plat_runtime_setup();
208 }
209 
210 /*******************************************************************************
211  * Accessor functions to help runtime services decide which image should be
212  * executed after BL31. This is BL33 or the non-secure bootloader image by
213  * default but the Secure payload dispatcher could override this by requesting
214  * an entry into BL32 (Secure payload) first. If it does so then it should use
215  * the same API to program an entry into BL33 once BL32 initialisation is
216  * complete.
217  ******************************************************************************/
bl31_set_next_image_type(uint32_t security_state)218 void bl31_set_next_image_type(uint32_t security_state)
219 {
220 	assert(sec_state_is_valid(security_state));
221 	next_image_type = security_state;
222 }
223 
bl31_get_next_image_type(void)224 uint32_t bl31_get_next_image_type(void)
225 {
226 	return next_image_type;
227 }
228 
229 /*******************************************************************************
230  * This function programs EL3 registers and performs other setup to enable entry
231  * into the next image after BL31 at the next ERET.
232  ******************************************************************************/
bl31_prepare_next_image_entry(void)233 void __init bl31_prepare_next_image_entry(void)
234 {
235 	entry_point_info_t *next_image_info;
236 	uint32_t image_type;
237 
238 #if CTX_INCLUDE_AARCH32_REGS
239 	/*
240 	 * Ensure that the build flag to save AArch32 system registers in CPU
241 	 * context is not set for AArch64-only platforms.
242 	 */
243 	if (el_implemented(1) == EL_IMPL_A64ONLY) {
244 		ERROR("EL1 supports AArch64-only. Please set build flag "
245 				"CTX_INCLUDE_AARCH32_REGS = 0\n");
246 		panic();
247 	}
248 #endif
249 
250 	/* Determine which image to execute next */
251 	image_type = bl31_get_next_image_type();
252 
253 	/* Program EL3 registers to enable entry into the next EL */
254 	next_image_info = bl31_plat_get_next_image_ep_info(image_type);
255 	assert(next_image_info != NULL);
256 	assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
257 
258 	INFO("BL31: Preparing for EL3 exit to %s world\n",
259 		(image_type == SECURE) ? "secure" : "normal");
260 	print_entry_point_info(next_image_info);
261 	cm_init_my_context(next_image_info);
262 
263 	/*
264 	* If we are entering the Non-secure world, use
265 	* 'cm_prepare_el3_exit_ns' to exit.
266 	*/
267 	if (image_type == NON_SECURE) {
268 		cm_prepare_el3_exit_ns();
269 	} else {
270 		cm_prepare_el3_exit(image_type);
271 	}
272 }
273 
274 /*******************************************************************************
275  * This function initializes the pointer to BL32 init function. This is expected
276  * to be called by the SPD after it finishes all its initialization
277  ******************************************************************************/
bl31_register_bl32_init(int32_t (* func)(void))278 void bl31_register_bl32_init(int32_t (*func)(void))
279 {
280 	bl32_init = func;
281 }
282 
283 #if ENABLE_RME
284 /*******************************************************************************
285  * This function initializes the pointer to RMM init function. This is expected
286  * to be called by the RMMD after it finishes all its initialization
287  ******************************************************************************/
bl31_register_rmm_init(int32_t (* func)(void))288 void bl31_register_rmm_init(int32_t (*func)(void))
289 {
290 	rmm_init = func;
291 }
292 #endif
293